Searched refs:regs (Results 76 - 100 of 167) sorted by relevance

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/haiku/headers/os/drivers/
H A Dbios.h60 status_t (*interrupt)(bios_state* state, uint8 vector, bios_regs* regs);
/haiku/src/add-ons/kernel/drivers/graphics/radeon/
H A DDMA.c39 OUTREGP( di->regs, RADEON_GEN_INT_CNTL, RADEON_VIDDMA_MASK, ~RADEON_VIDDMA_MASK );
41 OUTREG( di->regs, RADEON_GEN_INT_STATUS, RADEON_VIDDMA_AK );
170 OUTREG( di->regs, RADEON_DMA_VID_TABLE_ADDR, di->si->memory[mt_local].virtual_addr_start +
176 while( (INREG( di->regs, RADEON_DMA_VID_STATUS ) & RADEON_DMA_STATUS_ACTIVE) != 0 ) {
H A DPCI_GART.c284 vuint8 *regs = di->regs; local
290 // 2. I doubt that these regs are buffered by FIFO
295 OUTREG( regs, RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS );
297 INREG( regs, RADEON_CP_CSQ_CNTL );
300 OUTREGP( regs, RADEON_BUS_CNTL, RADEON_BUS_MASTER_DIS, ~RADEON_BUS_MASTER_DIS );
302 OUTREGP( regs, RADEON_AIC_CNTL, 0, ~RADEON_PCIGART_TRANSLATE_EN );
/haiku/src/system/boot/platform/bios_ia32/
H A Dbios.h46 void call_bios(uint8 num, struct bios_regs* regs);
/haiku/headers/os/drivers/bus/
H A DFDT.h26 bool (*get_reg)(struct fdt_device* dev, uint32 ord, uint64* regs, uint64* len);
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_gpio.c430 u_int32_t regs[2], shifts[2]; local
438 regs[0] = AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE);
439 regs[1] = AR_HOSTIF_REG(ah, AR_INTR_ASYNC_MASK);
443 regs[0] = AR_HOSTIF_REG(ah, AR_INTR_SYNC_ENABLE);
444 regs[1] = AR_HOSTIF_REG(ah, AR_INTR_SYNC_MASK);
462 for (i = 0; i < ARRAY_LENGTH(regs); i++) {
463 reg_val = OS_REG_READ(ah, regs[i]);
466 OS_REG_WRITE(ah, regs[i], reg_val);
489 for (i = 0; i < ARRAY_LENGTH(regs); i++) {
490 reg_val = OS_REG_READ(ah, regs[
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/haiku/src/add-ons/accelerants/s3/
H A Dregister_io.cpp17 #define INREG8(addr) *((vuint8*)(gInfo.regs + addr))
18 #define INREG16(addr) *((vuint16*)(gInfo.regs + addr))
19 #define INREG32(addr) *((vuint32*)(gInfo.regs + addr))
21 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
22 #define OUTREG16(addr, val) *((vuint16*)(gInfo.regs + addr)) = val
23 #define OUTREG32(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/add-ons/kernel/drivers/graphics/matrox/
H A Ddriver.c54 vuint32 *regs; /* kernel's pointer to memory mapped registers */ member in struct:device_info
151 static int caused_vbi(vuint32 * regs) argument
157 static void clear_vbi(vuint32 * regs) argument
162 static void enable_vbi(vuint32 * regs) argument
167 static void disable_vbi(vuint32 * regs) argument
352 sprintf(buffer, DEVICE_FORMAT " regs",
363 (void **)&(di->regs));
364 si->clone_bugfix_regs = (uint32 *) di->regs;
567 di->regs = NULL;
697 static uint32 thread_interrupt_work(int32 *flags, vuint32 *regs, shared_inf argument
717 vuint32 *regs; local
905 vuint32 *regs = di->regs; local
1007 vuint32 *regs = di->regs; local
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/haiku/src/build/libgnuregex/
H A Dregex.c2474 /* Remove failure points and point to how many regs pushed. */ \
2824 re_set_registers (bufp, regs, num_regs, starts, ends)
2826 struct re_registers *regs;
2833 regs->num_regs = num_regs;
2834 regs->start = starts;
2835 regs->end = ends;
2840 regs->num_regs = 0;
2841 regs->start = regs->end = (regoff_t) 0;
2852 re_search (bufp, string, size, startpos, range, regs)
4813 struct re_registers regs; local
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/haiku/src/add-ons/accelerants/radeon_hd/
H A Daccelerant.cpp79 gDisplay[id]->regs = (register_info*)malloc(sizeof(register_info));
80 if (gDisplay[id]->regs == NULL)
82 memset(gDisplay[id]->regs, 0, sizeof(register_info));
133 AreaDeleter regsDeleter(clone_area("radeon hd regs",
134 (void**)&gInfo->regs, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
182 free(gDisplay[id]->regs);
H A Daccelerant.h54 vuint8* regs; member in struct:accelerant_info
192 register_info* regs; member in struct:__anon5
224 return *(volatile uint32*)(gInfo->regs + offset);
231 *(volatile uint32 *)(gInfo->regs + offset) = value;
/haiku/src/system/kernel/arch/x86/
H A Darch_cpu.cpp677 return cpuid.regs.ebx >> 24;
688 int maxLogicalID = next_power_of_2((cpuid.regs.ebx >> 16) & 0xff);
693 maxCoreID = (cpuid.regs.ecx >> 12) & 0xf;
697 maxCoreID = next_power_of_2((cpuid.regs.edx & 0xf) + 1);
731 cacheType = cpuid.regs.eax & 0x1f;
735 int cacheLevel = (cpuid.regs.eax >> 5) & 0x7;
736 int coresCount = next_power_of_2(((cpuid.regs.eax >> 14) & 0x3f) + 1);
755 return cpuid.regs.edx;
767 if (cpuid.regs.ebx != 0)
772 if (cpuid.regs
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/haiku/src/add-ons/kernel/busses/i2c/ocores/
H A Docores_i2c.cpp149 uint64 regs = 0; local
151 if (!parentModule->get_reg(parentDev, 0, &regs, &regsLen))
154 fRegsArea.SetTo(map_physical_memory("Ocores i2c MMIO", regs, regsLen, B_ANY_KERNEL_ADDRESS,
/haiku/src/system/kernel/arch/arm64/
H A Darch_thread.cpp72 thread->arch_info.regs[10] = (uint64_t)data;
73 thread->arch_info.regs[11] = (uint64_t)function;
74 thread->arch_info.regs[12] = (uint64_t)_stackTop;
/haiku/src/add-ons/kernel/busses/pci/ecam/
H A DECAMPCIControllerFDT.cpp85 uint64 regs = 0; local
86 if (!fdtModule->get_reg(fdtDev, 0, &regs, &fRegsLen))
89 fRegsArea.SetTo(map_physical_memory("PCI Config MMIO", regs, fRegsLen, B_ANY_KERNEL_ADDRESS,
/haiku/src/add-ons/accelerants/3dfx/
H A Daccelerant.cpp43 gInfo.regsArea = clone_area("3DFX regs area", (void**)&(gInfo.regs),
60 gInfo.regs = 0;
/haiku/src/system/libroot/posix/glibc/regex/
H A Dregexec.c47 int start, int range, struct re_registers *regs,
51 int range, int stop, struct re_registers *regs,
53 static unsigned re_copy_regs (struct re_registers *regs, regmatch_t *pmatch,
67 regmatch_t *regs,
308 re_match (bufp, string, length, start, regs)
312 struct re_registers *regs;
314 return re_search_stub (bufp, string, length, start, 0, length, regs, 1);
321 re_search (bufp, string, length, start, range, regs)
325 struct re_registers *regs;
327 return re_search_stub (bufp, string, length, start, range, length, regs,
324 struct re_registers *regs; variable in typeref:struct:re_registers
337 struct re_registers *regs; variable in typeref:struct:re_registers
351 struct re_registers *regs; variable in typeref:struct:re_registers
1246 proceed_next_node(const re_match_context_t *mctx, int nregs, regmatch_t *regs, int *pidx, int node, re_node_set *eps_via_nodes, struct re_fail_stack_t *fs) argument
1346 push_fail_stack(struct re_fail_stack_t *fs, int str_idx, int dest_node, int nregs, regmatch_t *regs, re_node_set *eps_via_nodes) argument
1373 pop_fail_stack(struct re_fail_stack_t *fs, int *pidx, int nregs, regmatch_t *regs, re_node_set *eps_via_nodes) argument
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/haiku/src/add-ons/kernel/busses/virtio/virtio_mmio/
H A Dvirtio_mmio.cpp175 uint64 regs = 0;
188 if (!parentModule->get_reg(parentDev, 0, &regs, &regsLen)) {
189 ERROR("no regs");
207 regs = range.base;
212 AreaDeleter fRegsArea(map_physical_memory("Virtio MMIO", regs, regsLen,
217 ERROR("cant't map regs");
261 uint64 regs = 0;
277 for (uint32 i = 0; parentModule->get_reg(parentDev, i, &regs, &regsLen);
280 i, regs, regsLen);
298 if (!parentModule->get_reg(parentDev, 0, &regs,
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/haiku/src/add-ons/accelerants/neomagic/
H A DInitAccelerant.c52 regs = si->clone_bugfix_regs;
63 regs = si->clone_bugfix_regs;
69 regs_area = clone_area(DRIVER_PREFIX " regs", (void **)&regs, B_ANY_ADDRESS,
113 regs = 0;
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_globals.c16 vuint32 *regs; variable
/haiku/src/add-ons/accelerants/via/engine/
H A Dglobals.c15 vuint32 *regs; variable
/haiku/src/system/boot/platform/riscv/
H A Dvirtio.h16 VirtioRegs* volatile regs; member in struct:VirtioResources
/haiku/src/system/libroot/os/arch/x86_64/
H A Dsystem_time.cpp72 if ((cpuInfo.regs.edx & IA32_FEATURE_AMD_EXT_RDTSCP)!= 0) {
/haiku/src/add-ons/kernel/drivers/disk/nvme/libnvme/
H A Dnvme_internal.h470 volatile struct nvme_registers *regs; member in struct:nvme_ctrlr
734 nvme_mmio_read_4((__u32 *)&(sc)->regs->reg)
737 nvme_mmio_read_8((__u64 *)&(sc)->regs->reg)
740 nvme_mmio_write_4((__u32 *)&(sc)->regs->reg, val)
743 nvme_mmio_write_8((__u64 *)&(sc)->regs->reg, val)
/haiku/src/add-ons/accelerants/ati/
H A Daccelerant.cpp41 gInfo.regsArea = clone_area("ATI regs area", (void**)&(gInfo.regs),
67 gInfo.regs = 0;

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