1/* 2 Copyright 1999, Be Incorporated. All Rights Reserved. 3 This file may be used under the terms of the Be Sample Code License. 4 5 Other authors: 6 Mark Watson, 7 Rudolf Cornelissen 8/2004-5/2005 8*/ 9 10#include "nv_std.h" 11 12int fd; 13shared_info *si; 14area_id shared_info_area; 15area_id dma_cmd_buf_area; 16vuint32 *regs; 17area_id regs_area; 18display_mode *my_mode_list; 19area_id my_mode_list_area; 20int accelerantIsClone; 21 22crtc_interrupt_enable head1_interrupt_enable; 23crtc_update_fifo head1_update_fifo; 24crtc_validate_timing head1_validate_timing; 25crtc_set_timing head1_set_timing; 26crtc_depth head1_depth; 27crtc_dpms head1_dpms; 28crtc_set_display_pitch head1_set_display_pitch; 29crtc_set_display_start head1_set_display_start; 30crtc_cursor_init head1_cursor_init; 31crtc_cursor_show head1_cursor_show; 32crtc_cursor_hide head1_cursor_hide; 33crtc_cursor_define head1_cursor_define; 34crtc_cursor_position head1_cursor_position; 35crtc_stop_tvout head1_stop_tvout; 36crtc_start_tvout head1_start_tvout; 37 38crtc_interrupt_enable head2_interrupt_enable; 39crtc_update_fifo head2_update_fifo; 40crtc_validate_timing head2_validate_timing; 41crtc_set_timing head2_set_timing; 42crtc_depth head2_depth; 43crtc_dpms head2_dpms; 44crtc_set_display_pitch head2_set_display_pitch; 45crtc_set_display_start head2_set_display_start; 46crtc_cursor_init head2_cursor_init; 47crtc_cursor_show head2_cursor_show; 48crtc_cursor_hide head2_cursor_hide; 49crtc_cursor_define head2_cursor_define; 50crtc_cursor_position head2_cursor_position; 51crtc_stop_tvout head2_stop_tvout; 52crtc_start_tvout head2_start_tvout; 53 54dac_mode head1_mode; 55dac_palette head1_palette; 56dac_set_pix_pll head1_set_pix_pll; 57dac_pix_pll_find head1_pix_pll_find; 58 59dac_mode head2_mode; 60dac_palette head2_palette; 61dac_set_pix_pll head2_set_pix_pll; 62dac_pix_pll_find head2_pix_pll_find; 63 64nv_get_set_pci nv_pci_access= 65 { 66 NV_PRIVATE_DATA_MAGIC, 67 0, 68 4, 69 0 70 }; 71 72nv_in_out_isa nv_isa_access= 73 { 74 NV_PRIVATE_DATA_MAGIC, 75 0, 76 1, 77 0 78 }; 79