radeon_hd: Add handling of connector routing

* A first attempt at improving on #17377
* We haven't actually seen any cards using this
routing stuff yet pre-navi.
* We don't use the router information yet... but this might
improve things a bit on new cards.

Change-Id: I17962dfd8bb09e619a6084cd9571ccb9832fb19a
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4697
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>

radeon_hd: Fix GPIOInfo pin shortage on some cards

* Some cards have a lot of pins!
* Should fix #10536
* Add a check to give a friendy warning if we find
more GPIO pins than what we are prepared for.
* Technically the maximum GPIO pins could be
ATOM device max * 2 (16 for i2c and other)
however lets leave some room for expansion.

radeon_hd: Rework dp aux functions to take connector index

* This is less pretty, but we need access to the connector
to find the HPD gpio pin mask on the card.
* dp_aux communications seem to work again.
* If you have a DisplayPort item attached to your card you
may want to just unplug it at this point. We attempt DP
link training and it fails. This failure will also cause
other monitors to not function as app_server still isn't
multi-head aware (#10486)

radeon_hd: More gpio rework

* Bump i2c data into it's own struct
* Populate gGPIOInfo with general gpio pins
(for things like HPD, and voltage control)
* Attach HPD gpio pins to connectors
* Dump trace info of HPD pins as well as i2c pins

radeon_hd: Rework gpio pins

* There are GPIO pins for hotplug interrupts and i2c
communications (for edid). Add two fields to connector
(index for each in gGPIOInfo).
* DP aux communcation seems to want the hotplug GPIO pin
info, which we don't get (I think this is why DP AUX comms
is broken at the moment)
* GPIO LUT seems to know about a wide range of GPIO pins, while
the i2c gpio calls only know about the ones needed for i2c.
* I'm tempted to populate gGPIOInfo with the LUT pins and
then suplement that data with the i2c GPIO pins data.
(however, not sure how many pins there are generally defined
so it could impact performance. More investigation is needed)
This would reverse how it works now with this commit.

radeon_hd: clean up clock units

* Ensure we store all clock units as khz or
n * 10 off from AtomBIOS unit expected
* Perform DDC setup of external encoder

radeon_hd: clean up encoder object

* Encoder flags were 1:1 connector flags...
just look at connector flags.
* Record encoder capabilities
* Add function to check for dp 1.2 support

radeon_hd: Fix DisplayPort link training

* Original changes by Bill Randle
* Includes a large number of modifications
and cleanups.
* Add a "currentMode" to the gDisplay to
enable easier checking of intended changes.
(we pass the display_mode around quite a
bit, adding a "currentMode" allows code
to know the intended display mode being set
without passing the mode pointer around as
much)

radeon_hd: rework some pll code

* Force fractional feedback divider on APU's
* Spread Spectrum is now probed more correctly
across multiple encoders and cards
* SS still disabled however.

radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)

radeon_hd: display_info struct style cleanup

* No functional change

radeon_hd: More initial ring queue work

* Rename RenderQueue to RingQueue to be more generic
* We will need two Ring Buffer types, one for
host -> gpu (render/cp data) and one gpu -> host (irq)
* Add header guard to ringqueue.h
* Things still may change as I work up to a bigger picture.

radeon_hd: Move out some DisplayPort common code

* General DisplayPort functions in common dp.cpp
* DP port information struct in common header
* Please don't use this private accelerant common DP
code just yet as it is very early.

radeon_hd: Complete move to common DisplayPort header

* Non-spec DP stuff in accelerant displayport.h
* Common DisplayPort header still has TODO's however

radeon_hd: Add support for external encoders

* Some encoders are bridges (DVO) and some encoders
can act like bridges (UNIPHY). Probe for encoders
further out in the display path and set them up
properly.
* Debug output support for external encoders
* Fix cases where we should use external encoder
information vs main encoder info.

radeon_hd: Remove isHDMI, isTV. Unused.

Revert "radeon_hd: Convert encoders to pointers"

This reverts commit 5a1f9f0f16b2a4bef89b61b4e3e24bf0b53917da.

* Thinking on this a bit more, this is really a silly change as
I know the upper limit for number of valid encoders.
* Resolves a app_server crash introduced as well due to not
allocating encoder pointer.

radeon_hd: Convert encoders to pointers

* Preparation for multiple encoders per connector

radeon_hd: Start work on proper DP link training

* The AtomBIOS timeout fix has made my DP bridge
stop working
* The current DisplayPort code is a little lacking
on DP link training... I think thats the cause.
* This puts the first steps towards DP training
in place.
* I plan on trying to make some of this DP stuff
common accelerant stuff after it works.

radeon_hd: lvds, dvo, and hdmi encoder improvements

* Begin storing the lcd flags in lvds info call as the
encoder needs them.
* Fill out laptop / lvds todo in encoder code.
* Stub out dvo encoder calls, not sure use cases for dvo.

radeon_hd: Begin improvement on crtc state control

* Try to not blank the crtc when it is alreay disabled
* Clean up wording, active now present on display info
* Don't lock crtc when doing normal dpms calls, crtc
should only be locked during mode set / change

radeon_hd: Implement preferred mode

* Add preferredMode display mode to each display.
* If LVDS is detected, set preferredMode based on AtomBIOS
* Fixes blocker #8329 ?

Working towards DP connector support

* Lots of new DisplayPort functions
* Call DP link training during mode set
* Rename dp_info variables to be less redundant
* Make encoder_pick_dig accept connector ID and
then check parent display
* Encode/Decode DP link speed functions
* Calculate DP lanes
* Rewrite encoder_dig_setup
* Correct bitsPerChannel to bitsPerColor
* My TRAVIS DisplayPort -> LVDS bridge now works

Begin work powering up the DisplayPort connector

* Add new struct to store DP connector information
* DisplayPort Configuration Data is populated by setup function

GPIO info struct style cleanup, (hopefully) no functional change

Record encoder link enumeration

Pointer style cleanup; Variable consolidation

Include file style cleanup, no functional change

More work towards DP support.

* add DPBridge encoder flag and set during connector detection
* if external bridge found, do external DDC setup
* pass connectorIndex vs displayIndex to encoder_*_setup
* some of the DP AUX channel stuff should go into accelerant
common code some day like i2c.

Speak aux data via AtomBIOS call

* add function to speak DP AUX data via AtomBIOS call
* clean up connector index variable names

Style fix gpu_state naming, cleanup

* correct naming on gpu registers that effect MC idle state
* cleanup MC idle failure situation, we are stuck and
need to try the changes anyway.

* change the way we store GPU MC state information
on halt / resume as it doesn't need to persist.
* rename mc_info -> fb_info to better communicate
it's contents
* add some gart (gtt) storage and prep AGP VM code


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43212 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redesign pretty much everything frame buffer related
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
this is set properly (everything in mc_info is the MC view of FB BAR)
When vramStart is the FB physical address... i get proper video on some cards
... thoughts?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96

* take note of external encoders


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42893 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes
move quite a bit of code away from var_var format
* #if 0 some not-yet-ready r500 code
* no real functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42835 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
automatic crtc_id -> crtcID
automatic pll_id -> pllID
automatic encoder_id -> encoderID
automatic connector_index -> connectorIndex
automatic encoder_flags -> encoderFlags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42831 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add *very* preliminary dpms support
we will need to query the card dpms state
for each monitor at a later date


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42829 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info into pll_info struct.
* reduce the number of unique storage uint32's


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42826 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info onto encoder
* add atombios PLL adjustment code
* add initial PLL clock flags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42819 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move encoder info into own struct
* rename some connector / encoder struct members
* improve debugging in connector / encoder
AtomBIOS walking


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42815 a95241bf-73f2-0310-859d-f6bbb57e9c96

* RIP Radeon register banging
Remove old non-atombios code
* add encoder.c and encoder.h to handle
encoder management
* fix pll code to use encoder object id
vs crtcid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42797 a95241bf-73f2-0310-859d-f6bbb57e9c96

* squash a *silly* bug
don't set up a pointer and not malloc it.
* small cleanups to radeon_hd i2c bit-banging code
* i2c bit banging is now functioning


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42793 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remap GPIO pin storage to global struct as they really aren't tied to
a connector. (thus allowing for future non-ddc gpio devices like fan speed)
* map all i2c gpio pins on accelerant init
* use a smaller sub function to attach gpio info to connector i2c info


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42773 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correct some naming after deeper investigation of
linux drm driver. Seems radeon_hd isn't limited to the
standard 0xa0 i2c slave address.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42762 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove un-needed i2c_bus on each connector... we simply set this up each time
it's needed using the gpio information
* rename gpio information struct to be cleaner and shorter
* add function to debug found connectors
* set gpio mask to 1 vs the defined mask... this seems to get us closer
to working ddc / edid per connector
* change gpio_info u16's to u32's to ensure we aren't overflowing anything
* fix bug always setting hw_capable true
* change TRACE to ERROR to always show debug data when called


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42751 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correct naming error. (a shift is a shift until you use it.. then its a mask)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42745 a95241bf-73f2-0310-859d-f6bbb57e9c96

* refactor GPU i2c bit-banging code to be correct using drm as reference
* add i2c locking code that represents common things we need to do before
and after access


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42740 a95241bf-73f2-0310-859d-f6bbb57e9c96

* run edid check on all connectors regardless of encoder
* correction to output check (B_OK != true)
* check for invalid gpio (prevents seg violation)
* tab cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42727 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add i2c/ddc info storage to connector
* add edid info storage to display
* pass i2c/ddc information to common i2c code
* add code to read/write i2c/ddc
* i2c/ddc read/write code works 'in theory', needs tested
* detect monitors based on presence of edid on connector


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42718 a95241bf-73f2-0310-859d-f6bbb57e9c96

* find GPIO pin connector i2c is on for DDC / EDID
* add i2c_bus to connector information


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42708 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reformulate display and connector storage to match AtomBIOS requirements
* each active gDisplay references a gConnector index
* add atombios DAC sense.. this really won't be the main call used...
AtomBIOS expects you to attempt an EDID read to detect connected displays
* remove old manual DACSense
* next we attempt to add ddc / edid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42705 a95241bf-73f2-0310-859d-f6bbb57e9c96

* complete encoder detection
* need to break out connector and encoder addition into seperate functions as
the linux kernel did... that function is getting pretty large and deep.
* my card seems to map everything as TV DAC or TMDS... weird.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42684 a95241bf-73f2-0310-859d-f6bbb57e9c96

* as we are doing a lot of math on bios in gAtomContext, lets make it a
uint8 vs a void pointer.
* guys at AMD confirmed that the method looking directly at the object table
should be the only method used on modern cards (r600 or later)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42683 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add gConnector for card connector storage
* add detect_connectors to detect card connectors
* add infinitely compex detect_connectors_manual
(used when detect_connectors fails)
* add missing AtomBIOS header


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42670 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correction to AtomBIOS register loopback calls
* cail calls have their registers multiplied by 4
* solves infinite loops


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42647 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* create area for AtomBIOS
* clone mapped AtomBIOS area into accelerant


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42560 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move obtaining / copying the vga bios into the driver.
* add missing r500 header
* replace r600 headers with newer one from kernel


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42554 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move bios functions into bios.cpp
* implement various methods to pull AtomBIOS from card
* add some missing registers to headers from linux drm driver


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42553 a95241bf-73f2-0310-859d-f6bbb57e9c96

* refactor accelerant debugging
* clone VGA rom shared area in accelerant
* enable access, and make a copy of the VGA bios
* give malloc'ed VGA bios pointer to AtomBIOS parser
* Still invalid BIOS magic
* TODO : Move atomBIOS pointer and reorganize some stuff


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42550 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move bios_info into shared info
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add LVDS handling for TMDSB
* Fix crash situation if no monitors detected
* Assume TMDSB if no monitors sensed (temporary)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42508 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Small bit of comment cleanup
* Rename crt_info display_info


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42463 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Large refactoring of display detection and storage
* Create new display.c/h for display management
* Rename global gCRT to gDisplay
* Add CRT connection type into gDisplay
* Add CRT connection index into gDisplay
* Refactor registers for each display into gDisplay via regs
* We now shouldn't freak out too badly on multi-monitors


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42462 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add mc.cpp for memory controller functions
* Remove read32MC as it doesn't apply to radeon cards >= r600
* Add tmds.cpp for tmds connected monitor management (current radeons
only have TMDSA for the moment) still needs TDMSPower, etc.
* Add some MC calls to mode.cpp, causes KDL so commented out atm.
* Add command to idle all DACs (although POWER_RESET doesn't do
anything on DACs, we should be consistent)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42416 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add D2 GRPH update lock register to priv headers
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Break DAC code into sperate source file
* Implement assigning DAC A/B to crt
* Clean up mode change code
* Still some pixel clock wierdness


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42205 a95241bf-73f2-0310-859d-f6bbb57e9c96

* malloc an array of pointers to hold active crt info, mode, limits, etc.
Plan to move gRegister into the crt struct at some point.
* Few style fixes
* Added function to probe edid of attached monitors and populate CRT info
* Disable VGA control modifications temporarly while I hammer out some issues.
* Fix radeon card model checks (bitwise & is not |)
* Finally fix? blanking start / end calculations using porch
* Use mask for setting sync polarity
* Add overscan (8 pixels is default?)
* Disable PLLSet/Power for the moment as it seems to muck things up.
* is_mode_supported now validates if a mode line is with the monitors
h/v sync frequencies (how does is_mode_supported know what crt the os wants?)
* PLL Write/Read don't actually use the PLL Write/Read functions (thanks AMD!)
* Added better PLL legacy (r600-r610) support
* Consistantly give no DCCG on legacy cards.
* Tracing!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42191 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move to common MMIO function set to make card subsystem access easier

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42159 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Repair style issue using uintNN_t vs uintNN
* Make index numbering consistant (0-n vs 1-n)
* Add a little more tracing to PLLCalibrate because
we were missing a failure situation


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42158 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Define default PLL ranges
* Add crtid to register struct
* Disable VGA mode on FrameBuffer set (enables extended mode setting)
* Disable blanking calculations and setting more gracefully via if 0
* Add a *large* amount of code to Set/Calculate/Calibrate PLL
* Disable PLL on removal of accel.
* Remove junk comments on overscan
* Enable pixel clock limit pulling
* write32AtMask style cleanup
* Rename ReadMC to be more consistant
(I need to adjust naming for these MMIO calls)
* Implement read/write MC. (so many hardcoded oneoffs AMD)
* Implement write32PLLAtMask MMIO call


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42146 a95241bf-73f2-0310-859d-f6bbb57e9c96

added scale update locking register; remove leftover intel hack thats not needed on Radeon; fix gcc4 warning on card model comparison

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41872 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add surface address high handling; set primary and secondary surface frame buffer offset

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41769 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move all register calculation into init_registers to
keep things simple to troubleshoot
* use crt offset only on evergreen, else use AMD provided
register locations
* init_registers(crtid) is called before making register calls
to a monitor.
* init_registers supports 1-2 displays on r600-r700
* init_registers supports 1-6 displays on r800+ (AMD eyefinity)
* restore CardBlankSet function in a more simple form
(still needs init_registers addition)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41757 a95241bf-73f2-0310-859d-f6bbb57e9c96

add viewport registers; correct chipset dependent scale code; rename virtualheight to make it more consistant; spell check

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41557 a95241bf-73f2-0310-859d-f6bbb57e9c96

* enhance tracing of accelerant
* introduce a global struct to hold register locations for
Radeon HD chipset model this accelerant was spawned for.
* add Radeon 5430 PCIID


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41555 a95241bf-73f2-0310-859d-f6bbb57e9c96

correct incorrect read location of PLL data

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41467 a95241bf-73f2-0310-859d-f6bbb57e9c96

* use common accelerant code
* remove manual sDisplayMode and make use of mode_list_area via Axel's common accelerant code using vesa as example
* move mask enabled write32 function to accelerant with write32 calls
* move register offsets into mode.h headers
* rename DxMode* to CardMode*
* make adjustments and implement radeon hd mode setting further
* remove previously defined kStdModeTimings
* hardware mode setting still needs work


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41374 a95241bf-73f2-0310-859d-f6bbb57e9c96

added header file for mode.cpp; change gDisplayMode to pointer for now; add function to quickly perform sanity check on mode lines; enhance tracing

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41334 a95241bf-73f2-0310-859d-f6bbb57e9c96

stub out Read/Write MC, add functional Read/Write PLL

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41172 a95241bf-73f2-0310-859d-f6bbb57e9c96

pre-work style cleanup; no functional change

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41028 a95241bf-73f2-0310-859d-f6bbb57e9c96

Start to cleanup radeon_hd driver.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36393 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress of a Radeon HD 3200 driver to change the display mode (status when I leave the coding spring). At least it shows a picture but with a wrong scaling.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36243 a95241bf-73f2-0310-859d-f6bbb57e9c96

radeon_hd: Fix GPIOInfo pin shortage on some cards

* Some cards have a lot of pins!
* Should fix #10536
* Add a check to give a friendy warning if we find
more GPIO pins than what we are prepared for.
* Technically the maximum GPIO pins could be
ATOM device max * 2 (16 for i2c and other)
however lets leave some room for expansion.

radeon_hd: Rework dp aux functions to take connector index

* This is less pretty, but we need access to the connector
to find the HPD gpio pin mask on the card.
* dp_aux communications seem to work again.
* If you have a DisplayPort item attached to your card you
may want to just unplug it at this point. We attempt DP
link training and it fails. This failure will also cause
other monitors to not function as app_server still isn't
multi-head aware (#10486)

radeon_hd: More gpio rework

* Bump i2c data into it's own struct
* Populate gGPIOInfo with general gpio pins
(for things like HPD, and voltage control)
* Attach HPD gpio pins to connectors
* Dump trace info of HPD pins as well as i2c pins

radeon_hd: Rework gpio pins

* There are GPIO pins for hotplug interrupts and i2c
communications (for edid). Add two fields to connector
(index for each in gGPIOInfo).
* DP aux communcation seems to want the hotplug GPIO pin
info, which we don't get (I think this is why DP AUX comms
is broken at the moment)
* GPIO LUT seems to know about a wide range of GPIO pins, while
the i2c gpio calls only know about the ones needed for i2c.
* I'm tempted to populate gGPIOInfo with the LUT pins and
then suplement that data with the i2c GPIO pins data.
(however, not sure how many pins there are generally defined
so it could impact performance. More investigation is needed)
This would reverse how it works now with this commit.

radeon_hd: clean up clock units

* Ensure we store all clock units as khz or
n * 10 off from AtomBIOS unit expected
* Perform DDC setup of external encoder

radeon_hd: clean up encoder object

* Encoder flags were 1:1 connector flags...
just look at connector flags.
* Record encoder capabilities
* Add function to check for dp 1.2 support

radeon_hd: Fix DisplayPort link training

* Original changes by Bill Randle
* Includes a large number of modifications
and cleanups.
* Add a "currentMode" to the gDisplay to
enable easier checking of intended changes.
(we pass the display_mode around quite a
bit, adding a "currentMode" allows code
to know the intended display mode being set
without passing the mode pointer around as
much)

radeon_hd: rework some pll code

* Force fractional feedback divider on APU's
* Spread Spectrum is now probed more correctly
across multiple encoders and cards
* SS still disabled however.

radeon_hd: reorganize some pll code

* Move DisplayPort external pixel clock out of pll
as this frequency is card-wide.
* Add new function to pull display clock frequency
and other card-wide settings.
* Set displayDefault frequency card-wide
* My DisplayPort LVDS bridge laptop now kind of works
(a clock somewhere seems a little off though)

radeon_hd: display_info struct style cleanup

* No functional change

radeon_hd: More initial ring queue work

* Rename RenderQueue to RingQueue to be more generic
* We will need two Ring Buffer types, one for
host -> gpu (render/cp data) and one gpu -> host (irq)
* Add header guard to ringqueue.h
* Things still may change as I work up to a bigger picture.

radeon_hd: Move out some DisplayPort common code

* General DisplayPort functions in common dp.cpp
* DP port information struct in common header
* Please don't use this private accelerant common DP
code just yet as it is very early.

radeon_hd: Complete move to common DisplayPort header

* Non-spec DP stuff in accelerant displayport.h
* Common DisplayPort header still has TODO's however

radeon_hd: Add support for external encoders

* Some encoders are bridges (DVO) and some encoders
can act like bridges (UNIPHY). Probe for encoders
further out in the display path and set them up
properly.
* Debug output support for external encoders
* Fix cases where we should use external encoder
information vs main encoder info.

radeon_hd: Remove isHDMI, isTV. Unused.

Revert "radeon_hd: Convert encoders to pointers"

This reverts commit 5a1f9f0f16b2a4bef89b61b4e3e24bf0b53917da.

* Thinking on this a bit more, this is really a silly change as
I know the upper limit for number of valid encoders.
* Resolves a app_server crash introduced as well due to not
allocating encoder pointer.

radeon_hd: Convert encoders to pointers

* Preparation for multiple encoders per connector

radeon_hd: Start work on proper DP link training

* The AtomBIOS timeout fix has made my DP bridge
stop working
* The current DisplayPort code is a little lacking
on DP link training... I think thats the cause.
* This puts the first steps towards DP training
in place.
* I plan on trying to make some of this DP stuff
common accelerant stuff after it works.

radeon_hd: lvds, dvo, and hdmi encoder improvements

* Begin storing the lcd flags in lvds info call as the
encoder needs them.
* Fill out laptop / lvds todo in encoder code.
* Stub out dvo encoder calls, not sure use cases for dvo.

radeon_hd: Begin improvement on crtc state control

* Try to not blank the crtc when it is alreay disabled
* Clean up wording, active now present on display info
* Don't lock crtc when doing normal dpms calls, crtc
should only be locked during mode set / change

radeon_hd: Implement preferred mode

* Add preferredMode display mode to each display.
* If LVDS is detected, set preferredMode based on AtomBIOS
* Fixes blocker #8329 ?

Working towards DP connector support

* Lots of new DisplayPort functions
* Call DP link training during mode set
* Rename dp_info variables to be less redundant
* Make encoder_pick_dig accept connector ID and
then check parent display
* Encode/Decode DP link speed functions
* Calculate DP lanes
* Rewrite encoder_dig_setup
* Correct bitsPerChannel to bitsPerColor
* My TRAVIS DisplayPort -> LVDS bridge now works

Begin work powering up the DisplayPort connector

* Add new struct to store DP connector information
* DisplayPort Configuration Data is populated by setup function

GPIO info struct style cleanup, (hopefully) no functional change

Record encoder link enumeration

Pointer style cleanup; Variable consolidation

Include file style cleanup, no functional change

More work towards DP support.

* add DPBridge encoder flag and set during connector detection
* if external bridge found, do external DDC setup
* pass connectorIndex vs displayIndex to encoder_*_setup
* some of the DP AUX channel stuff should go into accelerant
common code some day like i2c.

Speak aux data via AtomBIOS call

* add function to speak DP AUX data via AtomBIOS call
* clean up connector index variable names

Style fix gpu_state naming, cleanup

* correct naming on gpu registers that effect MC idle state
* cleanup MC idle failure situation, we are stuck and
need to try the changes anyway.

* change the way we store GPU MC state information
on halt / resume as it doesn't need to persist.
* rename mc_info -> fb_info to better communicate
it's contents
* add some gart (gtt) storage and prep AGP VM code


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43212 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96

* redesign pretty much everything frame buffer related
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
this is set properly (everything in mc_info is the MC view of FB BAR)
When vramStart is the FB physical address... i get proper video on some cards
... thoughts?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96

* take note of external encoders


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42893 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes
move quite a bit of code away from var_var format
* #if 0 some not-yet-ready r500 code
* no real functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42835 a95241bf-73f2-0310-859d-f6bbb57e9c96

* style fixes, no functional change...
automatic crtc_id -> crtcID
automatic pll_id -> pllID
automatic encoder_id -> encoderID
automatic connector_index -> connectorIndex
automatic encoder_flags -> encoderFlags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42831 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add *very* preliminary dpms support
we will need to query the card dpms state
for each monitor at a later date


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42829 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info into pll_info struct.
* reduce the number of unique storage uint32's


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42826 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move pll info onto encoder
* add atombios PLL adjustment code
* add initial PLL clock flags


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42819 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move encoder info into own struct
* rename some connector / encoder struct members
* improve debugging in connector / encoder
AtomBIOS walking


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42815 a95241bf-73f2-0310-859d-f6bbb57e9c96

* RIP Radeon register banging
Remove old non-atombios code
* add encoder.c and encoder.h to handle
encoder management
* fix pll code to use encoder object id
vs crtcid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42797 a95241bf-73f2-0310-859d-f6bbb57e9c96

* squash a *silly* bug
don't set up a pointer and not malloc it.
* small cleanups to radeon_hd i2c bit-banging code
* i2c bit banging is now functioning


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42793 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remap GPIO pin storage to global struct as they really aren't tied to
a connector. (thus allowing for future non-ddc gpio devices like fan speed)
* map all i2c gpio pins on accelerant init
* use a smaller sub function to attach gpio info to connector i2c info


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42773 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correct some naming after deeper investigation of
linux drm driver. Seems radeon_hd isn't limited to the
standard 0xa0 i2c slave address.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42762 a95241bf-73f2-0310-859d-f6bbb57e9c96

* remove un-needed i2c_bus on each connector... we simply set this up each time
it's needed using the gpio information
* rename gpio information struct to be cleaner and shorter
* add function to debug found connectors
* set gpio mask to 1 vs the defined mask... this seems to get us closer
to working ddc / edid per connector
* change gpio_info u16's to u32's to ensure we aren't overflowing anything
* fix bug always setting hw_capable true
* change TRACE to ERROR to always show debug data when called


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42751 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correct naming error. (a shift is a shift until you use it.. then its a mask)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42745 a95241bf-73f2-0310-859d-f6bbb57e9c96

* refactor GPU i2c bit-banging code to be correct using drm as reference
* add i2c locking code that represents common things we need to do before
and after access


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42740 a95241bf-73f2-0310-859d-f6bbb57e9c96

* run edid check on all connectors regardless of encoder
* correction to output check (B_OK != true)
* check for invalid gpio (prevents seg violation)
* tab cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42727 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add i2c/ddc info storage to connector
* add edid info storage to display
* pass i2c/ddc information to common i2c code
* add code to read/write i2c/ddc
* i2c/ddc read/write code works 'in theory', needs tested
* detect monitors based on presence of edid on connector


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42718 a95241bf-73f2-0310-859d-f6bbb57e9c96

* find GPIO pin connector i2c is on for DDC / EDID
* add i2c_bus to connector information


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42708 a95241bf-73f2-0310-859d-f6bbb57e9c96

* reformulate display and connector storage to match AtomBIOS requirements
* each active gDisplay references a gConnector index
* add atombios DAC sense.. this really won't be the main call used...
AtomBIOS expects you to attempt an EDID read to detect connected displays
* remove old manual DACSense
* next we attempt to add ddc / edid


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42705 a95241bf-73f2-0310-859d-f6bbb57e9c96

* complete encoder detection
* need to break out connector and encoder addition into seperate functions as
the linux kernel did... that function is getting pretty large and deep.
* my card seems to map everything as TV DAC or TMDS... weird.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42684 a95241bf-73f2-0310-859d-f6bbb57e9c96

* as we are doing a lot of math on bios in gAtomContext, lets make it a
uint8 vs a void pointer.
* guys at AMD confirmed that the method looking directly at the object table
should be the only method used on modern cards (r600 or later)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42683 a95241bf-73f2-0310-859d-f6bbb57e9c96

* add gConnector for card connector storage
* add detect_connectors to detect card connectors
* add infinitely compex detect_connectors_manual
(used when detect_connectors fails)
* add missing AtomBIOS header


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42670 a95241bf-73f2-0310-859d-f6bbb57e9c96

* correction to AtomBIOS register loopback calls
* cail calls have their registers multiplied by 4
* solves infinite loops


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42647 a95241bf-73f2-0310-859d-f6bbb57e9c96

* introduce mc control calls
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96

* lots of changes
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96

* create area for AtomBIOS
* clone mapped AtomBIOS area into accelerant


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42560 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move obtaining / copying the vga bios into the driver.
* add missing r500 header
* replace r600 headers with newer one from kernel


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42554 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move bios functions into bios.cpp
* implement various methods to pull AtomBIOS from card
* add some missing registers to headers from linux drm driver


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42553 a95241bf-73f2-0310-859d-f6bbb57e9c96

* refactor accelerant debugging
* clone VGA rom shared area in accelerant
* enable access, and make a copy of the VGA bios
* give malloc'ed VGA bios pointer to AtomBIOS parser
* Still invalid BIOS magic
* TODO : Move atomBIOS pointer and reorganize some stuff


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42550 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move bios_info into shared info
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add LVDS handling for TMDSB
* Fix crash situation if no monitors detected
* Assume TMDSB if no monitors sensed (temporary)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42508 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Small bit of comment cleanup
* Rename crt_info display_info


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42463 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Large refactoring of display detection and storage
* Create new display.c/h for display management
* Rename global gCRT to gDisplay
* Add CRT connection type into gDisplay
* Add CRT connection index into gDisplay
* Refactor registers for each display into gDisplay via regs
* We now shouldn't freak out too badly on multi-monitors


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42462 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add mc.cpp for memory controller functions
* Remove read32MC as it doesn't apply to radeon cards >= r600
* Add tmds.cpp for tmds connected monitor management (current radeons
only have TMDSA for the moment) still needs TDMSPower, etc.
* Add some MC calls to mode.cpp, causes KDL so commented out atm.
* Add command to idle all DACs (although POWER_RESET doesn't do
anything on DACs, we should be consistent)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42416 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Add D2 GRPH update lock register to priv headers
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Break DAC code into sperate source file
* Implement assigning DAC A/B to crt
* Clean up mode change code
* Still some pixel clock wierdness


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42205 a95241bf-73f2-0310-859d-f6bbb57e9c96

* malloc an array of pointers to hold active crt info, mode, limits, etc.
Plan to move gRegister into the crt struct at some point.
* Few style fixes
* Added function to probe edid of attached monitors and populate CRT info
* Disable VGA control modifications temporarly while I hammer out some issues.
* Fix radeon card model checks (bitwise & is not |)
* Finally fix? blanking start / end calculations using porch
* Use mask for setting sync polarity
* Add overscan (8 pixels is default?)
* Disable PLLSet/Power for the moment as it seems to muck things up.
* is_mode_supported now validates if a mode line is with the monitors
h/v sync frequencies (how does is_mode_supported know what crt the os wants?)
* PLL Write/Read don't actually use the PLL Write/Read functions (thanks AMD!)
* Added better PLL legacy (r600-r610) support
* Consistantly give no DCCG on legacy cards.
* Tracing!


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42191 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Move to common MMIO function set to make card subsystem access easier

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42159 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Repair style issue using uintNN_t vs uintNN
* Make index numbering consistant (0-n vs 1-n)
* Add a little more tracing to PLLCalibrate because
we were missing a failure situation


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42158 a95241bf-73f2-0310-859d-f6bbb57e9c96

* Define default PLL ranges
* Add crtid to register struct
* Disable VGA mode on FrameBuffer set (enables extended mode setting)
* Disable blanking calculations and setting more gracefully via if 0
* Add a *large* amount of code to Set/Calculate/Calibrate PLL
* Disable PLL on removal of accel.
* Remove junk comments on overscan
* Enable pixel clock limit pulling
* write32AtMask style cleanup
* Rename ReadMC to be more consistant
(I need to adjust naming for these MMIO calls)
* Implement read/write MC. (so many hardcoded oneoffs AMD)
* Implement write32PLLAtMask MMIO call


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42146 a95241bf-73f2-0310-859d-f6bbb57e9c96

added scale update locking register; remove leftover intel hack thats not needed on Radeon; fix gcc4 warning on card model comparison

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41872 a95241bf-73f2-0310-859d-f6bbb57e9c96

Add surface address high handling; set primary and secondary surface frame buffer offset

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41769 a95241bf-73f2-0310-859d-f6bbb57e9c96

* move all register calculation into init_registers to
keep things simple to troubleshoot
* use crt offset only on evergreen, else use AMD provided
register locations
* init_registers(crtid) is called before making register calls
to a monitor.
* init_registers supports 1-2 displays on r600-r700
* init_registers supports 1-6 displays on r800+ (AMD eyefinity)
* restore CardBlankSet function in a more simple form
(still needs init_registers addition)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41757 a95241bf-73f2-0310-859d-f6bbb57e9c96

add viewport registers; correct chipset dependent scale code; rename virtualheight to make it more consistant; spell check

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41557 a95241bf-73f2-0310-859d-f6bbb57e9c96

* enhance tracing of accelerant
* introduce a global struct to hold register locations for
Radeon HD chipset model this accelerant was spawned for.
* add Radeon 5430 PCIID


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41555 a95241bf-73f2-0310-859d-f6bbb57e9c96

correct incorrect read location of PLL data

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41467 a95241bf-73f2-0310-859d-f6bbb57e9c96

* use common accelerant code
* remove manual sDisplayMode and make use of mode_list_area via Axel's common accelerant code using vesa as example
* move mask enabled write32 function to accelerant with write32 calls
* move register offsets into mode.h headers
* rename DxMode* to CardMode*
* make adjustments and implement radeon hd mode setting further
* remove previously defined kStdModeTimings
* hardware mode setting still needs work


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41374 a95241bf-73f2-0310-859d-f6bbb57e9c96

added header file for mode.cpp; change gDisplayMode to pointer for now; add function to quickly perform sanity check on mode lines; enhance tracing

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41334 a95241bf-73f2-0310-859d-f6bbb57e9c96

stub out Read/Write MC, add functional Read/Write PLL

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41172 a95241bf-73f2-0310-859d-f6bbb57e9c96

pre-work style cleanup; no functional change

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41028 a95241bf-73f2-0310-859d-f6bbb57e9c96

Start to cleanup radeon_hd driver.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36393 a95241bf-73f2-0310-859d-f6bbb57e9c96

Work in progress of a Radeon HD 3200 driver to change the display mode (status when I leave the coding spring). At least it shows a picture but with a wrong scaling.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36243 a95241bf-73f2-0310-859d-f6bbb57e9c96