/freebsd-11-stable/sys/dev/etherswitch/arswitch/ |
H A D | arswitch_reg.c | 66 uint16_t *reg) 73 *reg = (addr >> 1) & 0x1f; 90 uint16_t phy, reg; local 92 arswitch_split_setpage(dev, addr, &phy, ®); 93 return (MDIO_READREG(device_get_parent(dev), 0x10 | phy, reg)); 102 uint16_t phy, reg; local 104 arswitch_split_setpage(dev, addr, &phy, ®); 105 return (MDIO_WRITEREG(device_get_parent(dev), 0x10 | phy, reg, data)); 138 arswitch_reg_read32(device_t dev, int phy, int reg) argument 141 lo = MDIO_READREG(device_get_parent(dev), phy, reg); 65 arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy, uint16_t *reg) argument 148 arswitch_reg_write32(device_t dev, int phy, int reg, uint32_t value) argument 176 uint16_t phy, reg; local 186 uint16_t phy, reg; local 233 uint16_t phy, reg; local 247 uint16_t phy, reg; local [all...] |
/freebsd-11-stable/sys/arm/freescale/vybrid/ |
H A D | vf_spi.c | 151 uint32_t reg; local 164 reg = READ4(sc, SPI_MCR); 165 reg |= MCR_MSTR; 166 reg &= ~(MCR_CONT_SCKE | MCR_MDIS | MCR_FRZ); 167 reg &= ~(MCR_PCSIS_M << MCR_PCSIS_S); 168 reg |= (MCR_PCSIS_M << MCR_PCSIS_S); /* PCS Active low */ 169 reg |= (MCR_CLR_TXF | MCR_CLR_RXF); 170 WRITE4(sc, SPI_MCR, reg); 172 reg = READ4(sc, SPI_RSER); 173 reg | 211 uint32_t reg, wreg; local [all...] |
H A D | vf_adc.c | 57 #define ADC_HC0 0x00 /* Ctrl reg for hardware triggers */ 58 #define ADC_HC1 0x04 /* Ctrl reg for hardware triggers */ 65 #define ADC_R0 0x0C /* Data result reg for HW triggers */ 66 #define ADC_R1 0x10 /* Data result reg for HW triggers */ 169 int reg; local 175 reg = READ4(sc, ADC_HC0); 176 reg &= ~(HC_ADCH_M << HC_ADCH_S); 177 reg |= (channel << HC_ADCH_S); 178 WRITE4(sc, ADC_HC0, reg); 188 int reg; local [all...] |
/freebsd-11-stable/sys/dev/mii/ |
H A D | e1000phy.c | 187 uint16_t reg, page; local 189 reg = PHY_READ(sc, E1000_SCR); 191 reg &= ~E1000_SCR_AUTO_X_MODE; 192 PHY_WRITE(sc, E1000_SCR, reg); 197 reg = PHY_READ(sc, E1000_SCR); 198 reg &= ~E1000_SCR_MODE_MASK; 199 reg |= E1000_SCR_MODE_1000BX; 200 PHY_WRITE(sc, E1000_SCR, reg); 204 reg = PHY_READ(sc, E1000_SCR); 205 reg | 309 int reg; local 475 uint16_t reg; local [all...] |
/freebsd-11-stable/contrib/gcc/ |
H A D | conflict.c | 35 #include "hard-reg-set.h" 50 - The two reg numbers for each arc are hashed into a single 56 linked lists by single reg number. Since each arc references 58 smaller-numbered reg and one for the larger-numbered reg. This 69 smaller-numbered reg, as an index in the table of arcs of this 74 larger-numbered reg, as an index in the table of arcs of this 78 /* The smaller-numbered reg involved in this conflict. */ 81 /* The larger-numbered reg involved in this conflict. */ 99 /* For each reg, th 241 conflict_graph_enum(conflict_graph graph, int reg, conflict_graph_enum_fn enum_fn, void *extra) argument 299 int reg; member in struct:print_context 311 int reg; local 343 int reg; local [all...] |
/freebsd-11-stable/sys/arm/lpc/ |
H A D | lpc_intc.c | 163 int reg; local 171 reg = LPC_INTC_SIC2_ER; 174 reg = LPC_INTC_SIC1_ER; 176 reg = LPC_INTC_MIC_ER; 179 value = intc_read_4(sc, reg); 181 intc_write_4(sc, reg, value); 188 int reg; local 193 reg = LPC_INTC_SIC2_ER; 196 reg = LPC_INTC_SIC1_ER; 198 reg 210 int reg; local [all...] |
/freebsd-11-stable/tools/tools/ath/arcode/ |
H A D | arcode.c | 47 printf("read\t%.8x = %.8x\n", a->reg, a->val); 53 printf("write\t%.8x = %.8x\n", a->reg, a->val); 59 printf("device\t0x%x/0x%x\n", a->reg, a->val); 66 if (a->reg <= MAX_MARKERS) 67 s = markers[a->reg]; 69 printf("mark\t%s (%d): %d\n", s, a->reg, a->val); 109 printf("op: %d; reg: 0x%x; val: 0x%x\n", 110 a.op, a.reg, a.val);
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/freebsd-11-stable/usr.bin/truss/ |
H A D | sparc64-freebsd.c | 41 #include <machine/reg.h> 55 struct reg regs; 58 u_int i, reg; local 75 reg = 0; 79 reg = 1; 83 for (i = 0; i < narg && reg < 6; i++, reg++) 84 cs->args[i] = regs.r_out[reg]; 102 struct reg regs;
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H A D | powerpc64-freebsd.c | 36 #include <machine/reg.h> 49 struct reg regs; 52 u_int i, reg; local 69 reg = 0; 73 reg += 1; 77 for (i = 0; i < narg && reg < NARGREG; i++, reg++) 78 cs->args[i] = regs.fixreg[FIRSTARG + reg]; 95 struct reg regs;
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H A D | amd64-freebsd.c | 40 #include <machine/reg.h> 53 struct reg regs; 56 u_int i, reg; local 74 reg = 0; 78 reg++; 82 for (i = 0; i < narg && reg < 6; i++, reg++) { 83 switch (reg) { 108 struct reg regs;
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/freebsd-11-stable/sys/arm/samsung/exynos/ |
H A D | exynos5_usb_phy.c | 177 int reg; local 182 reg = READ4(sc, USB_DRD_PHYPARAM0); 184 reg &= ~(PHYPARAM0_REF_USE_PAD); 185 reg &= ~(PHYPARAM0_REF_LOSLEVEL_MASK); 186 reg |= (PHYPARAM0_REF_LOSLEVEL); 187 WRITE4(sc, USB_DRD_PHYPARAM0, reg); 190 reg = (LINKSYSTEM_XHCI_VERSION_CTRL | 192 WRITE4(sc, USB_DRD_LINKSYSTEM, reg); 194 reg = READ4(sc, USB_DRD_PHYPARAM1); 195 reg [all...] |
H A D | exynos5_i2c.c | 141 int reg; local 143 reg = READ1(sc, I2CCON); 144 reg &= ~(IPEND); 145 WRITE1(sc, I2CCON, reg); 154 int reg; local 181 reg = (RXTX_EN); 182 reg |= (I2CMODE_MT << I2CMODE_S); 183 WRITE1(sc, I2CSTAT, reg); 194 int reg; local 198 reg 242 int reg; local 305 int reg; local 357 int reg; local [all...] |
/freebsd-11-stable/sys/riscv/include/ |
H A D | reg.h | 40 struct reg { struct 64 int fill_regs(struct thread *, struct reg *); 65 int set_regs(struct thread *, struct reg *);
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/freebsd-11-stable/sys/mips/nlm/hal/ |
H A D | mips-extns.h | 118 #define read_c0_register32(reg, sel) \ 126 : "=r" (__rv) : "i" (reg), "i" (sel) ); \ 130 #define write_c0_register32(reg, sel, value) \ 136 : : "r" (value), "i" (reg), "i" (sel) ); 142 #define read_c0_register64(reg, sel) \ 150 : "=r" (__rv) : "i" (reg), "i" (sel) ); \ 154 #define write_c0_register64(reg, sel, value) \ 160 : : "r" (value), "i" (reg), "i" (sel) ); 166 #define read_c0_register64(reg, sel) \ 177 : "=r"(__high), "=r"(__low): "i"(reg), " [all...] |
/freebsd-11-stable/sys/tools/ |
H A D | fw_stub.awk | 172 reg = "\t\tfp = "; 173 reg = reg "firmware_register(\"" short "\", _binary_" symb "_start , "; 174 reg = reg "(size_t)(_binary_" symb "_end - _binary_" symb "_start), "; 175 reg = reg version ", "; 178 reg = reg "NULL);"; 180 reg [all...] |
/freebsd-11-stable/sys/dev/e1000/ |
H A D | e1000_osdep.h | 140 #define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \ 141 ? reg : e1000_translate_register_82542(reg)) 157 #define E1000_READ_REG(hw, reg) \ 160 E1000_REGISTER(hw, reg)) 162 #define E1000_WRITE_REG(hw, reg, value) \ 165 E1000_REGISTER(hw, reg), value) 167 #define E1000_READ_REG_ARRAY(hw, reg, index) \ 170 E1000_REGISTER(hw, reg) + ((index)<< 2)) 172 #define E1000_WRITE_REG_ARRAY(hw, reg, inde [all...] |
/freebsd-11-stable/sys/dev/wl/ |
H A D | if_wl.h | 100 #define WL_READ_1(sc, reg) bus_read_1((sc)->res_ioport, (reg)) 101 #define WL_READ_2(sc, reg) bus_read_2((sc)->res_ioport, (reg)) 102 #define WL_READ_MULTI_2(sc, reg, buf, len) \ 103 bus_read_multi_2((sc)->res_ioport, (reg), (uint16_t *)(buf), (len)) 104 #define WL_WRITE_1(sc, reg, val) \ 105 bus_write_1((sc)->res_ioport, (reg), (val)) 106 #define WL_WRITE_2(sc, reg, val) \ 107 bus_write_2((sc)->res_ioport, (reg), (va [all...] |
/freebsd-11-stable/sys/arm/include/ |
H A D | reg.h | 1 /* $NetBSD: reg.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */ 2 /* $FreeBSD: stable/11/sys/arm/include/reg.h 317005 2017-04-16 07:33:47Z mmel $ */ 6 struct reg { struct 34 int fill_regs(struct thread *, struct reg *); 35 int set_regs(struct thread *, struct reg *);
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterContextPOSIX_s390x.cpp | 72 bool RegisterContextPOSIX_s390x::IsGPR(unsigned reg) { argument 73 return reg <= m_reg_info.last_gpr; // GPRs come first. 76 bool RegisterContextPOSIX_s390x::IsFPR(unsigned reg) { argument 77 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr); 112 RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg) { argument 113 if (reg < m_reg_info.num_registers) 114 return &GetRegisterInfo()[reg]; 123 unsigned RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg) { argument 124 assert(reg < m_reg_inf [all...] |
/freebsd-11-stable/sys/arm/altera/socfpga/ |
H A D | socfpga_manager.c | 166 int reg; local 168 reg = READ4(sc, FPGAMGR_STAT); 169 reg >>= STAT_MODE_SHIFT; 170 reg &= STAT_MODE_MASK; 172 return reg; 201 int reg; local 222 reg = READ4(sc, FPGAMGR_CTRL); 223 reg &= ~(CTRL_CDRATIO_MASK << CTRL_CDRATIO_SHIFT); 224 reg |= (mode->cdratio << CTRL_CDRATIO_SHIFT); 225 reg 301 int reg; local [all...] |
/freebsd-11-stable/sys/dev/isci/scil/ |
H A D | scic_sds_controller_registers.h | 75 #define scic_sds_controller_smu_register_read(controller, reg) \ 78 (controller)->smu_registers->reg \ 81 #define scic_sds_controller_smu_register_write(controller, reg, value) \ 84 (controller)->smu_registers->reg, \ 93 #define scu_afe_register_write(controller, reg, value) \ 96 (controller)->scu_registers->afe.reg, \ 100 #define scu_afe_register_read(controller, reg) \ 103 (controller)->scu_registers->afe.reg \ 111 #define scu_sgpio_peg0_register_read(controller, reg) \ 114 (controller)->scu_registers->peg0.sgpio.reg \ [all...] |
/freebsd-11-stable/sys/dev/ath/ |
H A D | ah_osdep.c | 146 ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg) argument 149 if (reg >= 0x4000 && reg < 0x5000) 151 if (reg >= 0x6000 && reg < 0x7000) 153 if (reg >= 0x7000 && reg < 0x8000) 254 r->reg = 0; 268 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) argument 275 if (! ath_hal_reg_whilst_asleep(ah, reg) 302 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) argument 366 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) argument 389 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) argument [all...] |
/freebsd-11-stable/contrib/gcc/config/sparc/ |
H A D | linux-unwind.h | 61 fs->regs.reg[i].how = REG_SAVED_OFFSET; 62 fs->regs.reg[i].loc.offset = 67 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; 68 fs->regs.reg[i + 16].loc.offset = 77 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; 78 fs->regs.reg[i + 32].loc.offset = 83 fs->regs.reg[0].how = REG_SAVED_OFFSET; 84 fs->regs.reg[0].loc.offset = 132 fs->regs.reg[i].how = REG_SAVED_OFFSET; 133 fs->regs.reg[ [all...] |
/freebsd-11-stable/sys/dev/drm/ |
H A D | sis_drv.h | 58 #define SIS_READ(reg) DRM_READ32(SIS_BASE, reg); 59 #define SIS_WRITE(reg, val) DRM_WRITE32(SIS_BASE, reg, val);
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/freebsd-11-stable/sys/arm/freescale/imx/ |
H A D | imx6_pl310.c | 47 uint32_t reg; local 54 reg = pl310_read4(sc, PL310_POWER_CTRL); 55 reg |= POWER_CTRL_ENABLE_GATING | POWER_CTRL_ENABLE_STANDBY; 56 pl310_write4(sc, PL310_POWER_CTRL, reg);
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