Searched refs:chips (Results 76 - 100 of 121) sorted by relevance

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/linux-master/drivers/mtd/maps/
H A Damd76xrom.c5 * Normal mappings of chips in physical memory
184 /* Loop through and look for rom chips */
259 cfi->chips[i].start += offset;
348 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");
H A Desb2rom.c5 * Normal mappings of flash chips in physical memory
274 /* Loop through and look for rom chips */
351 cfi->chips[i].start += offset;
452 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ESB2 southbridge");
/linux-master/drivers/hwmon/
H A Dlm92.c26 * and Maxim MAX6633 and MAX6634 chips, which are mostly compatible
46 enum chips { lm92, max6635 }; enum
H A Dfschmd.c10 * Scylla, Heracles, Heimdall, Hades and Syleus chips
48 enum chips { fscpos, fscher, fscscy, fschrc, fschmd, fschds, fscsyl }; enum
98 * other chips, this order was in the 2.4 driver and kept for consistency.
263 enum chips kind;
1048 enum chips kind;
1090 enum chips kind = i2c_match_id(fschmd_id, client)->driver_data;
1119 /* Read the special DMI table for fscher and newer chips */
H A Dw83781d.c12 * Supports following chips:
49 enum chips { w83781d, w83782d, w83783s, as99127f }; enum
182 DIV_TO_REG(long val, enum chips type)
199 enum chips type;
854 enum chips kind = data->type;
1858 * chips. But only if we read 'undefined' registers.
H A Dlm78.c31 enum chips { lm78, lm79 }; enum
113 enum chips type;
595 /* Explicitly prevent the misdetection of Winbond chips */
851 * chips. But only if we read 'undefined' registers.
888 /* Explicitly prevent the misdetection of Winbond chips */
894 /* Explicitly prevent the misdetection of ITE chips */
H A Dmax6697.c22 enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694, enum
76 enum chips type;
H A Dgl518sm.c36 enum chips { gl518sm_r00, gl518sm_r80 }; enum
107 enum chips type;
/linux-master/drivers/net/ethernet/dec/tulip/
H A Dtulip.h75 enum chips { enum
353 Note: Some work-alike chips do not function correctly in chained mode.
/linux-master/drivers/mtd/nand/raw/
H A Darasan-nand-controller.c151 * @node: Used to store NAND chips into a list
199 * @chips: List of all NAND chips attached to the controller
215 struct list_head chips; member in struct:arasan_nfc
1341 list_add_tail(&anand->node, &nfc->chips);
1352 list_for_each_entry_safe(anand, tmp, &nfc->chips, node) {
1368 dev_err(nfc->dev, "Incorrect number of NAND chips (%d)\n",
1447 INIT_LIST_HEAD(&nfc->chips);
H A Ddenali.h339 * @chips: the list of chips attached to this controller
364 struct list_head chips; member in struct:denali_controller
H A Dfsl_ifc_nand.c43 struct fsl_ifc_mtd *chips[FSL_IFC_BANK_COUNT]; member in struct:fsl_ifc_nand_ctrl
502 * chips per bank.
960 ifc_nand_ctrl->chips[priv->bank] = NULL;
1038 ifc_nand_ctrl->chips[bank] = priv;
H A Dfsl_elbc_nand.c51 struct fsl_elbc_mtd *chips[MAX_BANKS]; member in struct:fsl_elbc_fcm_ctrl
120 * OOB {11, 5}, works for both SP and LP chips, with ECCM = 1 and ECCM = 0.
533 * chips per bank.
850 elbc_fcm_ctrl->chips[priv->bank] = NULL;
919 elbc_fcm_ctrl->chips[bank] = priv;
H A Drenesas-nand-controller.c222 struct list_head chips; member in struct:rnandc
1176 list_for_each_entry_safe(entry, temp, &rnandc->chips, node) {
1273 list_add_tail(&rnand->node, &rnandc->chips);
1289 list_for_each_entry_safe(entry, temp, &rnandc->chips, node) {
1332 INIT_LIST_HEAD(&rnandc->chips);
H A Dmeson_nand.c177 struct list_head chips; member in struct:meson_nfc
1441 list_add_tail(&meson_chip->node, &nfc->chips);
1451 while (!list_empty(&nfc->chips)) {
1452 meson_chip = list_first_entry(&nfc->chips,
1532 INIT_LIST_HEAD(&nfc->chips);
1573 dev_err(dev, "failed to init NAND chips\n");
H A Dsunxi_nand.c183 * @node: used to store NAND chips into a list
234 * @chips: a list containing all the NAND chips attached to this NAND
249 struct list_head chips; member in struct:sunxi_nfc
1926 while (!list_empty(&nfc->chips)) {
1927 sunxi_nand = list_first_entry(&nfc->chips,
2020 list_add_tail(&sunxi_nand->node, &nfc->chips);
2087 INIT_LIST_HEAD(&nfc->chips);
2144 dev_err(dev, "failed to init nand chips\n");
H A Dmarvell_nand.c328 * @node: Used to store NAND chips into a list
398 * @chips: List containing all the NAND chips attached to
414 struct list_head chips; member in struct:marvell_nfc
2751 list_add_tail(&marvell_nand->node, &nfc->chips);
2762 list_for_each_entry_safe(entry, temp, &nfc->chips, node) {
2785 dev_err(dev, "too many NAND chips: %d (max = %d CS)\n", nchips,
2953 INIT_LIST_HEAD(&nfc->chips);
3009 /* Init the controller and then probe the chips */
3053 list_for_each_entry(chip, &nfc->chips, nod
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/linux-master/include/linux/mtd/
H A Dcfi.h231 /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */
290 struct flchip chips[] __counted_by(numchips); /* per-chip data structure for each chip */
317 swapping the responses from different chips, and we are
333 swapping the responses from different chips, and we are
H A Dspinand.h238 * NAND chips coming from this vendor can be initialized properly.
250 * @chips: supported SPI NANDs under current manufacturer
251 * @nchips: number of SPI NANDs available in chips array
257 const struct spinand_info *chips; member in struct:spinand_manufacturer
326 * struct spinand_info - Structure used to describe SPI NAND chips
338 * multi-die chips
341 * describing all the chips supported by the driver.
/linux-master/drivers/mtd/nand/spi/
H A Dgigadevice.c544 .chips = gigadevice_spinand_table,
/linux-master/drivers/hwmon/pmbus/
H A Dmp2975.c92 enum chips { enum
104 enum chips chip_id;
109 enum chips chip_id;
H A Dzl6100.c20 enum chips { zl2004, zl2005, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105, enum
125 /* Some chips need a delay between accesses */
363 * supported chips are known to require a wait time between I2C
H A Dltc2978.c3 * Hardware monitoring driver for LTC2978 and compatible chips.
22 enum chips { enum
32 /* Common for all chips */
119 enum chips id;
937 MODULE_DESCRIPTION("PMBus driver for LTC2978 and compatible chips");
/linux-master/drivers/mtd/chips/
H A Dcfi_util.c254 /* QRY not found probably we deal with some odd CFI chips */
255 /* Some revisions of some old Intel chips? */
261 /* ST M29DW chips */
266 /* some old SST chips, e.g. 39VF160x/39VF320x */
301 __u32 base = 0; // cfi->chips[0].start;
418 ret = (*frob)(map, &cfi->chips[chipnum], adr, size, thunk);
/linux-master/drivers/regulator/
H A Dtps62360-regulator.c40 enum chips {TPS62360, TPS62361, TPS62362, TPS62363}; enum

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