Searched refs:topology (Results 76 - 100 of 177) sorted by path

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/linux-master/drivers/base/
H A Darch_topology.c3 * Arch specific cpu topology information
16 #include <linux/sched/topology.h>
248 cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "topology/cpu-capacity",
690 * When topology is provided cpu-map is essentially a root
704 * Check that all cores are in the topology; the SMP code will
722 * cpu topology table
H A Dcpu.c11 #include <linux/topology.h>
H A Dmemory.c16 #include <linux/topology.h>
H A Dnode.c16 #include <linux/topology.h>
H A Dtopology.c3 * driver/base/topology.c - Populate sysfs with cpu topology information
15 #include <linux/topology.h>
168 .name = "topology"
190 "base/topology:prepare", topology_add_dev,
/linux-master/drivers/base/test/
H A Dtest_async_driver_probe.c16 #include <linux/topology.h>
/linux-master/drivers/clk/zynqmp/
H A Dclkc.c65 * @node: Clock topology nodes
66 * @num_nodes: Number of nodes present in topology
91 u32 topology[CLK_GET_TOPOLOGY_RESP_WORDS]; member in struct:topology_resp
246 * zynqmp_pm_clock_get_topology() - Get the topology of clock for given id
248 * @index: Node index of clock topology
249 * @response: Buffer used for the topology response
251 * This function is used to get topology information for the clock
254 * This API will return 3 node of topology with a single response. To get
306 * @nodes: Clock topology node
402 * __zynqmp_clock_get_topology() - Get topology dat
410 __zynqmp_clock_get_topology(struct clock_topology *topology, struct topology_resp *response, u32 *nnodes) argument
445 zynqmp_clock_get_topology(u32 clk_id, struct clock_topology *topology, u32 *num_nodes) argument
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/linux-master/drivers/cpufreq/
H A Damd-pstate.c40 #include <linux/topology.h>
H A Dvexpress-spc-cpufreq.c24 #include <linux/topology.h>
/linux-master/drivers/cpuidle/governors/
H A Dteo.c140 #include <linux/sched/topology.h>
/linux-master/drivers/crypto/hisilicon/hpre/
H A Dhpre_main.c12 #include <linux/topology.h>
/linux-master/drivers/crypto/hisilicon/sec2/
H A Dsec_main.c15 #include <linux/topology.h>
/linux-master/drivers/crypto/hisilicon/zip/
H A Dzip_main.c13 #include <linux/topology.h>
/linux-master/drivers/firewire/
H A DMakefile7 core-iso.o core-topology.o core-transaction.o
/linux-master/drivers/firmware/psci/
H A Dpsci_checker.c22 #include <linux/topology.h>
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_psp.c1344 * Chips that support extended topology information require the driver to
1345 * reflect topology information in the opposite direction. This is
1393 struct psp_xgmi_topology_info *topology,
1402 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES)
1409 /* Fill in the shared memory with topology information as input */
1415 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id;
1416 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops;
1417 topology_info_input->nodes[i].is_sharing_enabled = topology->nodes[i].is_sharing_enabled;
1418 topology_info_input->nodes[i].sdma_engine = topology
1391 psp_xgmi_get_topology_info(struct psp_context *psp, int number_devices, struct psp_xgmi_topology_info *topology, bool get_extended_data) argument
1509 psp_xgmi_set_topology_info(struct psp_context *psp, int number_devices, struct psp_xgmi_topology_info *topology) argument
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H A Damdgpu_psp.h503 struct psp_xgmi_topology_info *topology,
507 struct psp_xgmi_topology_info *topology);
/linux-master/drivers/gpu/drm/
H A Ddrm_connector.c2329 * connectors have a topology and we want to allow userspace to give
3136 * @topology: 8-bytes unique per monitor.
3144 const char topology[8])
3151 if (!memcmp(tg->group_data, topology, 8)) {
3166 * @topology: 8-bytes unique per monitor.
3175 const char topology[8])
3185 memcpy(tg->group_data, topology, 8);
3143 drm_mode_get_tile_group(struct drm_device *dev, const char topology[8]) argument
3174 drm_mode_create_tile_group(struct drm_device *dev, const char topology[8]) argument
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder.c167 * @topology: topology of the display
208 struct msm_display_topology topology; member in struct:dpu_encoder_virt
560 /* See dpu_encoder_get_topology, we only support 2:2:1 topology */
586 struct msm_display_topology topology = {0}; local
593 /* Datapath topology selection
605 topology.num_lm = 2;
607 topology.num_lm = 1;
609 topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1;
612 topology
640 struct msm_display_topology topology; local
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H A Ddpu_rm.c31 * @topology: selected topology for the display
34 struct msm_display_topology topology; member in struct:dpu_rm_requirements
266 if (!reqs->topology.num_dspp)
296 if (!reqs->topology.num_lm) {
297 DPU_ERROR("invalid number of lm: %d\n", reqs->topology.num_lm);
303 lm_count < reqs->topology.num_lm; i++) {
319 if (lm_count < reqs->topology.num_lm) {
341 if (lm_count != reqs->topology.num_lm) {
350 reqs->topology
660 dpu_rm_reserve( struct dpu_rm *rm, struct dpu_global_state *global_state, struct drm_encoder *enc, struct drm_crtc_state *crtc_state, struct msm_display_topology topology) argument
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H A Ddpu_rm.h59 * topology control properties, and reserve hardware blocks to that
66 * @topology: Pointer to topology info for the display
73 struct msm_display_topology topology);
/linux-master/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga3d_dx.h381 SVGA3dPrimitiveType topology; member in struct:SVGA3dCmdDXSetTopology
1639 uint32 topology; member in struct:SVGADXInputAssemblyMobFormat
/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_debugfs.c127 static int topology(struct xe_gt *gt, struct drm_printer *p) function
252 {"topology", .show = xe_gt_debugfs_simple_show, .data = topology},
/linux-master/drivers/hwmon/
H A Dfam15h_power.c20 #include <linux/topology.h>
141 * With the new x86 topology modelling, cpu core id actually
209 * With the new x86 topology modelling, x86_max_cores is the
/linux-master/drivers/infiniband/hw/hfi1/
H A Daffinity.c6 #include <linux/topology.h>

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