/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_gt_irq.c | 124 const u16 intr = GEN11_INTR_ENGINE_INTR(identity); local 126 if (unlikely(!intr)) 138 return intel_engine_cs_irq(engine, intr); 142 return gen11_other_irq_handler(gt, instance, intr); 144 WARN_ONCE(1, "unknown interrupt class=0x%x, instance=0x%x, intr=0x%x\n", 145 class, instance, intr);
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_gem_ww.c | 9 void i915_gem_ww_ctx_init(struct i915_gem_ww_ctx *ww, bool intr) argument 13 ww->intr = intr; 50 if (ww->intr)
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H A D | i915_gem_ww.h | 14 bool intr; member in struct:i915_gem_ww_ctx 17 void i915_gem_ww_ctx_init(struct i915_gem_ww_ctx *ctx, bool intr);
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H A D | i915_vma_resource.c | 289 * @intr: Whether to wait interrubtible. 293 * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true 298 bool intr) 309 int ret = dma_fence_wait(&node->unbind_fence, intr); 362 * @intr: Whether to wait interrubtible. 369 * wait for the unbind fence to signal, using @intr to judge whether to 377 * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true 383 bool intr, 402 ret = dma_fence_wait(&node->unbind_fence, intr); 295 i915_vma_resource_bind_dep_sync(struct i915_address_space *vm, u64 offset, u64 size, bool intr) argument 379 i915_vma_resource_bind_dep_await(struct i915_address_space *vm, struct i915_sw_fence *sw_fence, u64 offset, u64 size, bool intr, gfp_t gfp) argument
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H A D | i915_vma_resource.h | 246 bool intr); 252 bool intr,
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/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_interrupts.c | 209 static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr, argument 212 return &intr->irq_tbl[irq_idx - 1]; 243 struct dpu_hw_intr *intr = dpu_kms->hw_intr; 251 if (!intr) 254 spin_lock_irqsave(&intr->irq_lock, irq_flags); 256 if (!test_bit(reg_idx, &intr->irq_mask)) 260 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off); 263 enable_mask = DPU_REG_READ(&intr->hw, intr 241 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 299 dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument 355 dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument 409 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 427 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 446 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 481 struct dpu_hw_intr *intr; local [all...] |
/linux-master/drivers/gpu/drm/msm/dp/ |
H A D | dp_catalog.c | 320 u32 intr, intr_ack; local 322 intr = dp_read_ahb(catalog, REG_DP_INTR_STATUS); 323 intr &= ~DP_INTERRUPT_STATUS1_MASK; 324 intr_ack = (intr & DP_INTERRUPT_STATUS1) 329 return intr; 761 u32 intr, intr_ack; local 763 intr = dp_read_ahb(catalog, REG_DP_INTR_STATUS4); 764 intr_ack = (intr & DP_INTERRUPT_STATUS4) 768 return intr; 775 u32 intr, intr_ac local [all...] |
/linux-master/drivers/gpu/drm/msm/dsi/ |
H A D | dsi_host.c | 667 u32 intr; local 671 intr = dsi_read(msm_host, REG_DSI_INTR_CTRL); 674 intr |= mask; 676 intr &= ~mask; 678 DBG("intr=%x enable=%d", intr, enable); 680 dsi_write(msm_host, REG_DSI_INTR_CTRL, intr);
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/ |
H A D | device.h | 5 #include <core/intr.h> 67 struct list_head intr; member in struct:nvkm_device::__anon129 74 } intr; member in struct:nvkm_device
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H A D | engine.h | 26 void (*intr)(struct nvkm_engine *); member in struct:nvkm_engine_func
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H A D | intr.h | 59 struct nvkm_intr *intr; member in struct:nvkm_inth
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H A D | subdev.h | 44 void (*intr)(struct nvkm_subdev *); member in struct:nvkm_subdev_func
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/engine/ |
H A D | falcon.h | 73 int (*bind_stat)(struct nvkm_falcon *, bool intr); 103 void (*intr)(struct nvkm_falcon *, struct nvkm_chan *); member in struct:nvkm_falcon_func
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H A D | fifo.h | 71 struct nvkm_inth intr; member in struct:nvkm_fifo::__anon144
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
H A D | gsp.h | 173 } intr[32]; member in struct:nvkm_gsp
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H A D | i2c.h | 49 u32 intr; member in struct:nvkm_i2c_aux
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H A D | mc.h | 10 struct nvkm_intr intr; member in struct:nvkm_mc
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H A D | top.h | 20 int intr; member in struct:nvkm_top_device
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H A D | vfn.h | 15 struct nvkm_intr intr; member in struct:nvkm_vfn
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/linux-master/drivers/gpu/drm/nouveau/ |
H A D | nouveau_fence.c | 280 nouveau_fence_wait_legacy(struct dma_fence *f, bool intr, long wait) argument 296 __set_current_state(intr ? TASK_INTERRUPTIBLE : 305 if (intr && signal_pending(current)) 315 nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr) argument 325 __set_current_state(intr ? 329 if (intr && signal_pending(current)) { 340 nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr) argument 345 return nouveau_fence_wait_busy(fence, intr); 347 ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ); 358 bool exclusive, bool intr) 357 nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan, bool exclusive, bool intr) argument [all...] |
H A D | nouveau_fence.h | 26 int nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr); 27 int nouveau_fence_sync(struct nouveau_bo *, struct nouveau_channel *, bool exclusive, bool intr);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/core/ |
H A D | engine.c | 85 if (engine->func->intr) 86 engine->func->intr(engine); 161 .intr = nvkm_engine_intr,
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H A D | intr.c | 22 #include <core/intr.h> 29 nvkm_intr_xlat(struct nvkm_subdev *subdev, struct nvkm_intr *intr, argument 36 const struct nvkm_intr_data *data = intr->data; 42 if (tdev->intr >= 0 && 45 if (data->mask & BIT(tdev->intr)) { 47 *mask = BIT(tdev->intr); 65 if (type < intr->leaves * sizeof(*intr->stat) * 8) { 78 struct nvkm_intr *intr; local 81 list_for_each_entry(intr, 91 nvkm_intr_allow_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument 105 struct nvkm_intr *intr; local 120 nvkm_intr_block_locked(struct nvkm_intr *intr, int leaf, u32 mask) argument 131 struct nvkm_intr *intr; local 148 struct nvkm_intr *intr; local 157 struct nvkm_intr *intr; local 167 struct nvkm_intr *intr; local 197 struct nvkm_intr *intr = inth->intr; local 232 nvkm_intr_add(const struct nvkm_intr_func *func, const struct nvkm_intr_data *data, struct nvkm_subdev *subdev, int leaves, struct nvkm_intr *intr) argument 270 nvkm_intr_subdev_add_dev(struct nvkm_intr *intr, enum nvkm_subdev_type type, int inst) argument 293 nvkm_intr_subdev_add(struct nvkm_intr *intr) argument 318 struct nvkm_intr *intr; local 369 struct nvkm_intr *intr, *intt; local 406 struct nvkm_intr *intr = inth->intr; local 421 nvkm_inth_add(struct nvkm_intr *intr, enum nvkm_intr_type type, enum nvkm_intr_prio prio, struct nvkm_subdev *subdev, nvkm_inth_func func, struct nvkm_inth *inth) argument [all...] |
H A D | subdev.c | 41 if (subdev->func->intr) 42 subdev->func->intr(subdev);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
H A D | ga100.c | 35 nvkm_error(subdev, "intr\n"); 71 return nvkm_inth_add(&device->vfn->intr, vector, NVKM_INTR_PRIO_NORMAL,
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