Searched refs:reg (Results 51 - 75 of 313) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/ether/pcnet/dev/mii/
H A Dnsphyter.c225 int reg, i; local
228 reg = BMCR_RESET;
230 reg = BMCR_RESET | BMCR_ISO;
231 PHY_WRITE(sc, MII_BMCR, reg);
253 reg = PHY_READ(sc, MII_BMCR);
254 if (reg != 0 && (reg & BMCR_RESET) == 0)
262 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
/haiku/src/add-ons/kernel/drivers/network/ether/sis900/dev/mii/
H A Dnsphyter.c225 int reg, i; local
228 reg = BMCR_RESET;
230 reg = BMCR_RESET | BMCR_ISO;
231 PHY_WRITE(sc, MII_BMCR, reg);
253 reg = PHY_READ(sc, MII_BMCR);
254 if (reg != 0 && (reg & BMCR_RESET) == 0)
262 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
/haiku/headers/libs/x86emu/x86emu/
H A Ddecode.h75 u8 *decode_rm_byte_register(int reg);
76 u16 *decode_rm_word_register(int reg);
77 u32 *decode_rm_long_register(int reg);
78 u16 *decode_rm_seg_register(int reg);
/haiku/src/add-ons/kernel/drivers/audio/emuxki/
H A Dio.h44 uint32 emuxki_chan_read(device_config *config, uint16 chano, uint32 reg);
45 void emuxki_chan_write(device_config *config, uint16 chano, uint32 reg, uint32 data);
61 uint32 emuxki_p16v_read(device_config *config, uint16 chano, uint16 reg);
62 void emuxki_p16v_write(device_config *config, uint16 chano, uint16 reg, uint32 data);
/haiku/src/tests/servers/app/newClipping/
H A DWinBorder.cpp59 void WinBorder::get_user_regions(BRegion &reg) argument
69 reg.Set(screenFrame);
74 reg.IntersectWith(&screenReg);
76 reg.Include(&fDecRegion);
H A DLayer.h44 void ConvertToScreen2(BRegion* reg) const;
50 void GetWantedRegion(BRegion &reg);
71 virtual void get_user_regions(BRegion &reg);
75 void rezize_layer_redraw_more(BRegion &reg, float dx, float dy);
76 void resize_layer_full_update_on_resize(BRegion &reg, float dx, float dy);
H A DWinBorder.h17 virtual void get_user_regions(BRegion &reg);
/haiku/headers/private/kernel/arch/x86/
H A Darch_cpuasm.h73 #define xgetbv(reg) ({ \
75 __asm__ volatile ("xgetbv" : "=a" (low), "=d" (high), "c" (reg)); \
79 #define xsetbv(reg, value) { \
81 __asm__ volatile ("xsetbv" : : "a" (low), "d" (high), "c" (reg)); }
/haiku/src/libs/compat/freebsd_wlan/net80211/
H A Dieee80211_regdomain.c358 struct ieee80211_regdomain_req *reg)
365 if (reg->rd.location != 'I' && reg->rd.location != 'O' &&
366 reg->rd.location != ' ') {
368 "%s: invalid location 0x%x\n", __func__, reg->rd.location);
371 if (reg->rd.isocc[0] == '\0' || reg->rd.isocc[1] == '\0') {
374 reg->rd.isocc[0], reg->rd.isocc[1]);
377 if (reg
357 ieee80211_setregdomain(struct ieee80211vap *vap, struct ieee80211_regdomain_req *reg) argument
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/
H A Dar5312_gpio.c34 #define AR5312_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */
76 uint32_t reg; local
81 reg = OS_REG_READ(ah, gpioOffset+AR5312_GPIODO);
82 reg &= ~(1 << gpio);
83 reg |= (val&1) << gpio;
85 OS_REG_WRITE(ah, gpioOffset+AR5312_GPIODO, reg);
/haiku/src/add-ons/kernel/drivers/network/ether/sis19x/
H A Dglue.c88 uint32 reg = gPci->read_pci_config(pciInfo.bus, local
90 reg &= ~0x02;
92 pciInfo.device, pciInfo.function, 0x48, 1, reg);
94 reg = gPci->read_pci_config(pciInfo.bus,
110 pciInfo.device, pciInfo.function, 0x48, 1, reg);
/haiku/src/add-ons/kernel/drivers/network/wlan/iprowifi2100/dev/ipw/
H A Dif_ipwreg.h327 #define CSR_READ_1(sc, reg) \
328 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
330 #define CSR_READ_2(sc, reg) \
331 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
333 #define CSR_READ_4(sc, reg) \
334 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
336 #define CSR_WRITE_1(sc, reg, val) \
337 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
339 #define CSR_WRITE_2(sc, reg, val) \
340 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (va
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/atheros813x/dev/alc/
H A Dif_alc.c273 alc_miibus_readreg(device_t dev, int phy, int reg) argument
280 v = alc_mii_readreg_816x(sc, phy, reg);
282 v = alc_mii_readreg_813x(sc, phy, reg);
287 alc_mii_readreg_813x(struct alc_softc *sc, int phy, int reg) argument
299 reg == MII_EXTSR)
303 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
312 device_printf(sc->alc_dev, "phy read timeout : %d\n", reg);
320 alc_mii_readreg_816x(struct alc_softc *sc, int phy, int reg) argument
330 MDIO_SUP_PREAMBLE | clk | MDIO_REG_ADDR(reg));
339 device_printf(sc->alc_dev, "phy read timeout : %d\n", reg);
347 alc_miibus_writereg(device_t dev, int phy, int reg, int val) argument
361 alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, int val) argument
383 alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, int val) argument
414 uint32_t reg; local
457 alc_miidbg_readreg(struct alc_softc *sc, int reg) argument
467 alc_miidbg_writereg(struct alc_softc *sc, int reg, int val) argument
477 alc_miiext_readreg(struct alc_softc *sc, int devaddr, int reg) argument
507 alc_miiext_writereg(struct alc_softc *sc, int devaddr, int reg, int val) argument
802 uint32_t reg; local
2532 uint32_t reg, pmcs; local
2595 uint32_t gphy, mac, master, pmcs, reg; local
3158 uint32_t reg; local
3195 uint32_t *reg; local
3229 uint32_t *reg; local
3801 uint32_t reg; local
3839 uint32_t pmcfg, reg; local
3939 uint32_t reg, rxf_hi, rxf_lo; local
4331 uint32_t reg; local
4393 uint32_t reg; local
4445 uint32_t reg; local
4584 uint32_t reg; local
[all...]
H A Dif_alcvar.h262 #define CSR_WRITE_4(_sc, reg, val) \
263 bus_write_4((_sc)->alc_res[0], (reg), (val))
264 #define CSR_WRITE_2(_sc, reg, val) \
265 bus_write_2((_sc)->alc_res[0], (reg), (val))
266 #define CSR_WRITE_1(_sc, reg, val) \
267 bus_write_1((_sc)->alc_res[0], (reg), (val))
268 #define CSR_READ_2(_sc, reg) \
269 bus_read_2((_sc)->alc_res[0], (reg))
270 #define CSR_READ_4(_sc, reg) \
271 bus_read_4((_sc)->alc_res[0], (reg))
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/broadcom43xx/dev/bwi/
H A Dif_bwivar.h77 #define CSR_READ_4(sc, reg) \
78 bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
79 #define CSR_READ_2(sc, reg) \
80 bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
82 #define CSR_WRITE_4(sc, reg, val) \
83 bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
84 #define CSR_WRITE_2(sc, reg, val) \
85 bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
87 #define CSR_SETBITS_4(sc, reg, bits) \
88 CSR_WRITE_4((sc), (reg), CSR_READ_
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/ale/
H A Dif_alevar.h231 #define CSR_WRITE_4(_sc, reg, val) \
232 bus_write_4((_sc)->ale_res[0], (reg), (val))
233 #define CSR_WRITE_2(_sc, reg, val) \
234 bus_write_2((_sc)->ale_res[0], (reg), (val))
235 #define CSR_WRITE_1(_sc, reg, val) \
236 bus_write_1((_sc)->ale_res[0], (reg), (val))
237 #define CSR_READ_2(_sc, reg) \
238 bus_read_2((_sc)->ale_res[0], (reg))
239 #define CSR_READ_4(_sc, reg) \
240 bus_read_4((_sc)->ale_res[0], (reg))
[all...]
/haiku/3rdparty/korli/
H A Dgenerate_ids_from_drivers.sh42 pciBsdEtherDriver 3com xl xl devs reg
43 pciBsdEtherDriver atheros813x alc alc ident_table reg
44 pciBsdEtherDriver atheros81xx ale ale devs reg
45 pciBsdEtherDriver attansic_l1 age age devs reg
47 pciBsdEtherDriver broadcom440x bfe bfe devs reg
48 pciBsdEtherDriver broadcom570x bge bge devs reg
69 pciBsdEtherDriver ipro100 fxp fxp ident_table reg
81 pciBsdEtherDriver jmicron2x0 jme jme devs reg
82 pciBsdEtherDriver marvell_yukon msk msk products reg
83 pciBsdEtherDriver nforce nfe nfe devs reg
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/dec21xxx/dev/dc/
H A Dpnphy.c203 int reg; local
211 reg = CSR_READ_4(dc_sc, DC_ISR);
212 if (!(reg & DC_ISR_LINKFAIL))
214 reg = CSR_READ_4(dc_sc, DC_NETCFG);
215 if (reg & DC_NETCFG_SPEEDSEL)
219 if (reg & DC_NETCFG_FULLDUPLEX)
/haiku/src/libs/compat/freebsd_network/compat/dev/pci/
H A Dpcivar.h24 int pci_enable_io(device_t dev, int reg);
38 uint32_t pci_read_config(device_t dev, int reg, int width);
39 void pci_write_config(device_t dev, int reg, uint32_t val, int width);
/haiku/src/add-ons/kernel/drivers/network/ether/sis19x/dev/sge/
H A Dif_sgereg.h376 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->sge_res, reg, val)
377 #define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->sge_res, reg, val)
378 #define CSR_WRITE_1(cs, reg, val) bus_write_1(sc->sge_res, reg, val)
380 #define CSR_READ_4(sc, reg) bus_read_4(sc->sge_res, reg)
381 #define CSR_READ_2(sc, reg) bus_read_2(sc->sge_res, reg)
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192c/
H A Dr92c_init.c143 "BB: reg 0x%03x, val 0x%08x\n",
144 bb_prog->reg[j], bb_prog->val[j]);
146 rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
201 for (i = 0; rf_prog[i].reg != NULL; i++) {
213 "RF: reg 0x%02x, val 0x%05x\n",
214 prog->reg[j], prog->val[j]);
221 if (prog->reg[j] > 0xf8) {
226 rtwn_rf_write(sc, chain, prog->reg[j], prog->val[j]);
238 uint32_t reg, type; local
245 reg
315 uint32_t reg; local
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/
H A Dr88e_init.c62 uint32_t reg; local
66 reg = rtwn_bb_read(sc, R92C_AFE_XTAL_CTRL);
68 RW(reg, R92C_AFE_XTAL_CTRL_ADDR, val | val << 6));
/haiku/src/add-ons/media/media-add-ons/usb_vision/
H A DAddOn.cpp144 status_t MediaAddOn::USBVisionWriteRegister(uint8 reg, uint8 *data, uint8 len /*= sizeof(uint8)*/) argument
148 xet_nt100x_reg ri = {reg, len};
155 status_t MediaAddOn::USBVisionReadRegister(uint8 reg, uint8 *data, uint8 len /* = sizeof(uint8)*/) argument
159 xet_nt100x_reg ri = {reg, len};
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/
H A Dif_rtwn_nop.h45 rtwn_nop_softc_uint32(struct rtwn_softc *sc, uint32_t reg) argument
/haiku/src/libs/compat/freebsd_network/
H A Dfbsd_mii_bitbang.c118 mii_bitbang_readreg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg) argument
127 mii_bitbang_sendbits(dev, ops, reg, 5);
166 mii_bitbang_writereg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg, argument
175 mii_bitbang_sendbits(dev, ops, reg, 5);

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