| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/mc/ |
| H A D | nv11.c | 39 .intr = &nv04_mc_intr,
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| H A D | nv17.c | 48 .intr = &nv04_mc_intr,
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| H A D | gp10b.c | 37 .intr = &gp100_mc_intr,
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| /linux-master/include/drm/ttm/ |
| H A D | ttm_execbuf_util.h | 72 * @intr: should the wait be interruptible
86 * If intr is set to true, this function may return -ERESTARTSYS if the
101 struct list_head *list, bool intr,
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/ce/ |
| H A D | tu102.c | 30 .intr = gp100_ce_intr,
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
| H A D | gk104.c | 31 u32 intr = nvkm_rd32(device, 0x00dc60); local
32 u32 stat = nvkm_rd32(device, 0x00dc68) & intr, i;
39 nvkm_wr32(device, 0x00dc60, intr);
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| H A D | g94.c | 31 u32 intr = nvkm_rd32(device, 0x00e06c); local
32 u32 stat = nvkm_rd32(device, 0x00e068) & intr, i;
39 nvkm_wr32(device, 0x00e06c, intr);
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| /linux-master/tools/perf/util/ |
| H A D | parse-regs-options.c | 13 __parse_regs(const struct option *opt, const char *str, int unset, bool intr) argument
30 if (intr)
63 s, intr ? "-I" : "--user-regs=");
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
| H A D | base.c | 100 struct nvkm_intr *intr = &sec2->engine.subdev.device->mc->intr; local
104 intr = sec2->func->intr_vector(sec2, &type);
105 if (IS_ERR(intr))
106 return PTR_ERR(intr);
109 return nvkm_inth_add(intr, type, NVKM_INTR_PRIO_NORMAL, subdev, sec2->func->intr,
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| /linux-master/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_trace.h | 69 TP_PROTO(const struct pci_dev *pdev, const char *msg, u64 intr),
70 TP_ARGS(pdev, msg, intr),
73 __field(u64, intr)
77 __entry->intr = intr;
80 __get_str(str), __entry->intr)
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| /linux-master/arch/powerpc/platforms/52xx/ |
| H A D | mpc52xx_pm.c | 22 static struct mpc52xx_intr __iomem *intr; variable in typeref:struct:__iomem
91 intr = mbar + 0x500;
128 intr_main_mask = in_be32(&intr->main_mask);
129 out_be32(&intr->main_mask, intr_main_mask | 0x1ffff);
162 mpc52xx_deep_sleep(sram, sdram, cdm, intr);
181 out_be32(&intr->main_mask, intr_main_mask);
|
| /linux-master/arch/mips/pci/ |
| H A D | ops-msc.c | 37 u32 intr; local
56 MSC_READ(MSC01_PCI_INTSTAT, intr);
57 if (intr & (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)) {
|
| H A D | ops-gt64xxx_pci0.c | 34 u32 intr; local
71 intr = GT_READ(GT_INTRCAUSE_OFS);
73 if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/privring/ |
| H A D | gf117.c | 39 .intr = gf100_privring_intr,
|
| H A D | gp10b.c | 47 .intr = gk104_privring_intr,
|
| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/timer/ |
| H A D | priv.h | 12 void (*intr)(struct nvkm_timer *); member in struct:nvkm_timer_func
|
| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | gk208.c | 38 .intr = gt215_pmu_intr,
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| H A D | gm107.c | 40 .intr = gt215_pmu_intr,
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| H A D | gf119.c | 38 .intr = gt215_pmu_intr,
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| H A D | mcp89.c | 31 .intr = nv50_gr_intr,
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| H A D | gt215.c | 31 .intr = nv50_gr_intr,
|
| /linux-master/drivers/gpu/host1x/ |
| H A D | Makefile | 6 intr.o \
|
| /linux-master/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_ttm_move.h | 29 bool allow_accel, bool intr);
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | gf100.c | 37 u32 intr = nvkm_rd32(device, 0x000100); local
38 if (intr & 0x08000000)
39 nvkm_debug(subdev, "PFFB intr\n");
40 if (intr & 0x00002000)
41 nvkm_debug(subdev, "PBFB intr\n");
126 .intr = gf100_fb_intr,
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| /linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | gk20a.c | 34 .intr = gk104_fifo_intr,
|