drm/nouveau/mc: move NV_PMC_ENABLE bashing to chipset-specific code

Ampere needs different handling here, most of what we touch has moved.

We probably want to refactor these interfaces in general, but I'm not
yet sure how they should look, this will get the job done for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: implement intr handling on top of nvkm_intr

- new-style handlers can now be used here too
- decent clean-up

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drm/nouveau/mc/gp10b: make gp10b_mc_init static

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gp100-: route fault buffer interrupts to FAULT

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: add GP10B support

GP10B's MC is compatible with GP100's, but engines need to be explicitly
put out of ELPG during init.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>