| /linux-master/drivers/video/fbdev/ |
| H A D | chipsfb.c | 93 chipsfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) argument
[all...] |
| H A D | hyperv_fb.c | 803 hvfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) argument
[all...] |
| H A D | vt8500lcdfb.c | 200 vt8500lcd_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) argument
[all...] |
| /linux-master/drivers/thermal/ |
| H A D | thermal_sysfs.c | 838 int var; local
|
| /linux-master/drivers/pci/controller/dwc/ |
| H A D | pci-imx6.c | 313 u32 var; local
[all...] |
| /linux-master/drivers/md/bcache/ |
| H A D | sysfs.c | 178 #define var(stat) (dc->stat) macro
286 #undef var macro
[all...] |
| /linux-master/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx10.asm | 49 var SINGLE_STEP_MISSED_WORKAROUND = 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX raised label
51 var SQ_WAVE_STATUS_SPI_PRIO_MASK = 0x00000006 label
52 var SQ_WAVE_STATUS_HALT_MASK = 0x2000 label
53 var SQ_WAVE_STATUS_ECC_ERR_MASK = 0x20000 label
54 var SQ_WAVE_STATUS_TRAP_EN_SHIFT = 6 label
56 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT = 12 label
57 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE = 9 label
58 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE = 8 label
59 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT = 24 label
60 var SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZ label
61 var SQ_WAVE_IB_STS2_WAVE64_SHIFT = 11 label
62 var SQ_WAVE_IB_STS2_WAVE64_SIZE = 1 label
65 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 8 label
67 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 12 label
70 var SQ_WAVE_TRAPSTS_SAVECTX_MASK = 0x400 label
71 var SQ_WAVE_TRAPSTS_EXCP_MASK = 0x1FF label
72 var SQ_WAVE_TRAPSTS_SAVECTX_SHIFT = 10 label
73 var SQ_WAVE_TRAPSTS_ADDR_WATCH_MASK = 0x80 label
74 var SQ_WAVE_TRAPSTS_ADDR_WATCH_SHIFT = 7 label
75 var SQ_WAVE_TRAPSTS_MEM_VIOL_MASK = 0x100 label
76 var SQ_WAVE_TRAPSTS_MEM_VIOL_SHIFT = 8 label
77 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_MASK = 0x3FF label
78 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SHIFT = 0x0 label
79 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SIZE = 10 label
80 var SQ_WAVE_TRAPSTS_POST_SAVECTX_MASK = 0xFFFFF800 label
81 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11 label
82 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21 label
83 var SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK = 0x800 label
84 var SQ_WAVE_TRAPSTS_EXCP_HI_MASK = 0x7000 label
86 var SQ_WAVE_TRAPSTS_WAVE_START_MASK = 0x20000 label
87 var SQ_WAVE_TRAPSTS_WAVE_END_MASK = 0x40000 label
88 var SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK = 0x100000 label
90 var SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK = 0x10000000 label
92 var SQ_WAVE_MODE_EXCP_EN_SHIFT = 12 label
93 var SQ_WAVE_MODE_EXCP_EN_ADDR_WATCH_SHIFT = 19 label
95 var SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT = 15 label
96 var SQ_WAVE_IB_STS_REPLAY_W64H_SHIFT = 25 label
97 var SQ_WAVE_IB_STS_REPLAY_W64H_MASK = 0x02000000 label
98 var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK = 0x003F8000 label
100 var SQ_WAVE_MODE_DEBUG_EN_MASK = 0x800 label
103 var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK|SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK label
105 var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_TRAPSTS_MEM_VIOL_MASK |\\ label
113 var TTMP11_SAVE_REPLAY_W64H_SHIFT = 31 label
114 var TTMP11_SAVE_REPLAY_W64H_MASK = 0x80000000 label
115 var TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT = 24 label
116 var TTMP11_SAVE_RCNT_FIRST_REPLAY_MASK = 0x7F000000 label
117 var TTMP11_DEBUG_TRAP_ENABLED_SHIFT = 23 label
118 var TTMP11_DEBUG_TRAP_ENABLED_MASK = 0x800000 label
122 var S_SAVE_BUF_RSRC_WORD1_STRIDE = 0x00040000 label
123 var S_SAVE_BUF_RSRC_WORD3_MISC = 0x10807FAC label
124 var S_SAVE_PC_HI_TRAP_ID_MASK = 0x00FF0000 label
125 var S_SAVE_PC_HI_HT_MASK = 0x01000000 label
126 var S_SAVE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 label
127 var S_SAVE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
129 var S_SAVE_PC_HI_FIRST_WAVE_MASK = 0x80000000 label
130 var S_SAVE_PC_HI_FIRST_WAVE_SHIFT = 31 label
132 var s_sgpr_save_num = 108 label
134 var s_save_spi_init_lo = exec_lo label
135 var s_save_spi_init_hi = exec_hi label
136 var s_save_pc_lo = ttmp0 label
137 var s_save_pc_hi = ttmp1 label
138 var s_save_exec_lo = ttmp2 label
139 var s_save_exec_hi = ttmp3 label
140 var s_save_status = ttmp12 label
141 var s_save_trapsts = ttmp15 label
142 var s_save_xnack_mask = s_save_trapsts label
143 var s_wave_size = ttmp7 label
144 var s_save_buf_rsrc0 = ttmp8 label
145 var s_save_buf_rsrc1 = ttmp9 label
146 var s_save_buf_rsrc2 = ttmp10 label
147 var s_save_buf_rsrc3 = ttmp11 label
148 var s_save_mem_offset = ttmp4 label
149 var s_save_alloc_size = s_save_trapsts label
150 var s_save_tmp = ttmp14 label
151 var s_save_m0 = ttmp5 label
152 var s_save_ttmps_lo = s_save_tmp label
153 var s_save_ttmps_hi = s_save_trapsts label
155 var S_RESTORE_BUF_RSRC_WORD1_STRIDE = S_SAVE_BUF_RSRC_WORD1_STRIDE label
156 var S_RESTORE_BUF_RSRC_WORD3_MISC = S_SAVE_BUF_RSRC_WORD3_MISC label
158 var S_RESTORE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 label
159 var S_RESTORE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
160 var S_WAVE_SIZE = 25 label
162 var s_restore_spi_init_lo = exec_lo label
163 var s_restore_spi_init_hi = exec_hi label
164 var s_restore_mem_offset = ttmp12 label
165 var s_restore_alloc_size = ttmp3 label
166 var s_restore_tmp = ttmp2 label
167 var s_restore_mem_offset_save = s_restore_tmp label
168 var s_restore_m0 = s_restore_alloc_size label
169 var s_restore_mode = ttmp7 label
170 var s_restore_flat_scratch = s_restore_tmp label
171 var s_restore_pc_lo = ttmp0 label
172 var s_restore_pc_hi = ttmp1 label
173 var s_restore_exec_lo = ttmp4 label
174 var s_restore_exec_hi = ttmp5 label
175 var s_restore_status = ttmp14 label
176 var s_restore_trapsts = ttmp15 label
177 var s_restore_xnack_mask = ttmp13 label
178 var s_restore_buf_rsrc0 = ttmp8 label
179 var s_restore_buf_rsrc1 = ttmp9 label
180 var s_restore_buf_rsrc2 = ttmp10 label
181 var s_restore_buf_rsrc3 = ttmp11 label
182 var s_restore_size = ttmp6 label
183 var s_restore_ttmps_lo = s_restore_tmp label
184 var s_restore_ttmps_hi = s_restore_alloc_size label
[all...] |
| H A D | cwsr_trap_handler_gfx9.asm | 47 var ACK_SQC_STORE = 1 //workaround for suspected SQC store bug causing incorrect stores under concurrency label
48 var SAVE_AFTER_XNACK_ERROR = 1 //workaround for TCP store failure after XNACK error when ALLOW_REPLAY=0, for debugger label
49 var SINGLE_STEP_MISSED_WORKAROUND = (ASIC_FAMILY <= CHIP_ALDEBARAN) //workaround for lost MODE.DEBUG_EN exception when SAVECTX raised label
54 var SQ_WAVE_STATUS_SPI_PRIO_SHIFT = 1 label
55 var SQ_WAVE_STATUS_SPI_PRIO_MASK = 0x00000006 label
56 var SQ_WAVE_STATUS_HALT_MASK = 0x2000 label
57 var SQ_WAVE_STATUS_PRE_SPI_PRIO_SHIFT = 0 label
58 var SQ_WAVE_STATUS_PRE_SPI_PRIO_SIZE = 1 label
59 var SQ_WAVE_STATUS_POST_SPI_PRIO_SHIFT = 3 label
60 var SQ_WAVE_STATUS_POST_SPI_PRIO_SIZ label
61 var SQ_WAVE_STATUS_ALLOW_REPLAY_MASK = 0x400000 label
62 var SQ_WAVE_STATUS_ECC_ERR_MASK = 0x20000 label
64 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT = 12 label
65 var SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE = 9 label
66 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE = 6 label
67 var SQ_WAVE_GPR_ALLOC_SGPR_SIZE_SIZE = 3 //FIXME sq.blk still has 4 bits at this time while SQ programming guide has 3 bits label
68 var SQ_WAVE_GPR_ALLOC_SGPR_SIZE_SHIFT = 24 label
71 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 6 label
72 var SQ_WAVE_GPR_ALLOC_ACCV_OFFSET_SHIFT = 12 label
73 var SQ_WAVE_GPR_ALLOC_ACCV_OFFSET_SIZE = 6 label
75 var SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT = 8 label
78 var SQ_WAVE_TRAPSTS_SAVECTX_MASK = 0x400 label
79 var SQ_WAVE_TRAPSTS_EXCP_MASK = 0x1FF label
80 var SQ_WAVE_TRAPSTS_SAVECTX_SHIFT = 10 label
81 var SQ_WAVE_TRAPSTS_ADDR_WATCH_MASK = 0x80 label
82 var SQ_WAVE_TRAPSTS_ADDR_WATCH_SHIFT = 7 label
83 var SQ_WAVE_TRAPSTS_MEM_VIOL_MASK = 0x100 label
84 var SQ_WAVE_TRAPSTS_MEM_VIOL_SHIFT = 8 label
85 var SQ_WAVE_TRAPSTS_HOST_TRAP_MASK = 0x400000 label
86 var SQ_WAVE_TRAPSTS_WAVE_BEGIN_MASK = 0x800000 label
87 var SQ_WAVE_TRAPSTS_WAVE_END_MASK = 0x1000000 label
88 var SQ_WAVE_TRAPSTS_TRAP_AFTER_INST_MASK = 0x2000000 label
89 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_MASK = 0x3FF label
90 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SHIFT = 0x0 label
91 var SQ_WAVE_TRAPSTS_PRE_SAVECTX_SIZE = 10 label
92 var SQ_WAVE_TRAPSTS_POST_SAVECTX_MASK = 0xFFFFF800 label
93 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SHIFT = 11 label
94 var SQ_WAVE_TRAPSTS_POST_SAVECTX_SIZE = 21 label
95 var SQ_WAVE_TRAPSTS_ILLEGAL_INST_MASK = 0x800 label
96 var SQ_WAVE_TRAPSTS_EXCP_HI_MASK = 0x7000 label
97 var SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK = 0x10000000 label
99 var SQ_WAVE_MODE_EXCP_EN_SHIFT = 12 label
100 var SQ_WAVE_MODE_EXCP_EN_ADDR_WATCH_SHIFT = 19 label
102 var SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT = 15 //FIXME label
103 var SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK = 0x1F8000 label
105 var SQ_WAVE_MODE_DEBUG_EN_MASK = 0x800 label
107 var TTMP_SAVE_RCNT_FIRST_REPLAY_SHIFT = 26 // bits [31:26] unused by SPI debug data label
108 var TTMP_SAVE_RCNT_FIRST_REPLAY_MASK = 0xFC000000 label
109 var TTMP_DEBUG_TRAP_ENABLED_SHIFT = 23 label
110 var TTMP_DEBUG_TRAP_ENABLED_MASK = 0x800000 label
113 var S_SAVE_BUF_RSRC_WORD1_STRIDE = 0x00040000 //stride is 4 bytes label
114 var S_SAVE_BUF_RSRC_WORD3_MISC = 0x00807FAC //SQ_SEL_X/Y/Z/W, BUF_NUM_FORMAT_FLOAT, (0 for MUBUF stride[17:14] when ADD_TID_ENABLE and BUF_DATA_FORMAT_32 for MTBUF), ADD_TID_ENABLE label
115 var S_SAVE_PC_HI_TRAP_ID_MASK = 0x00FF0000 label
116 var S_SAVE_PC_HI_HT_MASK = 0x01000000 label
117 var S_SAVE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 //bit[26]: FirstWaveInTG label
118 var S_SAVE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
120 var s_save_spi_init_lo = exec_lo label
121 var s_save_spi_init_hi = exec_hi label
123 var s_save_pc_lo = ttmp0 //{TTMP1, TTMP0} = {3'h0,pc_rewind[3:0], HT[0],trapID[7:0], PC[47:0]} label
124 var s_save_pc_hi = ttmp1 label
125 var s_save_exec_lo = ttmp2 label
126 var s_save_exec_hi = ttmp3 label
127 var s_save_tmp = ttmp14 label
128 var s_save_trapsts = ttmp15 //not really used until the end of the SAVE routine label
129 var s_save_xnack_mask_lo = ttmp6 label
130 var s_save_xnack_mask_hi = ttmp7 label
131 var s_save_buf_rsrc0 = ttmp8 label
132 var s_save_buf_rsrc1 = ttmp9 label
133 var s_save_buf_rsrc2 = ttmp10 label
134 var s_save_buf_rsrc3 = ttmp11 label
135 var s_save_status = ttmp12 label
136 var s_save_mem_offset = ttmp4 label
137 var s_save_alloc_size = s_save_trapsts //conflict label
138 var s_save_m0 = ttmp5 label
139 var s_save_ttmps_lo = s_save_tmp //no conflict label
140 var s_save_ttmps_hi = s_save_trapsts //no conflict label
142 var s_save_ib_sts = ttmp13 label
144 var s_save_ib_sts = ttmp11 label
148 var S_RESTORE_BUF_RSRC_WORD1_STRIDE = S_SAVE_BUF_RSRC_WORD1_STRIDE label
149 var S_RESTORE_BUF_RSRC_WORD3_MISC = S_SAVE_BUF_RSRC_WORD3_MISC label
151 var S_RESTORE_SPI_INIT_FIRST_WAVE_MASK = 0x04000000 //bit[26]: FirstWaveInTG label
152 var S_RESTORE_SPI_INIT_FIRST_WAVE_SHIFT = 26 label
154 var s_restore_spi_init_lo = exec_lo label
155 var s_restore_spi_init_hi = exec_hi label
157 var s_restore_mem_offset = ttmp12 label
158 var s_restore_tmp2 = ttmp13 label
159 var s_restore_alloc_size = ttmp3 label
160 var s_restore_tmp = ttmp2 label
161 var s_restore_mem_offset_save = s_restore_tmp //no conflict label
162 var s_restore_accvgpr_offset_save = ttmp7 label
164 var s_restore_m0 = s_restore_alloc_size //no conflict label
166 var s_restore_mode = s_restore_accvgpr_offset_save label
168 var s_restore_pc_lo = ttmp0 label
169 var s_restore_pc_hi = ttmp1 label
170 var s_restore_exec_lo = ttmp4 label
171 var s_restore_exec_hi = ttmp5 label
172 var s_restore_status = ttmp14 label
173 var s_restore_trapsts = ttmp15 label
174 var s_restore_xnack_mask_lo = xnack_mask_lo label
175 var s_restore_xnack_mask_hi = xnack_mask_hi label
176 var s_restore_buf_rsrc0 = ttmp8 label
177 var s_restore_buf_rsrc1 = ttmp9 label
178 var s_restore_buf_rsrc2 = ttmp10 label
179 var s_restore_buf_rsrc3 = ttmp11 label
180 var s_restore_ttmps_lo = s_restore_tmp //no conflict label
181 var s_restore_ttmps_hi = s_restore_alloc_size //no conflict label
[all...] |
| /linux-master/arch/sparc/kernel/ |
| H A D | ds.c | 744 void ldom_set_var(const char *var, const char *value) argument
[all...] |
| /linux-master/tools/testing/selftests/livepatch/test_modules/ |
| H A D | test_klp_shadow_vars.c | 76 int **var = ctor_data; local
91 int **var = ctor_data; local
120 int **var = ctor_data; local
[all...] |
| /linux-master/tools/testing/selftests/bpf/progs/ |
| H A D | test_global_func1.c | 11 int f0(int var, struct __sk_buff *skb) argument
41 int f3(int val, struct __sk_buff *skb, int var) argument
|
| /linux-master/tools/bpf/resolve_btfids/ |
| H A D | main.c | 145 static int eprintf(int level, int var, const char *fmt, ...) argument
|
| /linux-master/lib/ |
| H A D | test_bitmap.c | 1237 unsigned long var = 0; local
|
| /linux-master/kernel/events/ |
| H A D | core.c | 5418 void *var = &child->ctx->refcount; local
|
| /linux-master/kernel/bpf/ |
| H A D | btf.c | 3566 const struct btf_type *var = btf_type_by_id(btf, vsi->type); local
4477 const struct btf_var *var; local
4523 const struct btf_var *var local
4662 const struct btf_type *var; local
[all...] |
| /linux-master/drivers/net/wireless/intel/iwlwifi/fw/ |
| H A D | uefi.c | 86 void *var; local
|
| /linux-master/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| H A D | common.c | 102 brcmf_c_download(struct brcmf_if *ifp, u16 flag, struct brcmf_dload_data_le *dload_buf, u32 len, const char *var) argument
|
| /linux-master/drivers/net/dsa/realtek/ |
| H A D | rtl83xx.c | 132 const struct realtek_variant *var; local
|
| /linux-master/block/ |
| H A D | blk-wbt.c | 151 static void wb_timestamp(struct rq_wb *rwb, unsigned long *var) argument
|
| H A D | blk-sysfs.c | 30 queue_var_show(unsigned long var, char *page) argument
36 queue_var_store(unsigned long *var, const char *page, size_t count) argument
535 static ssize_t queue_var_store64(s64 *var, const char *page) argument
|
| H A D | bfq-iosched.c | 7383 static ssize_t bfq_var_show(unsigned int var, char *page) argument
7388 static int bfq_var_store(unsigned long *var, const char *page) argument
|
| /linux-master/fs/efivarfs/ |
| H A D | internal.h | 34 struct efi_variable var; member in struct:efivar_entry
|
| /linux-master/drivers/infiniband/hw/mlx5/ |
| H A D | cong.c | 178 mlx5_ib_set_cc_param_mask_val(void *field, int offset, u32 var, u32 *attr_mask) argument
292 mlx5_ib_get_cc_params(struct mlx5_ib_dev *dev, u32 port_num, int offset, u32 *var) argument
329 mlx5_ib_set_cc_params(struct mlx5_ib_dev *dev, u32 port_num, int offset, u32 var) argument
377 u32 var; local
400 u32 var = 0; local
[all...] |
| /linux-master/tools/perf/util/ |
| H A D | hist.c | 2834 int perf_hist_config(const char *var, const char *value) argument
|
| /linux-master/drivers/net/ethernet/cavium/liquidio/ |
| H A D | lio_core.c | 1535 u32 var; local
1652 u32 var; local
1686 u32 var; local
1775 u32 var; local
[all...] |