| /linux-master/drivers/clk/ |
| H A D | clk-max77686.c | 154 pr_err("%s: invalid index %u\n", __func__, idx);
|
| H A D | clk-vt8500.c | 62 pr_err("%s:of_iomap(pmc) failed\n", __func__);
182 pr_err("%s: invalid divisor for clock\n", __func__);
248 pr_err("%s: enable-bit property required for gated clock\n",
281 pr_err("%s: Invalid clock description in device tree\n",
357 pr_err("%s: requested rate out of range\n", __func__);
579 pr_err("%s: invalid pll type\n", __func__);
|
| /linux-master/drivers/clk/davinci/ |
| H A D | pll-da850.c | 149 pr_err("%s: ioremap failed\n", __func__);
|
| /linux-master/drivers/clk/hisilicon/ |
| H A D | clk-hi3660-stub.c | 117 pr_err("%s: invalid index %u\n", __func__, idx);
|
| H A D | clk-hix5hd2.c | 290 pr_err("%s: failed to register clock %s\n",
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| /linux-master/drivers/clk/keystone/ |
| H A D | gate.c | 207 pr_err("%s: Out of memory\n", __func__);
214 pr_err("%s: control ioremap failed\n", __func__);
221 pr_err("%s: domain ioremap failed\n", __func__);
234 pr_err("%s: Parent clock not found\n", __func__);
244 pr_err("%s: error registering clk %pOFn\n", __func__, node);
|
| /linux-master/drivers/clk/mvebu/ |
| H A D | armada-370.c | 72 pr_err("CPU freq select unsupported %d\n", cpu_freq_select);
|
| H A D | armada-375.c | 78 pr_err("Selected CPU frequency (%d) unsupported\n",
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| H A D | armada-38x.c | 61 pr_err("Selected CPU frequency (%d) unsupported\n",
|
| H A D | armada-39x.c | 75 pr_err("Selected CPU frequency (%d) unsupported\n",
|
| H A D | common.c | 53 pr_err("cannot get SSCG register node\n");
59 pr_err("cannot map SSCG register\n");
243 pr_err("mvebu-clk-gating: cannot instantiate more than one gateable clock device\n");
|
| H A D | mv98dx3236.c | 82 pr_err("CPU freq select unsupported %d\n", cpu_freq_select);
|
| /linux-master/drivers/clk/mxs/ |
| H A D | clk-imx23.c | 157 pr_err("i.MX23 clk %d: register failed with %ld\n",
|
| H A D | clk-imx28.c | 235 pr_err("i.MX28 clk %d: register failed with %ld\n",
|
| /linux-master/drivers/clk/nxp/ |
| H A D | clk-lpc32xx.c | 525 pr_err("%s: PLL clocks are not in valid ranges: %lu/%lu/%lu\n",
618 pr_err("%s: %lu: no valid PLL parameters are found\n",
1498 pr_err("failed to find external 32KHz clock: %ld\n",
1503 pr_err("invalid clock rate of external 32KHz oscillator\n");
1509 pr_err("failed to find external main oscillator clock: %ld\n",
1516 pr_err("failed to map system control block registers\n");
1522 pr_err("failed to regmap system control block: %ld\n",
1542 pr_err("failed to register %s clock: %ld\n",
1572 pr_err("failed to map address range\n");
1579 pr_err("faile
[all...] |
| /linux-master/drivers/clk/pistachio/ |
| H A D | clk-pll.c | 479 pr_err("Unrecognized PLL type %u\n", type);
|
| H A D | clk.c | 31 pr_err("Failed to map clock provider registers\n");
135 pr_err("Failed to enable clock %s: %d\n",
|
| /linux-master/drivers/clk/qcom/ |
| H A D | clk-regmap-mux-div.c | 54 pr_err("%s: RCG did not update its configuration", name);
68 pr_err("%s: RCG configuration is pending\n", name);
175 pr_err("%s: Can't find parent with src %d\n", name, src);
219 pr_err("%s: Can't find parent %d\n", name, src);
|
| /linux-master/drivers/clk/rockchip/ |
| H A D | clk-inverter.c | 43 pr_err("%s: unsupported phase %d for %s\n",
|
| H A D | clk-muxgrf.c | 66 pr_err("%s: regmap not available\n", __func__);
|
| /linux-master/drivers/clk/sunxi/ |
| H A D | clk-a10-pll2.c | 69 pr_err("Couldn't register the prediv clock\n");
102 pr_err("Couldn't register the base multiplier clock\n");
|
| H A D | clk-sun4i-display.c | 119 pr_err("%s: Could not map the clock registers\n", clk_name);
125 pr_err("%s: Could not retrieve the parents\n", clk_name);
165 pr_err("%s: Couldn't register the clock\n", clk_name);
171 pr_err("%s: Couldn't register DT provider\n", clk_name);
197 pr_err("%s: Couldn't register the reset controller\n",
|
| H A D | clk-sun4i-pll3.c | 36 pr_err("%s: Could not map the clock registers\n", clk_name);
64 pr_err("%s: Couldn't register the clock\n", clk_name);
70 pr_err("%s: Couldn't register DT provider\n",
|
| H A D | clk-sun4i-tcon-ch1.c | 239 pr_err("%s: Could not map the clock registers\n", clk_name);
245 pr_err("%s Could not retrieve the parents\n", clk_name);
265 pr_err("%s: Couldn't register the clock\n", clk_name);
271 pr_err("%s: Couldn't register our clock provider\n", clk_name);
|
| H A D | clk-sun8i-mbus.c | 43 pr_err("Could not get registers for sun8i-mbus-clk\n");
|