Searched refs:reg (Results 451 - 475 of 7230) sorted by relevance

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/linux-master/drivers/net/ethernet/intel/idpf/
H A Didpf_vf_dev.c24 ccq->reg.head = VF_ATQH;
25 ccq->reg.tail = VF_ATQT;
26 ccq->reg.len = VF_ATQLEN;
27 ccq->reg.bah = VF_ATQBAH;
28 ccq->reg.bal = VF_ATQBAL;
29 ccq->reg.len_mask = VF_ATQLEN_ATQLEN_M;
30 ccq->reg.len_ena_mask = VF_ATQLEN_ATQENABLE_M;
31 ccq->reg.head_mask = VF_ATQH_ATQH_M;
35 ccq->reg.head = VF_ARQH;
36 ccq->reg
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/linux-master/arch/x86/pci/
H A Ddirect.c17 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \
18 (0x80000000 | ((reg & 0xF00) << 16) | (bus << 16) \
19 | (devfn << 8) | (reg & 0xFC))
22 unsigned int devfn, int reg, int len, u32 *value)
26 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) {
33 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
37 *value = inb(0xCFC + (reg & 3));
40 *value = inw(0xCFC + (reg & 2));
53 unsigned int devfn, int reg, int len, u32 value)
57 if (seg || (bus > 255) || (devfn > 255) || (reg > 409
21 pci_conf1_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
52 pci_conf1_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
95 pci_conf2_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) argument
137 pci_conf2_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) argument
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/linux-master/drivers/soc/bcm/brcmstb/
H A Dbiuctrl.c59 static inline u32 cbc_readl(int reg) argument
61 int offset = cpubiuctrl_regs[reg];
64 (IS_ENABLED(CONFIG_CACHE_B15_RAC) && reg >= RAC_CONFIG0_REG))
70 static inline void cbc_writel(u32 val, int reg) argument
72 int offset = cpubiuctrl_regs[reg];
75 (IS_ENABLED(CONFIG_CACHE_B15_RAC) && reg >= RAC_CONFIG0_REG))
209 u32 reg; local
211 reg = brcmstb_get_family_id();
214 if (BRCM_ID(reg) == a72_b53_mach_compat[i])
222 reg
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/linux-master/arch/x86/include/asm/
H A Dnospec-branch.h142 #define __FILL_RETURN_BUFFER(reg, nr) \
143 mov $(nr/2), reg; \
148 dec reg; \
159 #define __FILL_RETURN_BUFFER(reg, nr) \
217 .macro __CS_PREFIX reg:req
219 .ifc \reg,\rs
234 .macro JMP_NOSPEC reg:req
236 __CS_PREFIX \reg
237 jmp __x86_indirect_thunk_\reg
239 jmp *%\reg
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/linux-master/drivers/clk/sunxi-ng/
H A Dccu_gate.c15 u32 reg; local
22 reg = readl(common->base + common->reg);
23 writel(reg & ~gate, common->base + common->reg);
39 u32 reg; local
46 reg = readl(common->base + common->reg);
47 writel(reg | gate, common->base + common->reg);
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/linux-master/arch/arm64/kernel/
H A Dparavirt.c56 struct pv_time_stolen_time_region *reg; local
59 reg = per_cpu_ptr(&stolen_time_region, cpu);
67 kaddr = rcu_dereference(reg->kaddr);
81 struct pv_time_stolen_time_region *reg; local
83 reg = this_cpu_ptr(&stolen_time_region);
84 if (!reg->kaddr)
87 kaddr = rcu_replace_pointer(reg->kaddr, NULL, true);
97 struct pv_time_stolen_time_region *reg; local
100 reg = this_cpu_ptr(&stolen_time_region);
111 rcu_assign_pointer(reg
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/linux-master/arch/arm/boot/compressed/
H A Dfdt_check_mem_start.c68 const fdt32_t *usable, *reg, *endp; local
113 reg = fdt_getprop(fdt, offset, "linux,usable-memory", &len);
114 if (!reg)
115 reg = fdt_getprop(fdt, offset, "reg", &len);
116 if (!reg)
119 for (endp = reg + (len / sizeof(fdt32_t));
120 endp - reg >= addr_cells + size_cells;
121 reg += addr_cells + size_cells) {
122 size = get_val(reg
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/linux-master/drivers/mfd/
H A Dsmpro-core.c40 static int smpro_core_read(void *context, const void *reg, size_t reg_size, argument
52 buf[0] = *(u8 *)reg;
75 static bool smpro_core_readable_noinc_reg(struct device *dev, unsigned int reg) argument
77 return (reg == CORE_CE_ERR_DATA || reg == CORE_UE_ERR_DATA ||
78 reg == MEM_CE_ERR_DATA || reg == MEM_UE_ERR_DATA ||
79 reg == PCIE_CE_ERR_DATA || reg == PCIE_UE_ERR_DATA ||
80 reg
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/linux-master/drivers/net/ethernet/intel/i40e/
H A Di40e_diag.c10 * @reg: reg to be tested
14 u32 reg, u32 mask)
22 orig_val = rd32(hw, reg);
25 wr32(hw, reg, (pat & mask));
26 val = rd32(hw, reg);
29 "%s: reg pattern test failed - reg 0x%08x pat 0x%08x val 0x%08x\n",
30 __func__, reg, pat, val);
35 wr32(hw, reg, orig_va
13 i40e_diag_reg_pattern_test(struct i40e_hw *hw, u32 reg, u32 mask) argument
80 u32 reg, mask; local
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/linux-master/drivers/memory/
H A Dda8xx-ddrctl.c30 u32 reg; member in struct:da8xx_ddrctl_config_knob
38 .reg = 0x20,
107 u32 reg; local
131 if (knob->reg + sizeof(u32) > resource_size(res)) {
138 reg = readl(ddrctl + knob->reg);
139 reg &= knob->mask;
140 reg |= setting->val << knob->shift;
142 dev_dbg(dev, "writing 0x%08x to %s\n", reg, setting->name);
144 writel(reg, ddrct
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/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_pcs.h50 * @reg: Base address of the AN Control Register.
56 static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg, argument
60 u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
80 * @reg: Base address of the AN Control Register.
84 static inline void dwmac_rane(void __iomem *ioaddr, u32 reg, bool restart) argument
86 u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
91 writel(value, ioaddr + GMAC_AN_CTRL(reg));
97 * @reg: Base address of the AN Control Register.
105 static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane, argument
108 u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
136 dwmac_get_adv_lp(void __iomem *ioaddr, u32 reg, struct rgmii_adv *adv_lp) argument
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/linux-master/drivers/spi/
H A Dspi-sun4i.c90 static inline u32 sun4i_spi_read(struct sun4i_spi *sspi, u32 reg) argument
92 return readl(sspi->base_addr + reg);
95 static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value) argument
97 writel(value, sspi->base_addr + reg);
102 u32 reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG); local
104 reg >>= SUN4I_FIFO_STA_TF_CNT_BITS;
106 return reg & SUN4I_FIFO_STA_TF_CNT_MASK;
111 u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG); local
113 reg |= mask;
114 sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
119 u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG); local
127 u32 reg, cnt; local
165 u32 reg; local
214 u32 reg; local
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/linux-master/drivers/usb/dwc3/
H A Dcore.c109 u32 reg; local
111 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
113 reg |= DWC3_GUSB3PIPECTL_SUSPHY;
115 reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
117 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
119 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
121 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
123 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
125 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
130 u32 reg; local
145 u32 reg; local
278 u32 reg; local
295 u32 reg; local
352 u32 reg; local
384 u32 reg; local
609 u32 reg; local
862 u32 reg; local
882 u32 reg; local
1047 u32 reg; local
1077 u32 reg; local
1189 u32 reg; local
2088 u32 reg; local
2146 u32 reg; local
2323 u32 reg; local
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/linux-master/arch/arm64/boot/dts/sprd/
H A Dsharkl64.dtsi28 reg = <0 0x70000000 0 0x100>;
36 reg = <0 0x70100000 0 0x100>;
44 reg = <0 0x70200000 0 0x100>;
52 reg = <0 0x70300000 0 0x100>;
/linux-master/include/linux/mfd/
H A Dtps65090.h114 static inline int tps65090_write(struct device *dev, int reg, uint8_t val) argument
118 return regmap_write(tps->rmap, reg, val);
121 static inline int tps65090_read(struct device *dev, int reg, uint8_t *val) argument
127 ret = regmap_read(tps->rmap, reg, &temp_val);
133 static inline int tps65090_set_bits(struct device *dev, int reg, argument
138 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
141 static inline int tps65090_clr_bits(struct device *dev, int reg, argument
146 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
/linux-master/drivers/clk/sunxi/
H A Dclk-sun4i-pll3.c27 void __iomem *reg; local
34 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
35 if (IS_ERR(reg)) {
44 gate->reg = reg;
52 mult->reg = reg;
84 iounmap(reg);
/linux-master/sound/soc/codecs/
H A Drl6347a.h28 int rl6347a_hw_write(void *context, unsigned int reg, unsigned int value);
29 int rl6347a_hw_read(void *context, unsigned int reg, unsigned int *value);
/linux-master/drivers/scsi/qla4xxx/
H A Dql4_inline.h42 &ha->reg->u1.isp4022.intr_mask);
43 readl(&ha->reg->u1.isp4022.intr_mask);
45 writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
46 readl(&ha->reg->ctrl_status);
56 &ha->reg->u1.isp4022.intr_mask);
57 readl(&ha->reg->u1.isp4022.intr_mask);
59 writel(clr_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status);
60 readl(&ha->reg->ctrl_status);
/linux-master/include/linux/spi/
H A Dmax7301.h18 int (*write)(struct device *dev, unsigned int reg, unsigned int val);
19 int (*read)(struct device *dev, unsigned int reg);
/linux-master/arch/arm/lib/
H A Dmemcpy.S17 .macro ldr1w ptr reg abort
18 W(ldr) \reg, [\ptr], #4
29 .macro ldr1b ptr reg cond=al abort
30 ldrb\cond \reg, [\ptr], #1
33 .macro str1w ptr reg abort
34 W(str) \reg, [\ptr], #4
41 .macro str1b ptr reg cond=al abort
42 strb\cond \reg, [\ptr], #1
/linux-master/drivers/gpu/drm/i915/
H A Di915_ioctl.c45 struct drm_i915_reg_read *reg = data; local
62 entry_offset == (reg->offset & -entry->size))
71 flags = reg->offset & (entry->size - 1);
75 reg->val = intel_uncore_read64_2x32(uncore,
79 reg->val = intel_uncore_read64(uncore,
82 reg->val = intel_uncore_read(uncore, entry->offset_ldw);
84 reg->val = intel_uncore_read16(uncore,
87 reg->val = intel_uncore_read8(uncore,
/linux-master/sound/pci/
H A Dad1889.c68 u16 reg; /* reg setup */ member in struct:ad1889_register_state
97 ad1889_readw(struct snd_ad1889 *chip, unsigned reg) argument
99 return readw(chip->iobase + reg);
103 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) argument
105 writew(val, chip->iobase + reg);
109 ad1889_readl(struct snd_ad1889 *chip, unsigned reg) argument
111 return readl(chip->iobase + reg);
115 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) argument
117 writel(val, chip->iobase + reg);
184 u16 reg; local
228 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) argument
235 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) argument
340 u16 reg; local
390 u16 reg; local
624 u16 reg; local
722 u16 reg; local
[all...]
/linux-master/tools/testing/selftests/kvm/include/x86_64/
H A Dapic.h73 static inline uint32_t xapic_read_reg(unsigned int reg) argument
75 return ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2];
78 static inline void xapic_write_reg(unsigned int reg, uint32_t val) argument
80 ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
83 static inline uint64_t x2apic_read_reg(unsigned int reg) argument
85 return rdmsr(APIC_BASE_MSR + (reg >> 4));
88 static inline void x2apic_write_reg(unsigned int reg, uint64_t value) argument
90 wrmsr(APIC_BASE_MSR + (reg >> 4), value);
/linux-master/drivers/media/platform/amphion/
H A Dvpu_core.h9 void csr_writel(struct vpu_core *core, u32 reg, u32 val);
10 u32 csr_readl(struct vpu_core *core, u32 reg);
/linux-master/arch/arm/mach-qcom/
H A Dplatsmp.c82 void __iomem *reg; local
96 reg = of_iomap(acc_node, 0);
97 if (!reg) {
104 writel(reg_val, reg + APCS_CPU_PWR_CTL);
107 writel(BHS_EN | (0x10 << BHS_CNT_SHIFT), reg + APC_PWR_GATE_CTL);
112 writel(reg_val, reg + APCS_CPU_PWR_CTL);
114 writel(reg_val, reg + APCS_CPU_PWR_CTL);
118 writel(reg_val, reg + APCS_CPU_PWR_CTL);
123 writel(reg_val, reg + APCS_CPU_PWR_CTL);
125 writel(reg_val, reg
138 void __iomem *reg, *saw_reg; local
216 void __iomem *reg; local
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