Lines Matching refs:reg
110 u32 reg;
112 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
114 reg |= DWC3_GUSB3PIPECTL_SUSPHY;
116 reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
118 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
120 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
122 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
124 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
126 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
131 u32 reg;
133 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
134 reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG));
135 reg |= DWC3_GCTL_PRTCAPDIR(mode);
136 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
146 u32 reg;
195 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
196 reg |= DWC3_GCTL_CORESOFTRESET;
197 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
207 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
208 reg &= ~DWC3_GCTL_CORESOFTRESET;
209 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
233 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
234 reg |= DWC3_GUCTL3_SPLITDISABLE;
235 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
284 u32 reg;
290 reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE);
292 return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg);
301 u32 reg;
312 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
313 reg |= DWC3_DCTL_CSFTRST;
314 reg &= ~DWC3_DCTL_RUN_STOP;
315 dwc3_gadget_dctl_write_safe(dwc, reg);
327 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
328 if (!(reg & DWC3_DCTL_CSFTRST))
358 u32 reg;
367 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
368 dft = reg & DWC3_GFLADJ_30MHZ_MASK;
370 reg &= ~DWC3_GFLADJ_30MHZ_MASK;
371 reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj;
372 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
390 u32 reg;
404 reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
405 reg &= ~DWC3_GUCTL_REFCLKPER_MASK;
406 reg |= FIELD_PREP(DWC3_GUCTL_REFCLKPER_MASK, period);
407 dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
435 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
436 reg &= ~DWC3_GFLADJ_REFCLK_FLADJ_MASK
439 reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj)
444 reg |= DWC3_GFLADJ_REFCLK_LPM_SEL;
446 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
620 u32 reg;
622 reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index));
628 reg &= ~DWC3_GUSB3PIPECTL_UX_EXIT_PX;
640 reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
643 reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK;
646 reg |= DWC3_GUSB3PIPECTL_DISRXDETINP3;
649 reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;
652 reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
655 reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
658 reg |= DWC3_GUSB3PIPECTL_LFPSFILT;
661 reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL;
664 reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(dwc->tx_de_emphasis);
667 reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
669 dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg);
676 u32 reg;
678 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index));
685 reg &= ~DWC3_GUSB2PHYCFG_ULPI_UTMI;
689 reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI;
690 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
693 if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI))
704 reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
706 reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
710 reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
712 reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
728 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
731 reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
733 reg |= DWC3_GUSB2PHYCFG_ENBLSLPM;
736 reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
746 reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV;
748 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg);
940 u32 reg;
942 reg = dwc3_readl(dwc->regs, DWC3_GSNPSID);
943 dwc->ip = DWC3_GSNPS_ID(reg);
947 dwc->revision = reg;
960 u32 reg;
962 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
963 reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
982 reg |= DWC3_GCTL_DSBLCLKGTNG | DWC3_GCTL_SOFITPSYNC;
984 reg &= ~DWC3_GCTL_DSBLCLKGTNG;
991 reg |= DWC3_GCTL_GBLHIBERNATIONEN;
1008 reg |= DWC3_GCTL_DISSCRAMBLE;
1010 reg &= ~DWC3_GCTL_DISSCRAMBLE;
1013 reg |= DWC3_GCTL_U2EXIT_LFPS;
1022 reg |= DWC3_GCTL_U2RSTECN;
1024 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1125 u32 reg;
1144 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
1145 if ((reg & DWC3_GCTL_PWRDNSCALE_MASK) < DWC3_GCTL_PWRDNSCALE(scale) ||
1146 (reg & DWC3_GCTL_PWRDNSCALE_MASK) > DWC3_GCTL_PWRDNSCALE(scale*3)) {
1147 reg &= ~(DWC3_GCTL_PWRDNSCALE_MASK);
1148 reg |= DWC3_GCTL_PWRDNSCALE(scale);
1149 dwc3_writel(dwc->regs, DWC3_GCTL, reg);
1155 u32 reg;
1172 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1173 reg |= DWC31_RXTHRNUMPKTSEL_PRD;
1175 reg &= ~DWC31_RXTHRNUMPKT_PRD(~0);
1176 reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num);
1178 reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0);
1179 reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst);
1181 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1185 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1186 reg |= DWC31_TXTHRNUMPKTSEL_PRD;
1188 reg &= ~DWC31_TXTHRNUMPKT_PRD(~0);
1189 reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num);
1191 reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0);
1192 reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst);
1194 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1205 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1206 reg |= DWC3_GRXTHRCFG_PKTCNTSEL;
1208 reg &= ~DWC3_GRXTHRCFG_RXPKTCNT(~0);
1209 reg |= DWC3_GRXTHRCFG_RXPKTCNT(rx_thr_num);
1211 reg &= ~DWC3_GRXTHRCFG_MAXRXBURSTSIZE(~0);
1212 reg |= DWC3_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst);
1214 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1218 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1219 reg |= DWC3_GTXTHRCFG_PKTCNTSEL;
1221 reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0);
1222 reg |= DWC3_GTXTHRCFG_TXPKTCNT(tx_thr_num);
1224 reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0);
1225 reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
1227 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1231 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1232 reg |= DWC31_GRXTHRCFG_PKTCNTSEL;
1234 reg &= ~DWC31_GRXTHRCFG_RXPKTCNT(~0);
1235 reg |= DWC31_GRXTHRCFG_RXPKTCNT(rx_thr_num);
1237 reg &= ~DWC31_GRXTHRCFG_MAXRXBURSTSIZE(~0);
1238 reg |= DWC31_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst);
1240 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1244 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG);
1245 reg |= DWC31_GTXTHRCFG_PKTCNTSEL;
1247 reg &= ~DWC31_GTXTHRCFG_TXPKTCNT(~0);
1248 reg |= DWC31_GTXTHRCFG_TXPKTCNT(tx_thr_num);
1250 reg &= ~DWC31_GTXTHRCFG_MAXTXBURSTSIZE(~0);
1251 reg |= DWC31_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
1253 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg);
1267 u32 reg;
1339 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2);
1340 reg |= DWC3_GUCTL2_RST_ACTBITLATER;
1341 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg);
1354 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
1355 reg |= DWC3_GUCTL1_RESUME_OPMODE_HS_HOST;
1356 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
1360 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
1367 reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW;
1376 reg |= DWC3_GUCTL1_DEV_DECOUPLE_L1L2_EVT;
1379 reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS;
1382 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS;
1385 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
1390 reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
1392 reg &= ~DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
1395 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
1407 reg = dwc3_readl(dwc->regs, DWC3_LLUCTL);
1408 reg |= DWC3_LLUCTL_FORCE_GEN1;
1409 dwc3_writel(dwc->regs, DWC3_LLUCTL, reg);
2254 u32 reg;
2275 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
2276 reg |= DWC3_GUSB2PHYCFG_ENBLSLPM |
2278 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
2317 u32 reg;
2339 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i));
2341 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
2344 reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
2346 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
2499 u32 reg;
2503 reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
2504 reg |= DWC3_GUCTL3_SPLITDISABLE;
2505 dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);