drivers/spi/spi-sun4i.c

90 static inline u32 sun4i_spi_read(struct sun4i_spi *sspi, u32 reg)
92 	return readl(sspi->base_addr + reg);
95 static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value)
97 	writel(value, sspi->base_addr + reg);
102 	u32 reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG);
104 	reg >>= SUN4I_FIFO_STA_TF_CNT_BITS;
106 	return reg & SUN4I_FIFO_STA_TF_CNT_MASK;
111 	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
113 	reg |= mask;
114 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
119 	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
121 	reg &= ~mask;
122 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
127 	u32 reg, cnt;
131 	reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG);
132 	reg &= SUN4I_FIFO_STA_RF_CNT_MASK;
133 	cnt = reg >> SUN4I_FIFO_STA_RF_CNT_BITS;
165 	u32 reg;
167 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
169 	reg &= ~SUN4I_CTL_CS_MASK;
170 	reg |= SUN4I_CTL_CS(spi_get_chipselect(spi, 0));
173 	reg |= SUN4I_CTL_CS_MANUAL;
176 		reg |= SUN4I_CTL_CS_LEVEL;
178 		reg &= ~SUN4I_CTL_CS_LEVEL;
192 		reg &= ~SUN4I_CTL_CS_ACTIVE_LOW;
194 		reg |= SUN4I_CTL_CS_ACTIVE_LOW;
196 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
214 	u32 reg;
232 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
236 			reg | SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST);
243 		reg |= SUN4I_CTL_CPOL;
245 		reg &= ~SUN4I_CTL_CPOL;
248 		reg |= SUN4I_CTL_CPHA;
250 		reg &= ~SUN4I_CTL_CPHA;
253 		reg |= SUN4I_CTL_LMTF;
255 		reg &= ~SUN4I_CTL_LMTF;
263 		reg &= ~SUN4I_CTL_DHB;
265 		reg |= SUN4I_CTL_DHB;
267 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
295 		reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
298 		reg = SUN4I_CLK_CTL_CDR1(div);
301 	sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg);
326 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
327 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);