Searched refs:clk (Results 251 - 275 of 4090) sorted by relevance

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/linux-master/drivers/pwm/
H A Dpwm-jz4740.c11 #include <linux/clk.h>
29 struct clk *clk[]; member in struct:jz4740_pwm_chip
52 struct clk *clk; local
61 clk = clk_get(pwmchip_parent(chip), name);
62 if (IS_ERR(clk)) {
64 "error %pe: Failed to get clock\n", clk); local
65 return PTR_ERR(clk);
68 err = clk_prepare_enable(clk);
82 struct clk *clk = jz->clk[pwm->hwpwm]; local
128 struct clk *clk = jz->clk[pwm->hwpwm]; local
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/linux-master/drivers/clk/sunxi/
H A Dclk-a20-gmac.c10 #include <linux/clk-provider.h>
35 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
36 * Ext. 125MHz RGMII TX clk >--|__divider__/ |
55 struct clk *clk; local
91 clk = clk_register_composite(NULL, clk_name,
98 if (IS_ERR(clk))
101 of_clk_add_provider(node, of_clk_src_simple_get, clk);
112 CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk",
/linux-master/drivers/firmware/arm_scmi/
H A Dclock.c165 struct scmi_clock_info *clk; member in struct:clock_info
187 return ci->clk + clk_id;
229 struct scmi_clock_info *clk; member in struct:scmi_clk_ipriv
260 p->clk->num_parents = st->num_returned + st->num_remaining;
261 p->clk->parents = devm_kcalloc(dev, p->clk->num_parents,
262 sizeof(*p->clk->parents),
264 if (!p->clk->parents) {
265 p->clk->num_parents = 0;
282 u32 *parent = &p->clk
289 scmi_clock_possible_parents(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk) argument
319 scmi_clock_get_permissions(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk) argument
355 struct scmi_clock_info *clk = cinfo->clk + clk_id; local
505 scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, struct scmi_clock_info *clk) argument
574 struct scmi_clock_info *clk; local
659 struct scmi_clock_info *clk; local
755 struct scmi_clock_info *clk; local
772 struct scmi_clock_info *clk; local
873 struct scmi_clock_info *clk; local
892 struct scmi_clock_info *clk; local
915 struct scmi_clock_info *clk; local
946 struct scmi_clock_info *clk; local
1088 struct scmi_clock_info *clk = cinfo->clk + clkid; local
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/linux-master/drivers/clk/meson/
H A Dclk-pll.c29 #include <linux/clk-provider.h>
36 #include "clk-regmap.h"
37 #include "clk-pll.h"
40 meson_clk_pll_data(struct clk_regmap *clk) argument
42 return (struct meson_clk_pll_data *)clk->data;
74 struct clk_regmap *clk = to_clk_regmap(hw); local
75 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
78 n = meson_parm_read(clk->map, &pll->n);
88 m = meson_parm_read(clk->map, &pll->m);
91 meson_parm_read(clk
247 struct clk_regmap *clk = to_clk_regmap(hw); local
277 struct clk_regmap *clk = to_clk_regmap(hw); local
294 struct clk_regmap *clk = to_clk_regmap(hw); local
313 struct clk_regmap *clk = to_clk_regmap(hw); local
343 struct clk_regmap *clk = to_clk_regmap(hw); local
388 struct clk_regmap *clk = to_clk_regmap(hw); local
406 struct clk_regmap *clk = to_clk_regmap(hw); local
[all...]
H A Dclk-regmap.c8 #include "clk-regmap.h"
12 struct clk_regmap *clk = to_clk_regmap(hw); local
13 struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);
18 return regmap_update_bits(clk->map, gate->offset, BIT(gate->bit_idx),
34 struct clk_regmap *clk = to_clk_regmap(hw); local
35 struct clk_regmap_gate_data *gate = clk_get_regmap_gate_data(clk);
38 regmap_read(clk->map, gate->offset, &val);
62 struct clk_regmap *clk = to_clk_regmap(hw); local
63 struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk);
67 ret = regmap_read(clk
81 struct clk_regmap *clk = to_clk_regmap(hw); local
106 struct clk_regmap *clk = to_clk_regmap(hw); local
138 struct clk_regmap *clk = to_clk_regmap(hw); local
154 struct clk_regmap *clk = to_clk_regmap(hw); local
166 struct clk_regmap *clk = to_clk_regmap(hw); local
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/linux-master/drivers/clocksource/
H A Dtimer-pxa.c15 #include <linux/clk.h>
179 struct clk *clk; local
189 clk = of_clk_get(np, 0);
190 if (IS_ERR(clk)) {
191 pr_crit("%pOFn: unable to get clk\n", np);
192 return PTR_ERR(clk);
195 ret = clk_prepare_enable(clk);
208 return pxa_timer_common_init(irq, clk_get_rate(clk));
217 struct clk *cl local
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/linux-master/drivers/phy/qualcomm/
H A Dphy-qcom-usb-hsic.c12 #include <linux/clk.h>
21 struct clk *phy_clk;
22 struct clk *cal_clk;
23 struct clk *cal_sleep_clk;
108 struct clk *clk; local
120 uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
121 if (IS_ERR(clk))
122 return PTR_ERR(clk);
124 uphy->cal_clk = clk
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/linux-master/drivers/clk/tegra/
H A Dclk-bpmp.c6 #include <linux/clk-provider.h>
60 const struct tegra_bpmp_clk_message *clk)
68 request.cmd_and_id = (clk->cmd << 24) | clk->id;
77 memcpy(req + 4, clk->tx.data, clk->tx.size);
83 msg.rx.data = clk->rx.data;
84 msg.rx.size = clk->rx.size;
97 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
102 msg.id = clk
59 tegra_bpmp_clk_transfer(struct tegra_bpmp *bpmp, const struct tegra_bpmp_clk_message *clk) argument
109 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
125 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
146 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
170 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
201 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
229 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
258 struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw); local
507 struct tegra_bpmp_clk *clk; local
600 struct tegra_bpmp_clk *clk; local
664 struct tegra_bpmp_clk *clk = bpmp->clocks[i]; local
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H A Dclk-tegra-audio.c7 #include <linux/clk-provider.h>
12 #include <linux/clk/tegra.h>
14 #include "clk.h"
15 #include "clk-id.h"
135 struct clk *clk; local
136 struct clk **dt_clk;
145 clk = clk_register_mux(NULL, data->mux_name, mux_names,
150 *dt_clk = clk;
156 clk
168 struct clk *clk; local
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/linux-master/drivers/clk/ti/
H A Dapll.c10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
20 #include <linux/clk/ti.h>
34 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
41 ad = clk->dpll_data;
45 clk_name = clk_hw_get_name(&clk->hw);
85 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
90 ad = clk->dpll_data;
102 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
106 ad = clk
135 struct clk *clk; local
237 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
252 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
262 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
293 struct clk_hw_omap *clk = to_clk_hw_omap(hw); local
310 omap2_apll_set_autoidle(struct clk_hw_omap *clk, u32 val) argument
324 omap2_apll_allow_idle(struct clk_hw_omap *clk) argument
329 omap2_apll_deny_idle(struct clk_hw_omap *clk) argument
345 struct clk *clk; local
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H A Dcomposite.c10 #include <linux/clk-provider.h>
15 #include <linux/clk/ti.h>
98 static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx) argument
100 if (!clk)
103 if (!clk->comp_clks[idx])
106 return clk->comp_clks[idx]->hw;
115 struct clk *clk; local
169 clk = clk_register_composite(NULL, name,
178 if (!IS_ERR(clk)) {
241 struct component_clk *clk; local
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/linux-master/sound/soc/mediatek/mt8188/
H A Dmt8188-afe-clk.c3 * mt8188-afe-clk.c -- MediaTek 8188 afe clock ctrl
11 #include <linux/clk.h>
14 #include "mt8188-afe-clk.h"
15 #include "mt8188-audsys-clk.h"
258 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]);
259 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]);
262 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]);
263 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]);
279 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]);
280 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APL
439 mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk) argument
457 mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk) argument
466 mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, unsigned int rate) argument
483 mt8188_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, struct clk *parent) argument
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c29 getMNP_single(struct nvkm_subdev *subdev, struct nvbios_pll *info, int clk, argument
37 * "clk" parameter in kHz
59 if (clk > 250000)
61 if (clk > 340000)
64 if (clk > 150000)
66 if (clk > 200000)
68 if (clk > 340000)
74 if ((clk * P) < minvco) {
75 minvco = clk * maxP;
79 if (clk
128 getMNP_double(struct nvkm_subdev *subdev, struct nvbios_pll *info, int clk, int *pN1, int *pM1, int *pN2, int *pM2, int *pP) argument
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/linux-master/arch/arm/kernel/
H A Dsmp_twd.c10 #include <linux/clk.h>
28 static struct clk *twd_clk;
37 static int twd_shutdown(struct clock_event_device *clk) argument
43 static int twd_set_oneshot(struct clock_event_device *clk) argument
51 static int twd_set_periodic(struct clock_event_device *clk) argument
94 struct clock_event_device *clk = raw_cpu_ptr(twd_evt); local
96 twd_shutdown(clk);
97 disable_percpu_irq(clk->irq);
221 struct clock_event_device *clk = raw_cpu_ptr(twd_evt); local
230 clockevents_register_device(clk);
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/linux-master/drivers/clk/
H A Dclk-qoriq.c12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
39 struct clk *clk; member in struct:clockgen_pll_div
91 struct clk *sysclk, *coreclk;
93 struct clk *cmux[NUM_CMUX];
94 struct clk *hwaccel[NUM_HWACCEL];
95 struct clk *fman[2];
476 cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk;
478 cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;
918 struct clk *clk; local
1079 struct clk *clk; local
1110 input_clock(const char *name, struct clk *clk) argument
1128 struct clk *clk; local
1139 struct clk *clk; local
1151 struct clk *clk; local
1179 struct clk *clk; local
1200 struct clk *clk; local
1273 struct clk *clk; local
1390 struct clk *clk; local
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/linux-master/drivers/clk/imx/
H A Dclk-cpu.c6 #include <linux/clk.h>
7 #include <linux/clk-provider.h>
10 #include "clk.h"
14 struct clk *div;
15 struct clk *mux;
16 struct clk *pll;
17 struct clk *step;
74 struct clk *div, struct clk *mux, struct clk *pl
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/linux-master/drivers/clk/renesas/
H A Dclk-rz.c9 #include <linux/clk-provider.h>
10 #include <linux/clk/renesas.h>
46 static struct clk * __init
85 struct clk **clks;
105 struct clk *clk; local
109 clk = rz_cpg_register_clock(np, base, name);
110 if (IS_ERR(clk))
112 __func__, np, name, PTR_ERR(clk));
114 data->clks[i] = clk;
[all...]
H A Dclk-r8a7779.c10 #include <linux/clk-provider.h>
11 #include <linux/clk/renesas.h>
83 static struct clk * __init
117 struct clk **clks;
148 struct clk *clk; local
153 clk = r8a7779_cpg_register_clock(np, config, plla_mult, name);
154 if (IS_ERR(clk))
156 __func__, np, name, PTR_ERR(clk));
158 data->clks[i] = clk;
[all...]
H A Dclk-r8a7778.c8 #include <linux/clk-provider.h>
9 #include <linux/clk/renesas.h>
43 static struct clk * __init
74 struct clk **clks;
110 struct clk *clk; local
115 clk = r8a7778_cpg_register_clock(np, name);
116 if (IS_ERR(clk))
118 __func__, np, name, PTR_ERR(clk));
120 data->clks[i] = clk;
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/linux-master/drivers/mfd/
H A Datmel-flexcom.c18 #include <linux/clk.h>
34 struct clk *clk; member in struct:atmel_flexcom
61 ddata->clk = devm_clk_get(&pdev->dev, NULL);
62 if (IS_ERR(ddata->clk))
63 return PTR_ERR(ddata->clk);
65 err = clk_prepare_enable(ddata->clk);
77 clk_disable_unprepare(ddata->clk);
94 err = clk_prepare_enable(ddata->clk);
101 clk_disable_unprepare(ddata->clk);
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/linux-master/drivers/phy/marvell/
H A Dphy-mvebu-sata.c10 #include <linux/clk.h>
17 struct clk *clk; member in struct:priv
34 clk_prepare_enable(priv->clk);
47 clk_disable_unprepare(priv->clk);
57 clk_prepare_enable(priv->clk);
70 clk_disable_unprepare(priv->clk);
95 priv->clk = devm_clk_get(&pdev->dev, "sata");
96 if (IS_ERR(priv->clk))
97 return PTR_ERR(priv->clk);
[all...]
/linux-master/sound/soc/sh/rcar/
H A Dadg.c6 #include <linux/clk-provider.h>
33 struct clk *clkin[CLKINMAX];
34 struct clk *clkout[CLKOUTMAX];
35 struct clk *null_clk;
313 struct clk *clk; local
326 for_each_rsnd_clkin(clk, adg, i)
381 struct clk *clk; local
390 for_each_rsnd_clkin(clk, ad
411 struct clk *clk; local
447 struct clk *clk; local
485 struct clk *clk; local
495 struct clk *clk; local
707 struct clk *clk; local
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c27 #include <subdev/clk.h>
40 struct nvkm_clk *clk = ctrl->device->clk; local
50 if (clk) {
51 args->v0.count = clk->state_nr;
52 args->v0.ustate_ac = clk->ustate_ac;
53 args->v0.ustate_dc = clk->ustate_dc;
54 args->v0.pwrsrc = clk->pwrsrc;
55 args->v0.pstate = clk->pstate;
73 struct nvkm_clk *clk local
146 struct nvkm_clk *clk = ctrl->device->clk; local
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/linux-master/drivers/clk/keystone/
H A Dpll.c9 #include <linux/clk-provider.h>
120 static struct clk *clk_register_pll(struct device *dev,
127 struct clk *clk; local
142 clk = clk_register(NULL, &pll->hw);
143 if (IS_ERR(clk))
146 return clk;
162 struct clk *clk; local
211 clk
253 struct clk *clk; local
302 struct clk *clk; local
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/linux-master/arch/sh/boards/mach-sdk7786/
H A Dsetup.c16 #include <linux/clk.h>
164 static int sdk7786_pcie_clk_enable(struct clk *clk) argument
170 static void sdk7786_pcie_clk_disable(struct clk *clk) argument
180 static struct clk sdk7786_pcie_clk = {
186 .clk = &sdk7786_pcie_clk,
191 struct clk *clk; local
201 clk
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