Searched refs:rd (Results 26 - 50 of 373) sorted by relevance

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/linux-master/arch/arm/include/debug/
H A Dstm32.S26 .macro senduart,rd,rx
27 strb \rd, [\rx, #STM32_USART_TDR_OFF]
30 .macro waituartcts,rd,rx
33 .macro waituarttxrdy,rd,rx
34 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
35 tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
39 .macro busyuart,rd,rx
40 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
41 tst \rd, #STM32_USART_TC @ TC = 1 = tx complete
H A Domap2plus.S63 .macro senduart,rd,rx
64 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
66 strb \rd, [\rx] @ send lower byte of rd
67 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
68 bic \rd, \rd, #(0xff << 24) @ restore original rd
71 .macro busyuart,rd,r
[all...]
H A Dat91.S18 .macro senduart,rd,rx
19 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
22 .macro waituarttxrdy,rd,rx
23 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
24 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
28 .macro waituartcts,rd,rx
31 .macro busyuart,rd,rx
32 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
33 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
H A Dvf.S22 .macro senduart, rd, rx
23 strb \rd, [\rx, #0x7] @ Data Register
26 .macro busyuart, rd, rx
27 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1
28 tst \rd, #1 << 6 @ TC
32 .macro waituartcts,rd,rx
35 .macro waituarttxrdy,rd,rx
H A Dsa1100.S50 .macro senduart,rd,rx
51 str \rd, [\rx, #UTDR]
54 .macro waituartcts,rd,rx
57 .macro waituarttxrdy,rd,rx
58 1001: ldr \rd, [\rx, #UTSR1]
59 tst \rd, #UTSR1_TNF
63 .macro busyuart,rd,rx
64 1001: ldr \rd, [\rx, #UTSR1]
65 tst \rd, #UTSR1_TBY
H A Dbrcmstb.S122 .macro store, rd, rx:vararg
123 ARM_BE8( rev \rd, \rd )
124 str \rd, \rx
127 .macro load, rd, rx:vararg
128 ldr \rd, \rx
129 ARM_BE8( rev \rd, \rd )
132 .macro senduart,rd,rx
133 store \rd, [\r
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/linux-master/drivers/powercap/
H A Dintel_rapl_common.c123 static bool is_pl_valid(struct rapl_domain *rd, int pl) argument
127 return rd->rpl[pl].name ? true : false;
130 static int get_pl_lock_prim(struct rapl_domain *rd, int pl) argument
132 if (rd->rp->priv->type == RAPL_IF_TPMI) {
149 if (rd->rp->priv->limits[rd->id] & BIT(POWER_LIMIT2))
154 static int get_pl_prim(struct rapl_domain *rd, int pl, enum pl_prims prim) argument
160 if (prim == PL_CLAMP && rd->rp->priv->type != RAPL_IF_TPMI)
169 return get_pl_lock_prim(rd, pl);
174 if (prim == PL_CLAMP && rd
280 struct rapl_domain *rd; local
302 struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev); local
310 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); local
325 find_nr_power_limit(struct rapl_domain *rd) argument
339 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); local
354 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); local
420 contraint_to_pl(struct rapl_domain *rd, int cid) argument
438 struct rapl_domain *rd; local
458 struct rapl_domain *rd; local
479 struct rapl_domain *rd; local
496 struct rapl_domain *rd; local
517 struct rapl_domain *rd; local
530 struct rapl_domain *rd; local
572 struct rapl_domain *rd = rp->domains; local
609 rapl_unit_xlate(struct rapl_domain *rd, enum unit_type type, u64 value, int to_raw) argument
772 prim_fixups(struct rapl_domain *rd, enum rapl_primitives prim) argument
813 rapl_read_data_raw(struct rapl_domain *rd, enum rapl_primitives prim, bool xlate, u64 *data) argument
852 rapl_write_data_raw(struct rapl_domain *rd, enum rapl_primitives prim, unsigned long long value) argument
880 rapl_read_pl_data(struct rapl_domain *rd, int pl, enum pl_prims pl_prim, bool xlate, u64 *data) argument
891 rapl_write_pl_data(struct rapl_domain *rd, int pl, enum pl_prims pl_prim, unsigned long long value) argument
918 rapl_check_unit_core(struct rapl_domain *rd) argument
946 rapl_check_unit_atom(struct rapl_domain *rd) argument
1038 set_floor_freq_default(struct rapl_domain *rd, bool mode) argument
1053 set_floor_freq_atom(struct rapl_domain *rd, bool enable) argument
1077 rapl_compute_time_window_core(struct rapl_domain *rd, u64 value, bool to_raw) argument
1110 rapl_compute_time_window_atom(struct rapl_domain *rd, u64 value, bool to_raw) argument
1133 rapl_check_unit_tpmi(struct rapl_domain *rd) argument
1313 struct rapl_domain *rd; local
1415 rapl_get_domain_unit(struct rapl_domain *rd) argument
1453 rapl_detect_powerlimit(struct rapl_domain *rd) argument
1477 struct rapl_domain *rd; local
1512 struct rapl_domain *rd, *rd_package = NULL; local
1636 struct rapl_domain *rd; local
1657 struct rapl_domain *rd; local
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/linux-master/arch/arm/lib/
H A Dio-writesb.S10 .macro outword, rd
12 strb \rd, [r0]
13 mov \rd, \rd, lsr #8
14 strb \rd, [r0]
15 mov \rd, \rd, lsr #8
16 strb \rd, [r0]
17 mov \rd, \rd, ls
[all...]
/linux-master/arch/parisc/net/
H A Dbpf_jit_comp64.c70 static void emit_hppa_copy(const s8 rs, const s8 rd, struct hppa_jit_context *ctx) argument
72 REG_SET_SEEN(ctx, rd);
73 if (OPTIMIZE_HPPA && (rs == rd))
76 emit(hppa_copy(rs, rd), ctx);
135 static void emit_imm32(u8 rd, s32 imm, struct hppa_jit_context *ctx) argument
139 REG_SET_SEEN(ctx, rd);
141 emit(hppa_ldi(imm, rd), ctx);
145 emit(hppa_ldo(lower, HPPA_REG_ZERO, rd), ctx);
148 emit(hppa_ldil(imm, rd), ctx);
151 emit(hppa_ldo(lower, rd, r
160 emit_imm(u8 rd, s64 imm, u8 tmpreg, struct hppa_jit_context *ctx) argument
248 emit_branch(u8 op, u8 rd, u8 rs, signed long paoff, struct hppa_jit_context *ctx) argument
407 init_regs(u8 *rd, u8 *rs, const struct bpf_insn *insn, struct hppa_jit_context *ctx) argument
428 emit_zext_32_rd_rs(u8 *rd, u8 *rs, struct hppa_jit_context *ctx) argument
436 emit_sext_32_rd_rs(u8 *rd, u8 *rs, struct hppa_jit_context *ctx) argument
444 emit_zext_32_rd_t1(u8 *rd, struct hppa_jit_context *ctx) argument
451 emit_sext_32_rd(u8 *rd, struct hppa_jit_context *ctx) argument
554 emit_store(const s8 rd, const s8 rs, s16 off, struct hppa_jit_context *ctx, const u8 size, const u8 mode) argument
600 u8 rd = -1, rs = -1, code = insn->code; local
906 emit_branch(BPF_OP(code), rd, rs, paoff, ctx); local
949 emit_branch(BPF_OP(code), rd, rs, paoff, ctx); local
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H A Dbpf_jit_comp32.c120 static void emit_hppa_copy(const s8 rs, const s8 rd, struct hppa_jit_context *ctx) argument
122 REG_SET_SEEN(ctx, rd);
123 if (OPTIMIZE_HPPA && (rs == rd))
126 emit(hppa_copy(rs, rd), ctx);
141 static void emit_imm(const s8 rd, s32 imm, struct hppa_jit_context *ctx) argument
145 REG_SET_SEEN(ctx, rd);
147 emit(hppa_ldi(imm, rd), ctx);
150 emit(hppa_ldil(imm, rd), ctx);
153 emit(hppa_ldo(lower, rd, rd), ct
156 emit_imm32(const s8 *rd, s32 imm, struct hppa_jit_context *ctx) argument
170 emit_imm64(const s8 *rd, s32 imm_hi, s32 imm_lo, struct hppa_jit_context *ctx) argument
425 const s8 *rd; local
513 const s8 *rd = bpf_get_reg32(dst, tmp1, ctx); local
569 const s8 *rd; local
637 const s8 *rd; local
789 emit_bcc(u8 op, u8 rd, u8 rs, int paoff, struct hppa_jit_context *ctx) argument
1011 const s8 *rd = bpf_get_reg64_ref(dst, tmp1, ctx->prog->aux->verifier_zext, ctx); local
1058 const s8 *rd = bpf_get_reg64(dst, tmp1, ctx); local
1092 emit_rev16(const s8 rd, struct hppa_jit_context *ctx) argument
1099 emit_rev32(const s8 rs, const s8 rd, struct hppa_jit_context *ctx) argument
1108 const s8 *rd; local
1245 const s8 *rd = bpf_get_reg64(dst, tmp1, ctx); local
1271 const s8 *rd = bpf_get_reg64(dst, tmp1, ctx); local
1406 const s8 *rd = bpf_get_reg64_ref(dst, tmp1, false, ctx); local
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/linux-master/arch/arm/mach-tegra/
H A Dsleep.h51 .macro cpu_to_halt_reg rd, rcpu
53 subne \rd, \rcpu, #1 variable
54 movne \rd, \rd, lsl #3 variable
55 addne \rd, \rd, #0x14 variable
56 moveq \rd, #0 variable
60 .macro cpu_to_csr_reg rd, rcpu
62 subne \rd, \rcpu, #1 variable
63 movne \rd, \r variable
64 addne \\rd, \\rd, #0x18 variable
65 moveq \\rd, #8 variable
70 mrc p15, 0, \\rd, c0, c0, 5 variable
71 and \\rd, \\rd, #0xF variable
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H A Dsleep-tegra30.S83 .macro emc_device_mask, rd, base
84 ldr \rd, [\base, #EMC_ADR_CFG]
85 tst \rd, #0x1
86 moveq \rd, #(0x1 << 8) @ just 1 device
87 movne \rd, #(0x3 << 8) @ 2 devices
90 .macro emc_timing_update, rd, base
91 mov \rd, #1
92 str \rd, [\base, #EMC_TIMING_CONTROL]
94 ldr \rd, [\base, #EMC_EMC_STATUS]
95 tst \rd, #(
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/linux-master/arch/riscv/net/
H A Dbpf_jit_comp64.c145 /* Modify rd pointer to alternate reg to avoid corrupting original reg */
146 static void emit_sextw_alt(u8 *rd, u8 ra, struct rv_jit_context *ctx) argument
148 emit_sextw(ra, *rd, ctx);
149 *rd = ra;
152 static void emit_zextw_alt(u8 *rd, u8 ra, struct rv_jit_context *ctx) argument
154 emit_zextw(ra, *rd, ctx);
155 *rd = ra;
159 static int emit_addr(u8 rd, u64 addr, bool extra_pass, struct rv_jit_context *ctx) argument
175 emit(rv_auipc(rd, upper), ctx);
176 emit(rv_addi(rd, r
181 emit_imm(u8 rd, s64 val, struct rv_jit_context *ctx) argument
268 emit_bcc(u8 cond, u8 rd, u8 rs, int rvoff, struct rv_jit_context *ctx) argument
304 emit_branch(u8 cond, u8 rd, u8 rs, int rvoff, struct rv_jit_context *ctx) argument
395 init_regs(u8 *rd, u8 *rs, const struct bpf_insn *insn, struct rv_jit_context *ctx) argument
416 emit_jump_and_link(u8 rd, s64 rvoff, bool fixed_addr, struct rv_jit_context *ctx) argument
465 emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64, struct rv_jit_context *ctx) argument
1066 u8 rd = -1, rs = -1, code = insn->code; local
1386 emit_branch(BPF_OP(code), rd, rs, rvoff, ctx); local
1430 emit_branch(BPF_OP(code), rd, rs, rvoff, ctx); local
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/linux-master/drivers/clk/samsung/
H A Dclk-exynos5-subcmu.c21 struct exynos5_subcmu_reg_dump *rd,
24 for (; num_regs > 0; --num_regs, ++rd) {
25 rd->save = readl(base + rd->offset);
26 writel((rd->save & ~rd->mask) | rd->value, base + rd->offset);
27 rd->save &= rd
20 exynos5_subcmu_clk_save(void __iomem *base, struct exynos5_subcmu_reg_dump *rd, unsigned int num_regs) argument
31 exynos5_subcmu_clk_restore(void __iomem *base, struct exynos5_subcmu_reg_dump *rd, unsigned int num_regs) argument
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/linux-master/fs/jffs2/
H A Dwrite.c206 struct jffs2_raw_dirent *rd, const unsigned char *name,
218 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino),
219 je32_to_cpu(rd->name_crc));
221 D1(if(je32_to_cpu(rd->hdr_crc) != crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)) {
231 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino),
232 je32_to_cpu(rd->name_crc));
237 vecs[0].iov_base = rd;
205 jffs2_write_dirent(struct jffs2_sb_info *c, struct jffs2_inode_info *f, struct jffs2_raw_dirent *rd, const unsigned char *name, uint32_t namelen, int alloc_mode) argument
445 struct jffs2_raw_dirent *rd; local
551 struct jffs2_raw_dirent *rd; local
671 struct jffs2_raw_dirent *rd; local
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H A Ddir.c292 struct jffs2_raw_dirent *rd; local
386 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen,
391 rd = jffs2_alloc_raw_dirent();
392 if (!rd) {
402 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK);
403 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT);
404 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen);
405 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeo
456 struct jffs2_raw_dirent *rd; local
630 struct jffs2_raw_dirent *rd; local
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/linux-master/include/linux/
H A Draid_class.h59 struct raid_data *rd; \
61 rd = dev_get_drvdata(device); \
62 rd->attr = value; \
68 struct raid_data *rd; \
70 rd = dev_get_drvdata(device); \
71 return rd->attr; \
/linux-master/arch/loongarch/kernel/
H A Dinst.c16 unsigned int rd = insn.reg1i20_format.rd; local
26 regs->regs[rd] = pc + sign_extend64(imm << 2, 21);
29 regs->regs[rd] = pc + sign_extend64(imm << 12, 31);
32 regs->regs[rd] = pc + sign_extend64(imm << 18, 37);
35 regs->regs[rd] = pc + sign_extend64(imm << 12, 31);
36 regs->regs[rd] &= ~((1 << 12) - 1);
48 unsigned int imm, imm_l, imm_h, rd, rj; local
88 rd = insn.reg2i16_format.rd;
270 larch_insn_gen_or(enum loongarch_gpr rd, enum loongarch_gpr rj, enum loongarch_gpr rk) argument
279 larch_insn_gen_move(enum loongarch_gpr rd, enum loongarch_gpr rj) argument
284 larch_insn_gen_lu12iw(enum loongarch_gpr rd, int imm) argument
298 larch_insn_gen_lu32id(enum loongarch_gpr rd, int imm) argument
312 larch_insn_gen_lu52id(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm) argument
326 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm) argument
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/linux-master/drivers/memory/samsung/
H A Dexynos-srom.c54 struct exynos_srom_reg_dump *rd; local
57 rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
58 if (!rd)
62 rd[i].offset = rdump[i];
64 return rd;
160 struct exynos_srom_reg_dump *rd,
163 for (; num_regs > 0; --num_regs, ++rd)
164 rd->value = readl(base + rd
159 exynos_srom_save(void __iomem *base, struct exynos_srom_reg_dump *rd, unsigned int num_regs) argument
167 exynos_srom_restore(void __iomem *base, const struct exynos_srom_reg_dump *rd, unsigned int num_regs) argument
[all...]
/linux-master/arch/riscv/include/asm/
H A Dinsn-def.h25 .macro insn_r, opcode, func3, func7, rd, rs1, rs2 variable
26 .insn r \opcode, \func3, \func7, \rd, \rs1, \rs2 variable
29 .macro insn_i, opcode, func3, rd, rs1, simm12 variable
30 .insn i \opcode, \func3, \rd, \rs1, \simm12 variable
37 .macro insn_r, opcode, func3, func7, rd, rs1, rs2
41 (.L__gpr_num_\rd << INSN_R_RD_SHIFT) | \
46 .macro insn_i, opcode, func3, rd, rs1, simm12
49 (.L__gpr_num_\rd << INSN_I_RD_SHIFT) | \
63 #define __INSN_R(opcode, func3, func7, rd, rs1, rs2) \
64 ".insn r " opcode ", " func3 ", " func7 ", " rd ", " rs
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/linux-master/arch/sparc/include/asm/
H A Dbackoff.h57 88: rd %ccr, %g0; \
58 rd %ccr, %g0; \
59 rd %ccr, %g0; \
/linux-master/drivers/media/tuners/
H A Dqt1010.c22 dev_warn(&priv->i2c->dev, "%s: i2c rd failed reg=%02x\n",
51 qt1010_i2c_oper_t rd[48] = { local
123 rd[2].val = reg05;
126 rd[4].val = (freq + QT1010_OFFSET) / FREQ1;
129 if (mod1 < 8000000) rd[6].val = 0x1d;
130 else rd[6].val = 0x1c;
133 if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */
134 else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */
135 else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */
136 else if (mod1 < 4*FREQ2) rd[
[all...]
/linux-master/drivers/clk/versatile/
H A Dicst.c51 unsigned int i = 0, rd, best = (unsigned int)-1; local
74 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
79 fref_div = (2 * p->ref) / rd;
92 vco.r = rd - 2;
/linux-master/arch/arm/net/
H A Dbpf_jit_32.c469 static inline void emit_mov_i_no8m(const u8 rd, u32 val, struct jit_ctx *ctx) argument
472 emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
474 emit(ARM_MOVW(rd, val & 0xffff), ctx);
476 emit(ARM_MOVT(rd, val >> 16), ctx);
480 static inline void emit_mov_i(const u8 rd, u32 val, struct jit_ctx *ctx) argument
485 emit(ARM_MOV_I(rd, imm12), ctx);
487 emit_mov_i_no8m(rd, val, ctx);
520 static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op, u8 sign) argument
529 emit(sign ? ARM_SDIV(rd, rm, rn) : ARM_UDIV(rd, r
588 emit_udivmod64(const s8 *rd, const s8 *rm, const s8 *rn, struct jit_ctx *ctx, u8 op, u8 sign) argument
748 const s8 *rd = is_stacked(dst_lo) ? tmp : dst; local
848 const s8 *rd; local
938 s8 rd; local
965 const s8 *rd; local
982 const s8 *rd; local
1006 const s8 *rd; local
1031 const s8 *rd; local
1055 const s8 *rd; local
1081 const s8 *rd; local
1111 const s8 *rd; local
1140 const s8 *rd, *rt; local
1200 s8 rd; local
1235 const s8 *rd = is_stacked(dst_lo) ? tmp : dst; local
1279 const s8 *rd = is_stacked(dst_lo) ? tmp : dst; local
1320 emit_ar_r(const u8 rd, const u8 rt, const u8 rm, const u8 rn, struct jit_ctx *ctx, u8 op, bool is_jmp64) argument
1445 emit_rev16(const u8 rd, const u8 rn, struct jit_ctx *ctx) argument
1460 emit_rev32(const u8 rd, const u8 rn, struct jit_ctx *ctx) argument
1570 const s8 *rd, *rs; local
[all...]
/linux-master/drivers/media/pci/bt8xx/
H A Ddst_priv.h25 struct dst_gpio_read rd; member in union:dst_gpio_packet

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