/linux-master/drivers/gpu/drm/arm/ |
H A D | hdlcd_drv.h | 11 void __iomem *mmio; member in struct:hdlcd_drm_private 30 writel(value, hdlcd->mmio + reg); 35 return readl(hdlcd->mmio + reg);
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/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | mmio_context.c | 214 struct engine_mmio *mmio; local 231 for (mmio = gvt->engine_mmio_list.mmio; 232 i915_mmio_reg_valid(mmio->reg); mmio++) { 233 if (mmio->id != ring_id || !mmio->in_context) 236 *cs++ = i915_mmio_reg_offset(mmio->reg); 237 *cs++ = vgpu_vreg_t(vgpu, mmio->reg) | (mmio 487 struct engine_mmio *mmio; local 594 struct engine_mmio *mmio; local [all...] |
/linux-master/sound/pci/au88x0/ |
H A D | au88x0_game.c | 33 return hwread(vortex->mmio, VORTEX_GAME_LEGACY); 39 hwwrite(vortex->mmio, VORTEX_GAME_LEGACY, 0xff); 48 *buttons = (~hwread(vortex->mmio, VORTEX_GAME_LEGACY) >> 4) & 0xf; 52 hwread(vortex->mmio, VORTEX_GAME_AXIS + (i * AXIS_SIZE)); 65 hwwrite(vortex->mmio, VORTEX_CTRL2, 66 hwread(vortex->mmio, 71 hwwrite(vortex->mmio, VORTEX_CTRL2, 72 hwread(vortex->mmio,
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H A D | au88x0_a3d.c | 25 hwwrite(vortex->mmio, 27 hwwrite(vortex->mmio, 29 hwwrite(vortex->mmio, 31 hwwrite(vortex->mmio, 51 hwwrite(vortex->mmio, 54 hwwrite(vortex->mmio, 57 hwwrite(vortex->mmio, 66 hwwrite(vortex->mmio, 69 hwwrite(vortex->mmio, 72 hwwrite(vortex->mmio, [all...] |
/linux-master/drivers/net/ethernet/aquantia/atlantic/ |
H A D | aq_hw_utils.c | 42 u32 value = readl(hw->mmio + reg); 45 readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX) 53 writel(value, hw->mmio + reg); 65 value = readq(hw->mmio + reg); 67 value = lo_hi_readq(hw->mmio + reg); 70 readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX) 79 writeq(value, hw->mmio + reg); 81 lo_hi_writeq(value, hw->mmio + reg);
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/linux-master/drivers/comedi/drivers/ |
H A D | icp_multi.c | 94 status = readw(dev->mmio + ICP_MULTI_ADC_CSR); 120 writew(adc_csr, dev->mmio + ICP_MULTI_ADC_CSR); 125 dev->mmio + ICP_MULTI_ADC_CSR); 134 data[n] = (readw(dev->mmio + ICP_MULTI_AI) >> 4) & 0x0fff; 147 status = readw(dev->mmio + ICP_MULTI_DAC_CSR); 166 writew(dac_csr, dev->mmio + ICP_MULTI_DAC_CSR); 177 writew(val, dev->mmio + ICP_MULTI_AO); 181 dev->mmio + ICP_MULTI_DAC_CSR); 194 data[1] = readw(dev->mmio + ICP_MULTI_DI); 205 writew(s->state, dev->mmio [all...] |
H A D | me_daq.c | 35 * PCI BAR2 Memory map (dev->mmio) 176 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); 186 void __iomem *mmio_porta = dev->mmio + ME_DIO_PORT_A_REG; 187 void __iomem *mmio_portb = dev->mmio + ME_DIO_PORT_B_REG; 221 status = readw(dev->mmio + ME_STATUS_REG); 251 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); 253 writew(0x00, dev->mmio + ME_STATUS_REG); /* clear interrupts */ 257 writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG); 265 writew(val, dev->mmio + ME_AI_FIFO_REG); 269 writew(devpriv->ctrl1, dev->mmio [all...] |
H A D | ni_6527.c | 89 writeb(val & 0xff, dev->mmio + NI6527_FILT_INTERVAL_REG(0)); 91 dev->mmio + NI6527_FILT_INTERVAL_REG(1)); 93 dev->mmio + NI6527_FILT_INTERVAL_REG(2)); 95 writeb(NI6527_CLR_INTERVAL, dev->mmio + NI6527_CLR_REG); 104 writeb(val & 0xff, dev->mmio + NI6527_FILT_ENA_REG(0)); 105 writeb((val >> 8) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(1)); 106 writeb((val >> 16) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(2)); 150 val = readb(dev->mmio + NI6527_DI_REG(0)); 151 val |= (readb(dev->mmio + NI6527_DI_REG(1)) << 8); 152 val |= (readb(dev->mmio [all...] |
H A D | dt3000.c | 49 * PCI BAR0 - dual-ported RAM location definitions (dev->mmio) 231 writew(cmd, dev->mmio + DPR_CMD_MBX); 234 status = readw(dev->mmio + DPR_CMD_MBX); 250 writew(subsys, dev->mmio + DPR_SUBSYS); 252 writew(chan, dev->mmio + DPR_PARAMS(0)); 253 writew(gain, dev->mmio + DPR_PARAMS(1)); 257 return readw(dev->mmio + DPR_PARAMS(2)); 263 writew(subsys, dev->mmio + DPR_SUBSYS); 265 writew(chan, dev->mmio + DPR_PARAMS(0)); 266 writew(0, dev->mmio [all...] |
/linux-master/drivers/watchdog/ |
H A D | ep93xx_wdt.c | 41 void __iomem *mmio; member in struct:ep93xx_wdt_priv 49 writel(0xaaaa, priv->mmio + EP93XX_WATCHDOG); 58 writel(0xaa55, priv->mmio + EP93XX_WATCHDOG); 67 writel(0x5555, priv->mmio + EP93XX_WATCHDOG); 99 priv->mmio = devm_platform_ioremap_resource(pdev, 0); 100 if (IS_ERR(priv->mmio)) 101 return PTR_ERR(priv->mmio); 103 val = readl(priv->mmio + EP93XX_WATCHDOG);
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/linux-master/drivers/gpu/drm/hisilicon/hibmc/ |
H A D | hibmc_drm_i2c.c | 30 u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); 34 writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); 36 u32 tmp_data = readl(priv->mmio + GPIO_DATA); 39 writel(tmp_data, priv->mmio + GPIO_DATA); 42 writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); 50 u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); 54 writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); 57 return (readl(priv->mmio + GPIO_DATA) & mask) ? 1 : 0;
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/linux-master/drivers/mtd/nand/raw/ |
H A D | cs553x_nand.c | 94 void __iomem *mmio; member in struct:cs553x_nand_controller 108 writeb(ctl, cs553x->mmio + MM_NAND_CTL); 109 writeb(data, cs553x->mmio + MM_NAND_IO); 110 return readb_poll_timeout_atomic(cs553x->mmio + MM_NAND_STS, status, 118 writeb(0, cs553x->mmio + MM_NAND_CTL); 120 memcpy_fromio(buf, cs553x->mmio, 0x800); 124 memcpy_fromio(buf, cs553x->mmio, len); 130 writeb(0, cs553x->mmio + MM_NAND_CTL); 132 memcpy_toio(cs553x->mmio, buf, 0x800); 136 memcpy_toio(cs553x->mmio, bu 260 cs553x_init_one(int cs, int mmio, unsigned long adr) argument [all...] |
/linux-master/drivers/ata/ |
H A D | ahci_imx.c | 118 static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert) argument 125 crval = readl(mmio + IMX_P0PHYCR); 130 writel(crval, mmio + IMX_P0PHYCR); 134 srval = readl(mmio + IMX_P0PHYSR); 143 static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio) argument 149 writel(crval, mmio + IMX_P0PHYCR); 152 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true); 157 ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false); 164 static int imx_phy_reg_write(u16 val, void __iomem *mmio) argument 170 writel(crval, mmio 206 imx_phy_reg_read(u16 *val, void __iomem *mmio) argument 229 void __iomem *mmio = hpriv->mmio; local 281 read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio) argument 337 void __iomem *mmio = hpriv->mmio; local 758 void __iomem *mmio = hpriv->mmio; local [all...] |
/linux-master/drivers/ssb/ |
H A D | scan.c | 177 lo = readw(bus->mmio + offset); 178 hi = readw(bus->mmio + offset + 2); 184 return readl(bus->mmio + offset); 207 iounmap(bus->mmio); 211 pci_iounmap(bus->host_pci, bus->mmio); 219 bus->mmio = NULL; 226 void __iomem *mmio = NULL; local 233 mmio = ioremap(baseaddr, SSB_CORE_SIZE); 237 mmio = pci_iomap(bus->host_pci, 0, ~0UL); 244 mmio 275 void __iomem *mmio; local [all...] |
/linux-master/drivers/video/fbdev/i810/ |
H A D | i810-i2c.c | 46 u8 __iomem *mmio = par->mmio_start_virtual; local 49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); 51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); 52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ 59 u8 __iomem *mmio = par->mmio_start_virtual; local 62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); 64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); 65 i810_readl(mmio, chan->ddc_base); /* flush posted write */ 72 u8 __iomem *mmio = par->mmio_start_virtual; local 74 i810_writel(mmio, cha 83 u8 __iomem *mmio = par->mmio_start_virtual; local [all...] |
H A D | i810_accel.c | 36 static inline void i810_report_error(u8 __iomem *mmio) argument 43 i810_readw(IIR, mmio), 44 i810_readb(EIR, mmio), 45 i810_readl(PGTBL_ER, mmio), 46 i810_readl(IPEIR, mmio), 47 i810_readl(IPEHR, mmio)); 63 u8 __iomem *mmio = par->mmio_start_virtual; local 67 head = i810_readl(IRING + 4, mmio) & RBUFFER_HEAD_MASK; 76 i810_report_error(mmio); 93 u8 __iomem *mmio local 137 u8 __iomem *mmio = par->mmio_start_virtual; local 287 u8 __iomem *mmio = par->mmio_start_virtual; local 418 u8 __iomem *mmio = par->mmio_start_virtual; local 439 u8 __iomem *mmio = par->mmio_start_virtual; local [all...] |
/linux-master/drivers/video/fbdev/matrox/ |
H A D | matroxfb_crtc2.h | 28 } mmio; member in struct:matroxfb_dh_fb_info
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/linux-master/arch/m68k/include/asm/ |
H A D | virt.h | 8 u32 mmio; member in struct:virt_booter_device_data
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7996/ |
H A D | Makefile | 6 debugfs.o mmio.o
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
H A D | gt215.c | 103 u32 *mmio = gt215_devinit_mmio_part; local 120 while (mmio[0]) { 121 if (addr >= mmio[0] && addr <= mmio[1]) { 122 u32 part = (addr / mmio[2]) & 7; 129 mmio += 3; 140 .mmio = gt215_devinit_mmio,
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/linux-master/arch/loongarch/kvm/ |
H A D | exit.c | 322 run->mmio.phys_addr = vcpu->arch.badv; 334 run->mmio.len = 4; 337 run->mmio.len = 8; 349 run->mmio.len = 1; 353 run->mmio.len = 1; 356 run->mmio.len = 2; 360 run->mmio.len = 2; 363 run->mmio.len = 4; 367 run->mmio.len = 4; 370 run->mmio [all...] |
/linux-master/drivers/mfd/ |
H A D | stm32-lptimer.c | 56 void __iomem *mmio; local 63 mmio = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 64 if (IS_ERR(mmio)) 65 return PTR_ERR(mmio); 67 ddata->regmap = devm_regmap_init_mmio_clk(dev, "mux", mmio,
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/linux-master/drivers/ntb/hw/intel/ |
H A D | ntb_hw_gen3.c | 147 void __iomem *mmio; local 151 mmio = ndev->self_mmio; 155 iowrite64(bar_addr, mmio + GEN3_IMBAR1XLMT_OFFSET); 156 bar_addr = ioread64(mmio + GEN3_IMBAR1XLMT_OFFSET); 160 iowrite64(bar_addr, mmio + GEN3_IMBAR2XLMT_OFFSET); 161 bar_addr = ioread64(mmio + GEN3_IMBAR2XLMT_OFFSET); 165 iowrite64(0, mmio + GEN3_IMBAR1XBASE_OFFSET); 166 iowrite64(0, mmio + GEN3_IMBAR2XBASE_OFFSET); 259 void __iomem *mmio; local 266 mmio 449 void __iomem *mmio; local [all...] |
/linux-master/sound/soc/xilinx/ |
H A D | xlnx_formatter_pcm.c | 79 void __iomem *mmio; member in struct:xlnx_pcm_drv_data 92 * @mmio: base address offset 99 void __iomem *mmio; member in struct:xlnx_pcm_stream_param 287 reg = adata->mmio + XLNX_MM2S_OFFSET + XLNX_AUD_STS; 306 reg = adata->mmio + XLNX_S2MM_OFFSET + XLNX_AUD_STS; 354 stream_data->mmio = adata->mmio + XLNX_MM2S_OFFSET; 363 stream_data->mmio = adata->mmio + XLNX_S2MM_OFFSET; 367 val = readl(adata->mmio [all...] |
/linux-master/arch/mips/kvm/ |
H A D | emulate.c | 976 void *data = run->mmio.data; 991 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( 993 if (run->mmio.phys_addr == KVM_INVALID_ADDR) 999 run->mmio.len = 8; 1009 run->mmio.len = 4; 1018 run->mmio.len = 2; 1027 run->mmio.len = 1; 1036 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( 1038 run->mmio.len = 4; 1066 run->mmio [all...] |