i915/gvt/mmio_context.c

214 	struct engine_mmio *mmio;
231 	for (mmio = gvt->engine_mmio_list.mmio;
232 	     i915_mmio_reg_valid(mmio->reg); mmio++) {
233 		if (mmio->id != ring_id || !mmio->in_context)
236 		*cs++ = i915_mmio_reg_offset(mmio->reg);
237 		*cs++ = vgpu_vreg_t(vgpu, mmio->reg) | (mmio->mask << 16);
307  * Use lri command to initialize the mmio which is in context state image for
308  * inhibit context, it contains tracked engine mmio, render_mocs and
480 /* Switch ring mmio values (context). */
487 	struct engine_mmio *mmio;
493 	for (mmio = engine->i915->gvt->engine_mmio_list.mmio;
494 	     i915_mmio_reg_valid(mmio->reg); mmio++) {
495 		if (mmio->id != engine->id)
498 		 * No need to do save or restore of the mmio which is in context
502 		if (GRAPHICS_VER(engine->i915) == 9 && mmio->in_context)
507 			vgpu_vreg_t(pre, mmio->reg) =
508 				intel_uncore_read_fw(uncore, mmio->reg);
509 			if (mmio->mask)
510 				vgpu_vreg_t(pre, mmio->reg) &=
511 					~(mmio->mask << 16);
512 			old_v = vgpu_vreg_t(pre, mmio->reg);
514 			old_v = mmio->value =
515 				intel_uncore_read_fw(uncore, mmio->reg);
522 			 * No need to restore the mmio which is in context state
526 			if (mmio->in_context &&
530 			if (mmio->mask)
531 				new_v = vgpu_vreg_t(next, mmio->reg) |
532 					(mmio->mask << 16);
534 				new_v = vgpu_vreg_t(next, mmio->reg);
536 			if (mmio->in_context)
538 			if (mmio->mask)
539 				new_v = mmio->value | (mmio->mask << 16);
541 				new_v = mmio->value;
544 		intel_uncore_write_fw(uncore, mmio->reg, new_v);
549 				  i915_mmio_reg_offset(mmio->reg),
558  * intel_gvt_switch_mmio - switch mmio context of specific engine
578 	 * We are using raw mmio access wrapper to improve the
579 	 * performace for batch mmio read/write, so we need
588  * intel_gvt_init_engine_mmio_context - Initiate the engine mmio list
594 	struct engine_mmio *mmio;
597 		gvt->engine_mmio_list.mmio = gen9_engine_mmio_list;
603 		gvt->engine_mmio_list.mmio = gen8_engine_mmio_list;
608 	for (mmio = gvt->engine_mmio_list.mmio;
609 	     i915_mmio_reg_valid(mmio->reg); mmio++) {
610 		if (mmio->in_context) {
611 			gvt->engine_mmio_list.ctx_mmio_count[mmio->id]++;
612 			intel_gvt_mmio_set_sr_in_ctx(gvt, mmio->reg.reg);