Searched refs:display_timing (Results 26 - 40 of 40) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dtonga_smumgr.c658 data->display_timing.min_clock_in_sr =
665 data->display_timing.min_clock_in_sr);
1016 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1017 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
1023 && (data->display_timing.num_existing_displays <= 2)
1024 && (data->display_timing.num_existing_displays != 0))
H A Dpolaris10_smumgr.c993 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;
1188 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1189 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
1195 (data->display_timing.num_existing_displays <= 2) &&
1196 data->display_timing.num_existing_displays)
H A Dfiji_smumgr.c974 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;
1199 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1200 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
H A Dvegam_smumgr.c839 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;
1013 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1014 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
H A Dci_smumgr.c1236 data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1237 data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
/linux-master/drivers/gpu/drm/hisilicon/kirin/
H A Dkirin_drm_ade.c21 #include <video/display_timing.h>
/linux-master/drivers/gpu/drm/panel/
H A Dpanel-leadtek-ltk050h3146w.c13 #include <video/display_timing.h>
H A Dpanel-sitronix-st7703.c19 #include <video/display_timing.h>
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4107 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR &&
4109 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK))
4125 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
4680 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
4683 if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
4692 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
4693 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||
H A Dvega12_hwmgr.c2618 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
2622 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr)
H A Dvega10_hwmgr.c3449 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
5034 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
5038 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr)
H A Dvega20_hwmgr.c3911 if (data->display_timing.num_existing_displays !=
3916 (data->display_timing.min_clock_in_sr !=
/linux-master/drivers/gpu/drm/arm/
H A Dmalidp_hw.c17 #include <video/display_timing.h>
/linux-master/drivers/gpu/drm/
H A Ddrm_modes.c1227 struct display_timing timing;
/linux-master/drivers/gpu/drm/bridge/analogix/
H A Danx7625.c37 #include <video/display_timing.h>

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