Searched refs:cr1 (Results 26 - 50 of 75) sorted by relevance

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/linux-master/arch/powerpc/mm/nohash/
H A Dtlb_low_64e.S303 crclr cr1*4+eq /* set cr1.eq = 0 for non-recursive */
311 2: cmpd cr1,r15,r10 /* recursive lock due to mcheck/crit/etc? */
312 beq cr1,3b /* unlock will happen if cr1.eq = 0 */
439 beq cr1,1f /* no unlock if lock was recursively grabbed */
499 cmplwi cr1,r15,1
500 beq+ cr1,tlb_miss_common_e6500
536 cmpldi cr1,r15,1 /* vmalloc mapping ? */
581 beq+ cr1,normal_tlb_mis
[all...]
H A Dtlb_low.S160 9: cmpwi cr1,r3,255 /* Last set done ? */
162 beq cr1,1f /* End of loop */
/linux-master/arch/powerpc/kernel/
H A Dswitch.S88 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
89 cror eq,4*cr1+eq,eq
H A Dmisc_32.S35 cmpwi cr1,r3,0
43 1: beqlr cr1 /* all done if high part of A is 0 */
H A Dentry_32.S311 cmpwi cr1,r3,0
343 bne- cr1,1f /* emulate stack store */
H A Dexceptions-64e.S264 cmpdi cr1,r1,0; /* check if SP makes sense */ \
265 bge- cr1,exc_##n##_bad_stack;/* bad stack (TODO: out of line) */ \
698 cmpld cr1,r10,r15
703 cmpld cr1, r10, r14
706 bge+ cr1,1f
769 cmpld cr1,r10,r15
774 cmpld cr1, r10, r14
777 bge+ cr1,1f
/linux-master/arch/powerpc/lib/
H A Dcopyuser_64.S57 cmpldi cr1,r5,16
70 blt cr1,.Lshort_copy
92 blt cr1,.Ldo_tail /* if < 16 bytes to copy */
94 cmpdi cr1,r0,0
106 beq cr1,72f
227 6: cmpwi cr1,r5,8
231 ble cr1,7f
270 cmpldi cr1,r5,16
H A Dstring_64.S81 cmpdi cr1,r4,512
83 bgt cr1,.Llong_clear
/linux-master/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_64.S57 cmpldi cr1,r5,16
70 blt cr1,.Lshort_copy
92 blt cr1,.Ldo_tail /* if < 16 bytes to copy */
94 cmpdi cr1,r0,0
106 beq cr1,72f
227 6: cmpwi cr1,r5,8
231 ble cr1,7f
270 cmpldi cr1,r5,16
/linux-master/arch/powerpc/boot/
H A Dstring.S157 cmpw cr1,r0,r5
160 ble cr1,3b
203 5: cmpw cr1,r0,r5
206 ble cr1,3b
H A Dcrt0.S181 cmpdi cr1,r8,0
183 beq cr1,3f
/linux-master/drivers/spi/
H A Dspi-pxa2xx.c956 u32 cr1; local
1033 cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1;
1042 cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1;
1085 pxa2xx_spi_update(drv_data, SSCR1, change_mask, cr1);
1119 pxa2xx_spi_write(drv_data, SSCR1, cr1);
1250 chip->cr1 = 0;
1252 chip->cr1 |= SSCR1_SCFR;
1253 chip->cr1 |
[all...]
H A Dspi-pxa2xx.h60 u32 cr1; member in struct:chip_data
H A Dspi-pl022.c395 * @cr1: Value of control register CR1 of SSP
409 u16 cr1; member in struct:chip_data
478 writew(chip->cr1, SSP_CR1(pl022->virtbase));
1716 chip->cr1 = 0;
1744 SSP_WRITE_BITS(chip->cr1, chip_info->clkdelay,
1754 SSP_WRITE_BITS(chip->cr1, chip_info->wait_state,
1767 SSP_WRITE_BITS(chip->cr1, tmp, SSP_CR1_MASK_RENDN_ST, 4);
1768 SSP_WRITE_BITS(chip->cr1, etx, SSP_CR1_MASK_TENDN_ST, 5);
1769 SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig,
1771 SSP_WRITE_BITS(chip->cr1, chip_inf
[all...]
H A Dspi-rockchip.c525 u32 cr1; local
549 cr1 = xfer->len - 1;
553 cr1 = xfer->len - 1;
557 cr1 = xfer->len / 2 - 1;
577 writel_relaxed(cr1, rs->regs + ROCKCHIP_SPI_CTRLR1);
/linux-master/drivers/tty/serial/
H A Dfsl_linflexuart.c316 unsigned long cr, ier, cr1; local
330 cr1 = LINFLEXD_LINCR1_BF | LINFLEXD_LINCR1_MME
332 writel(cr1, sport->membase + LINCR1);
356 cr1 &= ~(LINFLEXD_LINCR1_INIT);
358 writel(cr1, sport->membase + LINCR1);
406 unsigned long cr, old_cr, cr1; local
413 cr1 = readl(port->membase + LINCR1);
414 cr1 |= LINFLEXD_LINCR1_INIT;
415 writel(cr1, port->membase + LINCR1);
506 cr1
[all...]
/linux-master/drivers/media/platform/nxp/
H A Dimx7-media-csi.c322 u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); local
324 cr1 |= BIT_RFF_OR_INT;
325 cr1 |= BIT_FB1_DMA_DONE_INTEN;
326 cr1 |= BIT_FB2_DMA_DONE_INTEN;
328 imx7_csi_reg_write(csi, cr1, CSI_CSICR1);
333 u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1); local
335 cr1 &= ~BIT_RFF_OR_INT;
336 cr1 &= ~BIT_FB1_DMA_DONE_INTEN;
337 cr1 &= ~BIT_FB2_DMA_DONE_INTEN;
339 imx7_csi_reg_write(csi, cr1, CSI_CSICR
371 u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1) & ~BIT_FCC; local
533 u32 cr1, cr18; local
[all...]
/linux-master/drivers/phy/freescale/
H A Dphy-fsl-lynx-28g.c40 #define LYNX_28G_PLLnCR1_FRATE_SEL(cr1) (((cr1) & GENMASK(28, 24)))
113 u32 rstctl, cr0, cr1; member in struct:lynx_28g_pll
198 switch (LYNX_28G_PLLnCR1_FRATE_SEL(pll->cr1)) {
484 pll->cr1 = lynx_28g_pll_read(pll, PLLnCR1);
489 switch (LYNX_28G_PLLnCR1_FRATE_SEL(pll->cr1)) {
/linux-master/arch/powerpc/platforms/cell/
H A Dcbe_thermal.c301 union spe_reg cr1; local
328 /* cr1
331 cr1.val = 0x0404040404040404ull;
356 out_be64(&pmd_regs->tm_cr1.val, cr1.val);
/linux-master/arch/powerpc/mm/book3s32/
H A Dhash_low.S496 cmpwi cr1,r6,1
499 ble cr1,19f
584 8: ble cr1,9f /* if all ptes checked */
589 cmpwi cr1,r6,1
592 bgt cr1,81b
/linux-master/arch/powerpc/kvm/
H A Dbook3s_segment.S215 cmpwi cr1, r0, 0
391 beq cr1, 1f
/linux-master/drivers/clk/
H A Dclk-si521xx.c43 #define SI521XX_OE_MAP(cr1, cr2) (((cr2) << 8) | (cr1))
/linux-master/drivers/iio/trigger/
H A Dstm32-timer-trigger.c80 u32 cr1; member in struct:stm32_timer_trigger_regs
242 u32 psc, arr, cr1; local
245 regmap_read(priv->regmap, TIM_CR1, &cr1);
249 if (cr1 & TIM_CR1_CEN) {
836 regmap_read(priv->regmap, TIM_CR1, &priv->bak.cr1);
871 regmap_write(priv->regmap, TIM_CR1, priv->bak.cr1);
/linux-master/drivers/iio/adc/
H A Dstm32-dfsdm-adc.c506 u32 cr1; local
562 cr1 = DFSDM_CR1_RCH(chan->channel);
566 cr1 |= DFSDM_CR1_RCONT(1);
568 cr1 |= DFSDM_CR1_RSYNC(fl->sync_mode);
581 cr1 = DFSDM_CR1_JSCAN((adc->nconv > 1) ? 1 : 0);
591 cr1 |= DFSDM_CR1_JSYNC(fl->sync_mode);
595 cr1);
/linux-master/sound/soc/pxa/
H A Dpxa-ssp.c47 uint32_t cr1; member in struct:ssp_priv
127 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
146 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);

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