Searched refs:c10 (Results 26 - 50 of 51) sorted by relevance

123

/linux-master/arch/arm/boot/compressed/
H A Dhead-xscale.S27 mcr p15, 0, r0, c7, c10, 4 @ drain WB
H A Dhead-sa1100.S37 mcr p15, 0, r0, c7, c10, 4 @ drain WB
H A Dhead.S744 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
855 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
876 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
911 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
1164 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
1201 mcr p15, 0, r0, c7, c10, 4 @ DSB
1238 mcr p15, 0, ip, c7, c10, 4 @ drain WB
1247 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1256 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1281 mcr p15, 0, r10, c7, c10,
[all...]
/linux-master/tools/perf/arch/s390/include/
H A Ddwarf-regs-table.h40 REG_DWARFNUM_NAME(c10, 42),
/linux-master/arch/arm/mm/
H A Dproc-sa1100.S77 mcr p15, 0, ip, c7, c10, 4 @ drain WB
131 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
171 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
209 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
H A Dproc-v6.S80 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
86 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
110 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
165 mcr p15, 0, ip, c7, c10, 4 @ drain write buffer
226 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer and
H A Dproc-v7-3level.S87 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
H A Dproc-v7-2level.S106 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
H A Dproc-macros.S188 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
271 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
272 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
H A Dproc-v7.S89 2: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
180 mcr p15, 0, r4, c10, c2, 0 @ write PRRR
181 mcr p15, 0, r5, c10, c2, 1 @ write NMRR
533 mcr p15, 0, r3, c10, c2, 0 @ write PRRR
534 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
H A Dcache-v7.S406 mcr p15, 0, r0, c7, c10, 1 @ clean D / U line
/linux-master/drivers/iio/pressure/
H A Ddps310.c89 s32 c00, c10, c20, c30, c01, c11, c21; member in struct:dps310_data
116 u32 c00, c10, c20, c30, c01, c11, c21; local
135 * Calculate pressure calibration coefficients. c00 and c10 are 20 bit
142 c10 = ((coef[5] & GENMASK(3, 0)) << 16) | (coef[6] << 8) | coef[7];
143 data->c10 = sign_extend32(c10, 19);
656 nums[1] = p * (s64)data->c10;
/linux-master/arch/arm/mach-omap2/
H A Dsleep24xx.S55 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished
H A Dsram242x.S138 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, finish ARM SDR/DDR
167 mcr p15, 0, r3, c7, c10, 4 @ memory barrier
H A Dsram243x.S138 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, finish ARM SDR/DDR
167 mcr p15, 0, r3, c7, c10, 4 @ memory barrier
/linux-master/drivers/platform/x86/intel/pmc/
H A Dcore.c924 bool c10;
930 seq_puts(s, "c10");
931 c10 = false;
933 seq_puts(s, "[c10]");
934 c10 = true;
938 if ((BIT(mode) & reg) && !c10)
956 bool clear = false, c10 = false;
970 * 'c10'
983 else if (sysfs_streq(buf, "c10"))
984 c10
889 bool c10; local
921 bool clear = false, c10 = false; local
[all...]
/linux-master/arch/arm/include/asm/
H A Dassembler.h117 mcr p15, 0, r0, c7, c10, 4
386 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
409 mcr p15, 0, r0, c7, c10, 5 @ dmb
116 mcr p15, 0, r0, c7, c10, 4 variable
/linux-master/arch/arm/kernel/
H A Dhead-nommu.S152 AR_CLASS(mcreq p15, 0, r3, c10, c2, 0) @ MAIR 0
155 AR_CLASS(mcreq p15, 0, r3, c10, c2, 1) @ MAIR 1
441 mcr p15, 0, r5, c6, c10, 0 @ PRBAR4
442 mcr p15, 0, r6, c6, c10, 1 @ PRLAR4
/linux-master/arch/arm/mach-omap1/
H A Dsleep.S148 mcr p15, 0, r0, c7, c10, 4
/linux-master/drivers/gpu/drm/vc4/
H A Dvc4_hvs.c162 c9, c10, c11, c12, c13, c14, c15) \
166 VC4_PPF_FILTER_WORD(c9, c10, c11), \
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c1845 drm_WARN_ON(&i915->drm, ARRAY_SIZE(pll_state->c10.pll) < 9);
1847 pll_state->c10.pll[i] = 0;
1862 crtc_state->dpll_hw_state.cx0pll.c10 = *tables[i];
1902 const struct intel_c10pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll.c10;
3028 const struct intel_c10pll_state *mpllb_sw_state = &state->dpll_hw_state.cx0pll.c10;
3058 intel_c10pll_readout_hw_state(encoder, &pll_state->c10);
3067 return intel_c10pll_calc_port_clock(encoder, &pll_state->c10);
3152 intel_c10pll_state_verify(new_crtc_state, crtc, encoder, &mpll_hw_state.c10);
/linux-master/arch/x86/events/intel/
H A Dcstate.c255 PMU_EVENT_ATTR_STRING(c10-residency, attr_cstate_pkg_c10, "event=0x06");
/linux-master/drivers/staging/media/ipu3/include/uapi/
H A Dintel-ipu3.h1850 * @c10: range [0, 3], default 0x0
1873 __u32 c10:2; member in struct:ipu3_uapi_yuvp1_yds_config
/linux-master/tools/power/pm-graph/
H A Dbootgraph.py489 ('c10', '#ffffea')
645 .c10 {background:rgba(255,255,204,0.4);}\n\
/linux-master/arch/arm/mach-at91/
H A Dpm_suspend.S1034 mcr p15, 0, tmp1, c7, c10, 4

Completed in 305 milliseconds

123