Searched refs:base_reg (Results 26 - 50 of 56) sorted by relevance

123

/linux-master/drivers/gpu/drm/imx/dcss/
H A Ddcss-dpr.c93 void __iomem *base_reg; member in struct:dcss_dpr_ch
138 ch->base_reg = devm_ioremap(dpr->dev, ch->base_ofs, SZ_4K);
139 if (!ch->base_reg) {
148 dcss_writel(0xff, ch->base_reg + DCSS_DPR_IRQ_MASK);
181 dcss_writel(0, ch->base_reg + DCSS_DPR_SYSTEM_CTRL0);
H A Ddcss-scaler.c69 void __iomem *base_reg; member in struct:dcss_scaler_ch
305 ch->base_reg = devm_ioremap(scl->dev, ch->base_ofs, SZ_4K);
306 if (!ch->base_reg) {
343 dcss_writel(0, ch->base_reg + DCSS_SCALER_CTRL);
/linux-master/drivers/clk/tegra/
H A Dclk-tegra124.c188 .base_reg = PLLX_BASE,
222 .base_reg = PLLC_BASE,
276 .base_reg = PLLC2_BASE,
298 .base_reg = PLLC3_BASE,
357 .base_reg = PLLC4_BASE,
420 .base_reg = PLLM_BASE,
477 .base_reg = PLLE_BASE,
516 .base_reg = PLLRE_BASE,
553 .base_reg = PLLP_BASE,
582 .base_reg
[all...]
H A Dclk-tegra114.c184 .base_reg = PLLC_BASE,
235 .base_reg = PLLC2_BASE,
257 .base_reg = PLLC3_BASE,
306 .base_reg = PLLM_BASE,
346 .base_reg = PLLP_BASE,
376 .base_reg = PLLA_BASE,
412 .base_reg = PLLD_BASE,
430 .base_reg = PLLD2_BASE,
472 .base_reg = PLLU_BASE,
501 .base_reg
[all...]
H A Dclk-tegra20.c284 .base_reg = PLLC_BASE,
300 .base_reg = PLLM_BASE,
316 .base_reg = PLLP_BASE,
334 .base_reg = PLLA_BASE,
350 .base_reg = PLLD_BASE,
372 .base_reg = PLLU_BASE,
389 .base_reg = PLLX_BASE,
407 .base_reg = PLLE_BASE,
H A Dclk-tegra210.c785 if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) {
834 u32 val = readl_relaxed(clk_base + plla->params->base_reg);
871 writel_relaxed(val, clk_base + plla->params->base_reg);
890 if (readl_relaxed(clk_base + plld->params->base_reg) &
940 u32 val = readl_relaxed(clk_base + plldss->params->base_reg);
991 plldss->params->base_reg);
1006 writel_relaxed(val, clk_base + plldss->params->base_reg);
1059 u32 val = readl_relaxed(clk_base + pllre->params->base_reg);
1103 writel_relaxed(val, clk_base + pllre->params->base_reg);
1188 if (readl_relaxed(clk_base + pllx->params->base_reg)
[all...]
H A Dclk-tegra30.c359 .base_reg = PLLC_BASE,
388 .base_reg = PLLM_BASE,
409 .base_reg = PLLP_BASE,
427 .base_reg = PLLA_BASE,
444 .base_reg = PLLD_BASE,
461 .base_reg = PLLD2_BASE,
478 .base_reg = PLLU_BASE,
496 .base_reg = PLLX_BASE,
515 .base_reg = PLLE_BASE,
H A Dclk-pll.c231 #define pll_readl_base(p) pll_readl(p->params->base_reg, p)
238 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p)
306 lock_addr += pll->params->base_reg;
2082 val = readl_relaxed(clk_base + pll_params->base_reg);
2660 val = readl_relaxed(clk_base + pll_params->base_reg);
H A Dclk.h223 * @base_reg: PLL base reg offset
308 u32 base_reg; member in struct:tegra_clk_pll_params
/linux-master/drivers/media/platform/nxp/imx-jpeg/
H A Dmxc-jpeg.h130 void __iomem *base_reg; member in struct:mxc_jpeg_dev
H A Dmxc-jpeg.c836 void __iomem *reg = jpeg->base_reg;
884 void __iomem *reg = jpeg->base_reg;
1170 void __iomem *reg = jpeg->base_reg;
1236 void __iomem *reg = jpeg->base_reg;
1434 void __iomem *reg = jpeg->base_reg;
2777 jpeg->base_reg = devm_platform_ioremap_resource(pdev, 0);
2778 if (IS_ERR(jpeg->base_reg))
2779 return PTR_ERR(jpeg->base_reg);
/linux-master/drivers/base/regmap/
H A Dregmap-debugfs.c140 c->base_reg = i;
170 return c->base_reg + (reg_offset * map->reg_stride);
205 if (reg < c->base_reg) {
206 ret = c->base_reg;
403 c->base_reg, c->max_reg);
H A Dinternal.h26 unsigned int base_reg; member in struct:regmap_debugfs_off_cache
/linux-master/drivers/media/dvb-frontends/
H A Ddibx000_common.h31 u16 base_reg; member in struct:dibx000_i2c_master
/linux-master/sound/soc/codecs/
H A Dwm2200.c1082 #define WM2200_MIXER_ENUMS(name, base_reg) \
1083 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
1084 static WM2200_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
1085 static WM2200_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
1086 static WM2200_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
1092 #define WM2200_DSP_ENUMS(name, base_reg) \
1093 static WM2200_MUX_ENUM_DECL(name##_aux1_enum, base_reg); \
1094 static WM2200_MUX_ENUM_DECL(name##_aux2_enum, base_reg + 1); \
1095 static WM2200_MUX_ENUM_DECL(name##_aux3_enum, base_reg + 2); \
1096 static WM2200_MUX_ENUM_DECL(name##_aux4_enum, base_reg
[all...]
H A Dwm5100.c396 #define WM5100_MIXER_ENUMS(name, base_reg) \
397 static WM5100_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
398 static WM5100_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
399 static WM5100_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
400 static WM5100_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
/linux-master/sound/soc/meson/
H A Daxg-spdifin.c118 unsigned int base_reg,
126 reg = offset * regmap_get_reg_stride(map) + base_reg;
115 axg_spdifin_write_mode_param(struct regmap *map, int mode, unsigned int val, unsigned int num_per_reg, unsigned int base_reg, unsigned int width) argument
/linux-master/drivers/clk/visconti/
H A Dpll.c309 list->base_reg,
/linux-master/drivers/iio/imu/
H A Dkmx61.c786 u8 base_reg; local
793 base_reg = KMX61_ACC_XOUT_L;
796 base_reg = KMX61_MAG_XOUT_L;
809 ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
/linux-master/arch/powerpc/perf/
H A Dimc-pmu.c161 /* Add the base_reg value to the "reg" */
226 u32 handle, base_reg; local
257 of_property_read_u32(node, "reg", &base_reg);
269 ret = imc_parse_event(np, g_scale, g_unit, prefix, base_reg, &pmu->events[ct]);
/linux-master/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_init_ops.h877 u32 base_reg, u32 reg)
882 REG_WR(bp, base_reg + i*4,
876 bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count, u32 base_reg, u32 reg) argument
/linux-master/drivers/edac/
H A Damd64_edac.c1450 u32 base_reg, base_reg_sec; local
1464 base_reg = umc_base_reg + (cs * 4);
1467 if (!amd_smn_read(pvt->mc_node_id, base_reg, base))
1469 umc, cs, *base, base_reg);
3667 u32 base_reg, mask_reg; local
3673 base_reg = gpu_get_umc_base(pvt, umc, cs) + UMCCH_BASE_ADDR;
3676 if (!amd_smn_read(pvt->mc_node_id, base_reg, base)) {
3678 umc, cs, *base, base_reg);
/linux-master/arch/x86/kvm/
H A Demulate.c1170 static void adjust_modrm_seg(struct x86_emulate_ctxt *ctxt, int base_reg) argument
1172 if (base_reg == VCPU_REGS_RSP || base_reg == VCPU_REGS_RBP)
1180 int index_reg, base_reg, scale; local
1186 base_reg = (ctxt->rex_prefix << 3) & 8; /* REX.B */
1190 ctxt->modrm_rm = base_reg | (ctxt->modrm & 0x07);
1272 base_reg |= sib & 7;
1275 if ((base_reg & 7) == 5 && ctxt->modrm_mod == 0)
1278 modrm_ea += reg_read(ctxt, base_reg);
1279 adjust_modrm_seg(ctxt, base_reg);
[all...]
/linux-master/drivers/crypto/intel/keembay/
H A Dkeembay-ocs-aes-core.c1601 aes_dev->base_reg = devm_platform_ioremap_resource(pdev, 0);
1602 if (IS_ERR(aes_dev->base_reg))
1603 return PTR_ERR(aes_dev->base_reg);
/linux-master/drivers/ntb/hw/intel/
H A Dntb_hw_gen1.c846 unsigned long base_reg, xlat_reg, limit_reg; local
878 base_reg = bar0_off(ndev->xlat_reg->bar0_base, bar);
883 base = ioread64(mmio + base_reg) & NTB_BAR_MASK_64;
914 base = ioread32(mmio + base_reg) & NTB_BAR_MASK_32;

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