Searched refs:reg (Results 26 - 50 of 313) sorted by last modified time

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/haiku/src/kits/debugger/dwarf/
H A DDwarfFile.cpp2426 TRACE_CFI(" reg %" B_PRIu32 "\n", i);
2579 B_PRId32 ", return address reg: %" B_PRIu32 "\n", length,
2630 TRACE_CFI(" DW_CFA_offset: reg: %" B_PRIu32 ", offset: "
2712 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2715 TRACE_CFI(" DW_CFA_offset_extended: reg: %" B_PRIu32 ", "
2716 "offset: %" B_PRIu64 "\n", reg, offset);
2718 if (CfaRule* rule = context.RegisterRule(reg)) {
2726 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2729 reg);
2731 context.RestoreRegisterRule(reg);
2736 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2746 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2786 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2797 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2838 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2852 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2866 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2893 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2907 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2921 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2971 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
[all...]
H A DDwarfExpressionEvaluator.h87 void _PushRegister(uint32 reg, target_addr_t offset);
H A DDwarfExpressionEvaluator.cpp588 uint32 reg = fDataReader.ReadUnsignedLEB128(0); local
591 _piece->SetToRegister(reg);
598 uint32 reg = fDataReader.ReadUnsignedLEB128(0); local
599 _PushRegister(reg, fDataReader.ReadSignedLEB128(0));
777 DwarfExpressionEvaluator::_PushRegister(uint32 reg, target_addr_t offset) argument
780 if (!fContext->TargetInterface()->GetRegisterValue(reg, value))
/haiku/src/kits/debugger/debug_info/
H A DDwarfTypes.cpp404 int32 reg = typeContext->FromDwarfRegisterMap()->MapRegisterIndex( local
405 piece.reg);
406 if (reg >= 0) {
407 piece.reg = reg;
411 if (registers[reg].BitSize() > piece.bitSize) {
412 piece.bitOffset = registers[reg].BitSize() - piece.bitSize
H A DDwarfImageDebugInfo.cpp112 const Register* reg = _RegisterAt(index); local
113 return reg != NULL ? reg->ValueType() : 0;
128 const Register* reg = _RegisterAt(index); local
129 return reg != NULL && reg->IsCalleePreserved();
199 const Register* reg = _RegisterAt(index); local
200 if (reg == NULL)
202 return fCpuState->GetRegisterValue(reg, _value);
207 const Register* reg local
664 const Register* reg = registers + i; local
[all...]
/haiku/src/add-ons/kernel/drivers/audio/ac97/
H A Dac97.c43 bool ac97_reg_is_valid(ac97_dev *dev, uint8 reg);
109 bool ad1819_set_rate(ac97_dev *dev, uint8 reg, uint32 rate);
110 bool ad1819_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate);
358 ac97_reg_cached_write(ac97_dev *dev, uint8 reg, uint16 value) argument
360 if (!ac97_reg_is_valid(dev, reg))
362 dev->reg_write(dev->cookie, reg, value);
363 dev->reg_cache[reg] = value;
368 ac97_reg_cached_read(ac97_dev *dev, uint8 reg) argument
370 if (!ac97_reg_is_valid(dev, reg))
372 return dev->reg_cache[reg];
376 ac97_reg_uncached_write(ac97_dev *dev, uint8 reg, uint16 value) argument
385 ac97_reg_uncached_read(ac97_dev *dev, uint8 reg) argument
394 ac97_reg_update(ac97_dev *dev, uint8 reg, uint16 value) argument
406 ac97_reg_update_bits(ac97_dev *dev, uint8 reg, uint16 mask, uint16 value) argument
424 int reg; local
431 ac97_set_rate(ac97_dev *dev, uint8 reg, uint32 rate) argument
466 ac97_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate) argument
680 ac97_reg_is_valid(ac97_dev *dev, uint8 reg) argument
756 ad1819_set_rate(ac97_dev *dev, uint8 reg, uint32 rate) argument
786 ad1819_get_rate(ac97_dev *dev, uint8 reg, uint32 *rate) argument
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/haiku/src/add-ons/kernel/drivers/input/i2c_elan/
H A DELANDevice.h60 status_t _ReadRegister(uint16_t reg, size_t len, void *val);
61 status_t _WriteRegister(uint16_t reg, uint16_t val);
H A DELANDevice.cpp419 ELANDevice::_ReadRegister(uint16_t reg, size_t length, void *value) argument
422 (uint8_t) (reg & 0xff), (uint8_t) ((reg >> 8) & 0xff) };
426 reg, fTransferBuffer[0], fTransferBuffer[1], status);
435 ELANDevice::_WriteRegister(uint16_t reg, uint16_t value) argument
437 uint8_t cmd[4] = { (uint8_t) (reg & 0xff),
438 (uint8_t) ((reg >> 8) & 0xff),
441 TRACE("Write register 0x%04x with value 0x%04x\n", reg, value);
/haiku/src/add-ons/kernel/drivers/ports/pc_serial/
H A DSerialDevice.cpp82 // we might want to check the scratch reg, and try identifying
165 // 16650 and later chips have another reg at 2 when DLAB=1
179 // set control lines, and disable divisor latch reg
1062 SerialDevice::ReadReg8(int reg) argument
1067 ret = gISAModule->read_io_8(IOBase() + reg);
1070 ret = gPCIModule->read_io_8(IOBase() + reg);
1077 TRACE/*_ALWAYS*/("RR8(%d) = %d [%02x]\n", reg, ret, ret);
1083 SerialDevice::WriteReg8(int reg, uint8 value) argument
1085 // TRACE_ALWAYS("WR8(0x%04x+%d, %d [0x%x])\n", IOBase(), reg, value, value);
1086 TRACE/*_ALWAYS*/("WR8(%d, %d [0x%x])\n", reg, valu
1103 OrReg8(int reg, uint8 value) argument
1110 AndReg8(int reg, uint8 value) argument
1117 MaskReg8(int reg, uint8 value) argument
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/haiku/src/add-ons/kernel/drivers/audio/hda/
H A Ddriver.h88 uint8 Read8(uint32 reg) argument
90 return *(regs + reg);
93 uint16 Read16(uint32 reg) argument
95 return *(vuint16*)(regs + reg);
98 uint32 Read32(uint32 reg) argument
100 return *(vuint32*)(regs + reg);
103 void Write8(uint32 reg, uint8 value) argument
105 *(regs + reg) = value;
108 void Write16(uint32 reg, uint16 value) argument
110 *(vuint16*)(regs + reg)
113 Write32(uint32 reg, uint32 value) argument
118 ReadModifyWrite8(uint32 reg, uint8 mask, uint8 value) argument
126 ReadModifyWrite16(uint32 reg, uint16 mask, uint16 value) argument
134 ReadModifyWrite32(uint32 reg, uint32 mask, uint32 value) argument
186 Read8(uint32 reg) argument
191 Read16(uint32 reg) argument
196 Read32(uint32 reg) argument
201 Write8(uint32 reg, uint8 value) argument
206 Write16(uint32 reg, uint16 value) argument
211 Write32(uint32 reg, uint32 value) argument
[all...]
/haiku/src/add-ons/kernel/busses/scsi/ahci/
H A Dahci_defs.h359 wait_until_set(volatile uint32 *reg, uint32 bits, bigtime_t timeout) argument
363 if (((*reg) & bits) == bits)
372 wait_until_clear(volatile uint32 *reg, uint32 bits, bigtime_t timeout) argument
376 if (((*reg) & bits) == 0)
/haiku/src/add-ons/kernel/drivers/network/ether/rtl8125/dev/pci/
H A Dif_rgereg.h429 #define RGE_WRITE_4(sc, reg, val) \
430 bus_space_write_4(sc->rge_btag, sc->rge_bhandle, reg, val)
431 #define RGE_WRITE_2(sc, reg, val) \
432 bus_space_write_2(sc->rge_btag, sc->rge_bhandle, reg, val)
433 #define RGE_WRITE_1(sc, reg, val) \
434 bus_space_write_1(sc->rge_btag, sc->rge_bhandle, reg, val)
436 #define RGE_READ_4(sc, reg) \
437 bus_space_read_4(sc->rge_btag, sc->rge_bhandle, reg)
438 #define RGE_READ_2(sc, reg) \
439 bus_space_read_2(sc->rge_btag, sc->rge_bhandle, reg)
476 uint16_t reg; member in struct:__anon13
592 uint16_t reg; member in struct:__anon14
[all...]
/haiku/src/libs/compat/openbsd_network/compat/dev/pci/
H A Dpcivar.h28 #define pci_conf_read(pct, pcitag, reg) \
29 pci_read_config(SC_DEV_FOR_PCI, reg, sizeof(pcireg_t))
30 #define pci_conf_write(pct, pcitag, reg, val) \
31 pci_write_config(SC_DEV_FOR_PCI, reg, val, sizeof(pcireg_t))
34 #define pci_mapreg_type(pct, pcitag, reg) \
35 pci_mapreg_type_openbsd(SC_DEV_FOR_PCI, reg)
36 #define pci_mapreg_map(pa, reg, type, flags, tagp, handlep, basep, sizep, maxsize) \
37 pci_mapreg_map_openbsd(SC_DEV_FOR_PCI, reg, type, flags, tagp, handlep, basep, sizep, maxsize)
56 pci_mapreg_type_openbsd(device_t dev, int reg) argument
58 return (_PCI_MAPREG_TYPEBITS(pci_read_config(dev, reg, sizeo
62 pci_mapreg_map_openbsd(device_t dev, int reg, pcireg_t type, int flags, bus_space_tag_t* tagp, bus_space_handle_t* handlep, bus_addr_t* basep, bus_size_t* sizep, bus_size_t maxsize) argument
[all...]
/haiku/src/system/kernel/arch/generic/
H A Ddebug_uart.cpp11 DebugUART::Out8(int reg, uint8 value) argument
15 *((uint8 *)Base() + reg * sizeof(uint32)) = value;
18 if ((Base() + reg) <= 0xFFFF)
19 __asm__ volatile ("outb %%al,%%dx" : : "a" (value), "d" (Base() + reg));
21 *((uint8 *)Base() + reg) = value;
23 *((uint8 *)Base() + reg) = value;
29 DebugUART::In8(int reg) argument
33 return *((uint8 *)Base() + reg * sizeof(uint32));
36 if ((Base() + reg) <= 0xFFFF) {
38 __asm__ volatile ("inb %%dx,%%al" : "=a" (_v) : "d" (Base() + reg));
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/intel22x/dev/igc/
H A Digc_i225.c865 u32 i, reg; local
870 reg = IGC_READ_REG(hw, IGC_EECD);
871 if (reg & IGC_EECD_FLUDONE_I225) {
H A Digc_hw.h373 * X_reg L,P,A n/a for simple PHY reg accesses
543 s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
544 s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
545 void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);
546 void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);
H A Dif_igc.c1505 u32 dmac, reg = ~IGC_DMACR_DMAC_EN; local
1513 IGC_WRITE_REG(hw, IGC_DMACR, reg);
1524 reg = IGC_READ_REG(hw, IGC_FCRTC);
1525 reg &= ~IGC_FCRTC_RTH_COAL_MASK;
1526 reg |= ((hwm << IGC_FCRTC_RTH_COAL_SHIFT)
1528 IGC_WRITE_REG(hw, IGC_FCRTC, reg);
1533 reg = IGC_READ_REG(hw, IGC_DMACR);
1534 reg &= ~IGC_DMACR_DMACTHR_MASK;
1535 reg |= ((dmac << IGC_DMACR_DMACTHR_SHIFT)
1539 reg |
2131 u32 reg; local
[all...]
/haiku/src/add-ons/kernel/interrupt_controllers/openpic/
H A Dopenpic.cpp117 openpic_read(openpic_info *info, int reg) argument
120 info->virtual_registers + reg));
125 openpic_write(openpic_info *info, int reg, uint32 val) argument
127 info->pci->write_io_32(info->device, info->virtual_registers + reg,
206 "unknown (feature reg: 0x%lx)", x);
/haiku/src/add-ons/kernel/drivers/power/x86_cpuidle/
H A Dacpi_cpuidle.cpp328 struct acpicpu_reg *reg = (struct acpicpu_reg *)pointer->data.buffer.buffer; local
329 switch (reg->reg_spaceid) {
332 if (reg->reg_addr == 0) {
336 if (reg->reg_bitwidth != 8) {
340 ci->address = reg->reg_addr;
347 ci->address = reg->reg_addr;
352 !(reg->reg_accesssize & ACPI_PDC_GAS_BM))
357 dprintf("invalid spaceid %" B_PRId8 "\n", reg->reg_spaceid);
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_general.c19 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \
20 uint32 value = CFGR(reg); \
22 NVCFG_##reg, #reg, value)); \
/haiku/3rdparty/korli/
H A Dgenerate_ids_from_drivers.sh42 pciBsdEtherDriver 3com xl xl devs reg
43 pciBsdEtherDriver atheros813x alc alc ident_table reg
44 pciBsdEtherDriver atheros81xx ale ale devs reg
45 pciBsdEtherDriver attansic_l1 age age devs reg
47 pciBsdEtherDriver broadcom440x bfe bfe devs reg
48 pciBsdEtherDriver broadcom570x bge bge devs reg
69 pciBsdEtherDriver ipro100 fxp fxp ident_table reg
81 pciBsdEtherDriver jmicron2x0 jme jme devs reg
82 pciBsdEtherDriver marvell_yukon msk msk products reg
83 pciBsdEtherDriver nforce nfe nfe devs reg
[all...]
/haiku/src/apps/debugger/user_interface/gui/team_window/
H A DVariablesView.cpp1571 architecture->Registers()[piece.reg].Name());
H A DRegistersView.cpp158 const Register* reg = fArchitecture->Registers() + rowIndex; local
162 value.SetTo(reg->Name(), B_VARIANT_DONT_COPY_DATA);
167 if (!fCpuState->GetRegisterValue(reg, value))
169 else if (reg->Format() == REGISTER_FORMAT_SIMD) {
172 reg->BitSize(),fSIMDFormat, output));
320 const Register* reg = fArchitecture->Registers() + rowIndex; local
321 if (reg->Format() == REGISTER_FORMAT_FLOAT) {
333 if (reg->Format() == REGISTER_FORMAT_INTEGER) {
353 } else if (reg->Format() == REGISTER_FORMAT_SIMD) {
/haiku/src/kits/interface/
H A DRegionSupport.cpp121 #define MEMCHECK(reg, rect, firstrect){\
122 if ((reg)->fCount >= ((reg)->fDataSize - 1)){\
124 ((char *)(firstrect), (unsigned) (2 * (sizeof(clipping_rect)) * ((reg)->fDataSize)));\
127 (reg)->fDataSize *= 2;\
128 (rect) = &(firstrect)[(reg)->fCount];\
144 #define ADDRECT(reg, r, rx1, ry1, rx2, ry2){\
146 CHECK_PREVIOUS((reg), (r), (rx1), (ry1), (rx2), (ry2))){\
151 EXTENTS((r), (reg));\
152 (reg)
[all...]
/haiku/src/add-ons/kernel/bus_managers/ps2/
H A Dps2_elantech.cpp234 elantech_write_reg(elantech_cookie* cookie, uint8 reg, uint8 value) argument
236 if (reg < 0x7 || reg > 0x26)
238 if (reg > 0x11 && reg < 0x20)
251 || ps2_dev_command(dev, reg) != B_OK
261 || ps2_dev_command(dev, reg) != B_OK
271 || ps2_dev_command(dev, reg) != B_OK
288 elantech_read_reg(elantech_cookie* cookie, uint8 reg, uint8 *value) argument
290 if (reg <
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