Lines Matching refs:reg
88 uint8 Read8(uint32 reg)
90 return *(regs + reg);
93 uint16 Read16(uint32 reg)
95 return *(vuint16*)(regs + reg);
98 uint32 Read32(uint32 reg)
100 return *(vuint32*)(regs + reg);
103 void Write8(uint32 reg, uint8 value)
105 *(regs + reg) = value;
108 void Write16(uint32 reg, uint16 value)
110 *(vuint16*)(regs + reg) = value;
113 void Write32(uint32 reg, uint32 value)
115 *(vuint32*)(regs + reg) = value;
118 void ReadModifyWrite8(uint32 reg, uint8 mask, uint8 value)
120 uint8 temp = Read8(reg);
123 Write8(reg, temp);
126 void ReadModifyWrite16(uint32 reg, uint16 mask, uint16 value)
128 uint16 temp = Read16(reg);
131 Write16(reg, temp);
134 void ReadModifyWrite32(uint32 reg, uint32 mask, uint32 value)
136 uint32 temp = Read32(reg);
139 Write32(reg, temp);
186 uint8 Read8(uint32 reg)
188 return controller->Read8(HDAC_STREAM_BASE + offset + reg);
191 uint16 Read16(uint32 reg)
193 return controller->Read16(HDAC_STREAM_BASE + offset + reg);
196 uint32 Read32(uint32 reg)
198 return controller->Read32(HDAC_STREAM_BASE + offset + reg);
201 void Write8(uint32 reg, uint8 value)
203 *(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;
206 void Write16(uint32 reg, uint16 value)
208 *(vuint16*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;
211 void Write32(uint32 reg, uint32 value)
213 *(vuint32*)(controller->regs + HDAC_STREAM_BASE + offset + reg) = value;