| /linux-master/include/dt-bindings/clock/ |
| H A D | r8a77965-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a77990-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a77961-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | r8a774c0-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a77990-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a7795-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a7796-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a77965-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| H A D | r8a77961-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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| /linux-master/drivers/video/fbdev/via/ |
| H A D | via_clock.h | 8 * clock and PLL management functions
59 void via_clock_init(struct via_clock *clock, int gfx_chip);
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| /linux-master/drivers/media/dvb-frontends/ |
| H A D | af9033.h | 17 * clock Hz
21 u32 clock; member in struct:af9033_config
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| H A D | drxd.h | 23 u32 clock; member in struct:drxd_config
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| /linux-master/arch/sparc/include/asm/ |
| H A D | vvar.h | 23 } clock; member in struct:vvar_data
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| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | r600.h | 47 struct radeon_crtc *crtc, unsigned int clock);
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| /linux-master/drivers/i2c/busses/ |
| H A D | i2c-pca-isa.c | 31 * in the actual clock rate */
32 static int clock = 59000; variable
147 pca_isa_data.i2c_clock = clock;
193 module_param(clock, int, 0);
194 MODULE_PARM_DESC(clock, "Clock rate in hertz.\n\t\t"
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| /linux-master/drivers/scsi/ |
| H A D | sim710.c | 85 int irq, int clock, int differential,
93 printk(KERN_NOTICE "sim710: irq = %d, clock = %d, base = 0x%lx, scsi_id = %d\n",
94 irq, clock, base_addr, scsi_id);
110 hostdata->clock = clock;
84 sim710_probe_common(struct device *dev, unsigned long base_addr, int irq, int clock, int differential, int scsi_id) argument
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| /linux-master/sound/pci/echoaudio/ |
| H A D | gina20_dsp.c | 84 /* Map the DSP clock detect bits to the generic driver clock
151 static int set_input_clock(struct echoaudio *chip, u16 clock) argument
154 switch (clock) {
160 chip->input_clock = clock;
168 chip->input_clock = clock;
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| /linux-master/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-ptp.c | 218 struct ptp_clock *clock; local
232 clock = ptp_clock_register(info, pdata->dev);
233 if (IS_ERR(clock)) {
238 pdata->ptp_clock = clock;
241 * addend = 2^32 / (PTP ref clock / 50Mhz)
242 * = (2^32 * 50Mhz) / PTP ref clock
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| /linux-master/drivers/net/can/dev/ |
| H A D | calc_bittiming.c | 99 brp = priv->clock.freq / (tsegall * bt->bitrate) + tseg % 2;
106 bitrate = priv->clock.freq / (brp * tsegall);
153 do_div(v64, priv->clock.freq);
168 bt->bitrate = priv->clock.freq /
189 /* Sample point in clock periods */
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| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8173-img.c | 8 #include <dt-bindings/clock/mt8173-clk.h>
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| H A D | clk-mt8173-vdecsys.c | 8 #include <dt-bindings/clock/mt8173-clk.h>
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| H A D | clk-mt8183-mfgcfg.c | 13 #include <dt-bindings/clock/mt8183-clk.h>
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| H A D | clk-mt8183-ipu0.c | 12 #include <dt-bindings/clock/mt8183-clk.h>
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| H A D | clk-mt8183-ipu1.c | 12 #include <dt-bindings/clock/mt8183-clk.h>
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| H A D | clk-mt8183-ipu_adl.c | 12 #include <dt-bindings/clock/mt8183-clk.h>
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