Searched refs:readl (Results 226 - 250 of 2403) sorted by last modified time

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/linux-master/drivers/scsi/
H A Dhpsa.c7151 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7356 misc_fw_support = readl(&cfgtable->misc_fw_support);
7424 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7426 readl(&(tb->TransportSupport)));
7428 readl(&(tb->TransportActive)));
7430 readl(&(tb->HostWrite.TransportRequest)));
7432 readl(&(tb->HostWrite.CoalIntDelay)));
7434 readl(&(tb->HostWrite.CoalIntCount)));
7436 readl(&(tb->CmdsOutMax)));
7437 dev_info(dev, " Bus Types = 0x%x\n", readl(
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H A Dhptiop.c52 req = readl(&hba->u.itl.iop->inbound_queue);
60 readl(&hba->u.itl.iop->outbound_intstatus);
90 while ((req = readl(&hba->u.itl.iop->outbound_queue)) !=
101 if (readl(&p->flags) & IOP_REQUEST_FLAG_SYNC_REQUEST) {
102 if (readl(&p->context))
120 if (plx && readl(plx + 0x11C5C) & 0xf)
123 status = readl(&iop->outbound_intstatus);
126 u32 msg = readl(&iop->outbound_msgaddr0);
144 u32 outbound_tail = readl(&mu->outbound_tail);
145 u32 outbound_head = readl(
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/linux-master/drivers/scsi/hisi_sas/
H A Dhisi_sas_v3_hw.c567 return readl(regs);
590 return readl(regs);
H A Dhisi_sas_v2_hw.c733 return readl(regs);
763 return readl(regs);
H A Dhisi_sas_v1_hw.c416 return readl(regs);
440 return readl(regs);
/linux-master/drivers/scsi/bfa/
H A Dbfad_debugfs.c297 *regbuf = readl(reg_addr);
/linux-master/drivers/pwm/
H A Dpwm-meson.c228 value = readl(meson->base + REG_MISC_AB);
243 value = readl(meson->base + REG_MISC_AB);
318 value = readl(meson->base + REG_MISC_AB);
321 value = readl(meson->base + channel_data->reg_offset);
H A Dpwm-bcm2835.c42 value = readl(pc->base + PWM_CONTROL);
55 value = readl(pc->base + PWM_CONTROL);
103 val = readl(pc->base + PWM_CONTROL);
/linux-master/drivers/ptp/
H A Dptp_dte.c79 sum3 = readl(regs + DTE_NCO_OVERFLOW_REG) & DTE_NCO_SUM3_MASK;
80 sum2 = readl(regs + DTE_NCO_TIME_REG);
280 readl(ptp_dte->regs + (i * sizeof(u32)));
/linux-master/drivers/perf/
H A Dxgene_pmu.c732 return readl(pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
802 val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET);
812 val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR);
822 val = readl(pmu_dev->inf->csr + PMU_PMINTENSET);
832 val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR);
841 val = readl(pmu_dev->inf->csr + PMU_PMCR);
850 val = readl(pmu_dev->inf->csr + PMU_PMCR);
859 val = readl(pmu_dev->inf->csr + PMU_PMCR);
1198 pmovsr = readl(csr + PMU_PMOVSSET) & PMU_OVERFLOW_MASK;
1200 pmovsr = readl(cs
[all...]
H A Dthunderx2_pmu.c296 return readl((void __iomem *)addr);
H A Darm_smmuv3_pmu.c217 value = readl(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4));
746 if (!(readl(pmu->reg_base + SMMU_PMCG_CFGR) & SMMU_PMCG_CFGR_MSI))
820 u32 pidr0 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR0);
821 u32 pidr1 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR1);
822 u32 pidr2 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR2);
823 u32 pidr3 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR3);
824 u32 pidr4 = readl(smmu_pmu->reg_base + SMMU_PMCG_PIDR4);
H A Darm_dmc620_pmu.c267 return readl(dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg);
390 status = readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLKDIV2);
391 status |= (readl(dmc620_pmu->base + DMC620_PMU_OVERFLOW_STATUS_CLK) <<
H A Darm-ccn.c854 while (!(readl(ccn->dt.base + CCN_DT_PMSR) & 0x1))
857 res = readl(ccn->dt.base + CCN_DT_PMCCNTRSR + 4) & 0xff;
859 res |= readl(ccn->dt.base + CCN_DT_PMCCNTRSR);
862 res = readl(ccn->dt.base + CCN_DT_PMEVCNT(idx));
908 val = readl(xp->base + CCN_XP_DT_CONFIG);
959 val = readl(source->base + CCN_XP_DT_INTERFACE_SEL);
1005 val = readl(source->base + CCN_XP_PMU_EVENT_SEL);
1041 val = readl(source->base + CCN_HNF_PMU_EVENT_SEL);
1068 val = readl(ccn->dt.base + CCN_DT_ACTIVE_DSM + offset);
1143 u32 val = readl(cc
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H A Dalibaba_uncore_drw_pmu.c294 cycle_high = readl(drw_pmu->cfg_base + ALI_DRW_PMU_CYCLE_CNT_HIGH);
296 cycle_low = readl(drw_pmu->cfg_base + ALI_DRW_PMU_CYCLE_CNT_LOW);
301 return readl(drw_pmu->cfg_base +
349 val = readl(drw_pmu->cfg_base + reg);
367 val = readl(drw_pmu->cfg_base + reg);
398 status = readl(drw_pmu->cfg_base + ALI_DRW_PMU_OV_INTR_STATUS);
/linux-master/drivers/perf/hisilicon/
H A Dhns3_pmu.c750 return readl(hns3_pmu->base + offset);
1389 val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL);
1399 val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL);
1416 hns3_pmu->hw_clk_freq = readl(hns3_pmu->base + HNS3_PMU_REG_CLOCK_FREQ);
1418 val = readl(hns3_pmu->base + HNS3_PMU_REG_BDF);
1422 val = readl(hns3_pmu->base + HNS3_PMU_REG_DEVICE_ID);
1430 hns3_pmu->identifier = readl(hns3_pmu->base + HNS3_PMU_REG_VERSION);
H A Dhisi_pcie_pmu.c817 pcie_pmu->identifier = readl(pcie_pmu->base + HISI_PCIE_REG_VERSION);
/linux-master/drivers/perf/arm_cspmu/
H A Darm_cspmu.c148 val_hi = readl(addr + 4);
149 val_lo = readl(addr);
150 } while (val_hi != readl(addr + 4));
421 cspmu->impl.pmiidr = readl(cspmu->base0 + PMIIDR);
755 return readl(cspmu->base1 + offset);
987 cspmu->pmcfgr = readl(cspmu->base0 + PMCFGR);
1027 pmovs[i] = readl(cspmu->base1 + pmovclr_offset);
/linux-master/drivers/net/wireless/realtek/rtw89/
H A Dpci.c1765 u32 val = readl(rtwpci->mmap + addr);
1776 val = readl(rtwpci->mmap + addr);
1815 return readl(rtwpci->mmap + addr);
/linux-master/drivers/net/wireless/realtek/rtw88/
H A Dpci.c68 return readl(rtwpci->mmap + addr);
/linux-master/drivers/net/wireless/quantenna/qtnfmac/pcie/
H A Dpearl_pcie.c172 cfg = readl(reg);
200 u32 s = readl(reg);
207 u32 s = readl(reg);
214 u32 s = readl(reg);
386 val = readl(PCIE_HHBM_CONFIG(ps->pcie_reg_base));
477 tx_done_index = readl(PCIE_HDP_RX0DMA_CNT(ps->pcie_reg_base))
651 status = readl(PCIE_HDP_INT_STATUS(ps->pcie_reg_base));
855 u32 reg = readl(PCIE_HDP_INT_EN(ps->pcie_reg_base));
888 readl(PCIE_HDP_RX0DMA_CNT(ps->pcie_reg_base))
897 readl(PCIE_HDP_TX0DMA_CN
[all...]
H A Dtopaz_pcie.c108 cfg = readl(reg);
116 u32 cfg = readl(reg);
133 ts->dma_msi_imwr = readl(reg);
160 u32 s = readl(reg);
404 tx_done_index = readl(ts->ep_next_rx_pkt);
472 ready = readl(ts->txqueue_wake);
770 u32 tx_done_index = readl(ts->ep_next_rx_pkt);
803 u32 offset = readl(&bda->bda_dma_offset);
825 while (readl(&bda->bda_pci_post_status) !=
838 endian = readl(
[all...]
/linux-master/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dsoc.c165 val |= readl(base + offset) & ~mask;
179 val = readl(dev->sku + MT_TOP_POS_SKU);
240 ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_RX_EN_MASK),
249 ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_TX_RDY_MASK),
/linux-master/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dmac.c1554 dma_idx = readl(&q->regs->dma_idx);
1558 dma_idx != readl(&q->regs->cpu_idx))
/linux-master/drivers/net/wireless/mediatek/mt76/
H A Ddma.c20 _val = readl(&(_q)->regs->_field); \
36 #define Q_READ(_q, _field) readl(&(_q)->regs->_field)

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