| /linux-master/arch/arm/net/ |
| H A D | bpf_jit_32.c | 1397 const s8 *r2 = bpf2a32[BPF_REG_2]; local
1416 r_array = arm_bpf_get_reg32(r2[1], tmp2[0], ctx);
1543 /* sub r2, sp, #SCRATCH_SIZE */
2052 const s8 *r2 = bpf2a32[BPF_REG_2]; local
2059 emit_a32_mov_r64(true, r1, r2, ctx);
|
| /linux-master/arch/arm/nwfpe/ |
| H A D | entry.S | 91 and r2, r6, #0x0F000000 @ test for FP insns
92 teq r2, #0x0C000000
93 teqne r2, #0x0D000000
94 teqne r2, #0x0E000000
130 mov r2, r4
176 @ r2 = PC+4
|
| /linux-master/arch/arm/vfp/ |
| H A D | vfphw.S | 42 VFPFMXR FPINST, r2 @ restore FPINST (only if FPEXC.EX is set)
56 VFPFSTMIA r0, r2 @ save the working registers
57 VFPFMRX r2, FPSCR @ current status
65 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
136 tbl_branch r2, r3, #3
|
| /linux-master/arch/arm/xen/ |
| H A D | hypercall.S | 36 * second in r1, the third in r2 and the fourth in r3. Considering that
100 mov r1, r2
101 mov r2, r3
|
| /linux-master/arch/arm64/boot/dts/arm/ |
| H A D | Makefile | 5 dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb juno-r2.dtb juno-scmi.dtb juno-r1-scmi.dtb juno-r2-scmi.dtb
|
| /linux-master/arch/arm64/boot/dts/freescale/ |
| H A D | Makefile | 121 dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
203 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb
|
| /linux-master/arch/arm64/boot/dts/mediatek/ |
| H A D | Makefile | 73 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r2.dtb
|
| /linux-master/arch/arm64/boot/dts/qcom/ |
| H A D | Makefile | 115 dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-homestar-r2.dtb
146 dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
147 dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2-lte.dtb
189 dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
|
| /linux-master/arch/arm64/boot/dts/rockchip/ |
| H A D | Makefile | 100 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
|
| /linux-master/arch/arm64/crypto/ |
| H A D | poly1305-armv8.pl | 323 add w13,w14,w14,lsl#2 // r2*5
325 str w14,[$ctx,#16*3] // r2
563 // d4 = h0*r4 + h1*r3 + h2*r2 + h3*r1 + h4*r0
564 // d3 = h0*r3 + h1*r2 + h2*r1 + h3*r0 + h4*5*r4
565 // d2 = h0*r2 + h1*r1 + h2*r0 + h3*5*r4 + h4*5*r3
566 // d1 = h0*r1 + h1*r0 + h2*5*r4 + h3*5*r3 + h4*5*r2
567 // d0 = h0*r0 + h1*5*r4 + h2*5*r3 + h3*5*r2 + h4*5*r1
|
| H A D | sm4-ce-gcm-core.S | 52 r2, r3, m2, m3, T2, T3, \
60 pmull r2.1q, m2.1d, m3.1d; \
88 eor r2.16b, r2.16b, T3.16b; \
135 r2, r3, m2, m3, T2, T3, \
147 pmull r2.1q, m2.1d, m3.1d; \
189 eor r2.16b, r2.16b, T3.16b; \
200 eor r0.16b, r0.16b, r2.16b; \
|
| /linux-master/arch/arm64/kvm/ |
| H A D | pkvm.c | 29 const struct memblock_region *r2 = p2; local
31 return r1->base < r2->base ? -1 : (r1->base > r2->base);
|
| /linux-master/arch/arm64/net/ |
| H A D | bpf_jit_comp.c | 430 const u8 r2 = bpf2a64[BPF_REG_2]; local
446 emit(A64_LDR32(tmp, r2, tmp), ctx);
467 emit(A64_ADD(1, tmp, r2, tmp), ctx);
|
| /linux-master/arch/hexagon/include/asm/ |
| H A D | elf.h | 104 DEST.r2 = REGS->r02; \
|
| /linux-master/arch/hexagon/include/uapi/asm/ |
| H A D | user.h | 16 unsigned long r2; member in struct:user_regs_struct
|
| /linux-master/arch/hexagon/lib/ |
| H A D | divsi3.S | 16 r4 = sub(r2,r3)
17 r6 = cl0(r2)
18 p0 = cmp.gtu(r3,r2)
51 if (!p0.new) r2 = sub(r2,r4)
52 p0 = cmp.gtu(r4,r2)
57 if (!p0.new) r2 = sub(r2,r6)
58 p0 = cmp.gtu(r6,r2)
|
| H A D | memcpy_likely_aligned.S | 19 p0 = cmp.gtu(r2,#64)
25 p0 = cmp.gtu(r2,#32)
28 p1 = cmp.gtu(r2,#40)
29 p2 = cmp.gtu(r2,#48)
43 p0 = cmp.gtu(r2,#56)
|
| H A D | modsi3.S | 11 r2 = abs(r0) define
15 r3 = cl0(r2)
17 p0 = cmp.gtu(r1,r2)
26 r0 = r2
27 r2 = lsl(r1,r3) define
32 p0 = cmp.gtu(r2,r0)
33 if (!p0.new) r0 = sub(r0,r2)
34 r2 = lsr(r2,#1) define
38 p0 = cmp.gtu(r2,r
[all...] |
| H A D | udivsi3.S | 10 r2 = cl0(r0) define
16 r6 = sub(r3,r2)
28 p0 = cmp.gtu(r2,r1)
29 if (!p0.new) r1 = sub(r1,r2)
34 p0 = cmp.gtu(r2,r1)
|
| H A D | umodsi3.S | 10 r2 = cl0(r0) define
15 r2 = sub(r3,r2) define
19 loop0(1f,r2)
20 p1 = cmp.eq(r2,#0)
21 r2 = lsl(r1,r2) define
26 p0 = cmp.gtu(r2,r0)
27 if (!p0.new) r0 = sub(r0,r2)
28 r2 define
[all...] |
| /linux-master/arch/loongarch/include/asm/ |
| H A D | fpregdef.h | 50 #define fcsr2 $r2
|
| H A D | loongarch.h | 1388 #define LOONGARCH_FCSR2 $r2
|
| H A D | regdef.h | 10 #define tp $r2
|
| /linux-master/arch/loongarch/kernel/ |
| H A D | ptrace.c | 778 REG_OFFSET_NAME(r2, regs[2]),
|
| /linux-master/arch/loongarch/power/ |
| H A D | suspend_asm.S | 19 st.d $r2, sp, PT_R2
40 ld.d $r2, sp, PT_R2
|