Searched refs:clock (Results 201 - 225 of 1865) sorted by relevance

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/linux-master/drivers/mmc/host/
H A Dsdhci-xenon-phy.c230 dev_err(mmc_dev(host->mmc), "phy_init: Internal clock never stabilized.\n");
246 u32 wait, clock; local
272 /* 4 additional bus clock and 4 AXI bus clock are required */
276 clock = host->clock;
277 if (!clock)
279 clock = XENON_LOWEST_SDCLK_FREQ;
281 wait /= clock;
358 if (WARN_ON(host->clock <
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/linux-master/sound/drivers/vx/
H A Dvx_uer.c17 * vx_modify_board_clock - tell the board that its clock has been modified
106 /* If clock is present, read frequency */
132 * compute the sample clock value from frequency
174 * vx_change_clock_source - change the clock source
191 * set the internal clock
195 int clock; local
197 /* Get real clock value */
198 clock = vx_calc_clock_from_freq(chip, freq);
199 snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, fre
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/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_g200ew3.c33 long clock = new_crtc_state->mode.clock; local
47 if ((clock * testp * testp2) > vcomax)
49 if ((clock * testp * testp2) < vcomin)
54 if (computed > clock)
55 tmpdelta = computed - clock;
57 tmpdelta = clock - computed;
H A Dmgag200_g200eh3.c26 long clock = new_crtc_state->mode.clock; local
38 if (clock * testm > vcomax)
40 if (clock * testm < vcomin)
44 if (computed > clock)
45 tmpdelta = computed - clock;
47 tmpdelta = clock - computed;
H A Dmgag200_i2c.c72 mga_i2c_set(mdev, i2c->clock, state);
86 return (mga_i2c_read_gpio(mdev) & i2c->clock) ? 1 : 0;
107 i2c->clock = BIT(info->i2c.clock_bit);
/linux-master/drivers/net/can/cc770/
H A Dcc770_platform.c30 * bosch,external-clock-frequency = <16000000>;
78 prop = of_get_property(np, "bosch,external-clock-frequency",
84 priv->can.clock.freq = clkext;
86 /* The system clock may not exceed 10 MHz */
87 if (priv->can.clock.freq > 10000000) {
89 priv->can.clock.freq /= 2;
92 /* The memory clock may not exceed 8 MHz */
93 if (priv->can.clock.freq > 8000000)
96 if (of_property_read_bool(np, "bosch,divide-memory-clock"))
112 prop = of_get_property(np, "bosch,clock
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/linux-master/drivers/net/ethernet/freescale/fs_enet/
H A Dmii-fec.c106 int ret = -ENOMEM, clock, speed; local
136 clock = get_bus_freq(&ofdev->dev);
137 if (!clock) {
138 /* Use maximum divider if clock is unknown */
139 dev_warn(&ofdev->dev, "could not determine IPS clock\n");
140 clock = 0x3F * 5000000;
143 clock = ppc_proc_freq;
146 * Scale for a MII clock <= 2.5 MHz
149 speed = (clock + 4999999) / 5000000;
153 "MII clock (
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/linux-master/arch/powerpc/kernel/
H A Dudbg_16550.c95 void __init udbg_uart_setup(unsigned int speed, unsigned int clock) argument
102 if (clock == 0)
103 clock = 1843200;
107 base_bauds = clock / 16;
124 unsigned int __init udbg_probe_uart_speed(unsigned int clock) argument
149 speed = (clock / prescaler) / (divisor * 16);
152 if (speed > (clock / 16))
/linux-master/drivers/net/ethernet/mellanox/mlx4/
H A Den_clock.c68 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
112 timecounter_read(&mdev->clock);
119 * mlx4_en_phc_adjfine - adjust the frequency of the hardware clock
120 * @ptp: ptp clock structure
138 timecounter_read(&mdev->clock);
146 * mlx4_en_phc_adjtime - Shift the time of the hardware clock
147 * @ptp: ptp clock structure
159 timecounter_adjtime(&mdev->clock, delta);
166 * mlx4_en_phc_gettime - Reads the current time from the hardware clock
167 * @ptp: ptp clock structur
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.c69 uint32_t clock, uint32_t msg)
79 if (clock <= ptable->entries[i].ecclk)
87 if (clock >= ptable->entries[i].ecclk)
100 uint32_t clock, uint32_t msg)
110 if (clock <= table->entries[i].clk)
118 if (clock >= table->entries[i].clk)
130 uint32_t clock, uint32_t msg)
140 if (clock <= ptable->entries[i].vclk)
148 if (clock >= ptable->entries[i].vclk)
460 "Fail to get clock tabl
68 smu8_get_eclk_level(struct pp_hwmgr *hwmgr, uint32_t clock, uint32_t msg) argument
99 smu8_get_sclk_level(struct pp_hwmgr *hwmgr, uint32_t clock, uint32_t msg) argument
129 smu8_get_uvd_level(struct pp_hwmgr *hwmgr, uint32_t clock, uint32_t msg) argument
559 unsigned long clock = 0, level; local
585 unsigned long clock = 0; local
612 unsigned long clock = 0; local
639 unsigned long clock = 0; local
689 unsigned long clock = 0; local
1177 unsigned long clock = 0, level; local
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/linux-master/include/linux/mfd/
H A Ddbx500-prcmu.h14 #include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
68 * - EPOD_STATE_ON_CLK_OFF: The EPOD is switched on, clock is still off
69 * - EPOD_STATE_ON: Same as above, but with clock enabled
264 static inline int prcmu_request_clock(u8 clock, bool enable) argument
266 return db8500_prcmu_request_clock(clock, enable);
269 unsigned long prcmu_clock_rate(u8 clock);
270 long prcmu_round_clock_rate(u8 clock, unsigned long rate);
271 int prcmu_set_clock_rate(u8 clock, unsigned long rate);
429 static inline int prcmu_request_clock(u8 clock, bool enable) argument
434 static inline long prcmu_round_clock_rate(u8 clock, unsigne argument
439 prcmu_set_clock_rate(u8 clock, unsigned long rate) argument
444 prcmu_clock_rate(u8 clock) argument
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/linux-master/drivers/i2c/algos/
H A Di2c-algo-pca.c399 int clock; local
429 "%s: Invalid I2C clock speed selected."
435 "Choosing the clock frequency based on "
440 clock = pca_clock(pca_data);
442 adap->name, freqs[clock]);
445 pca_data->bus_settings.clock_freq = clock;
449 int clock; local
456 * They are used (added) below to calculate the clock dividers
459 * maximum clock rate for each mode
464 printk(KERN_WARNING "%s: I2C clock spee
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/linux-master/drivers/media/platform/qcom/camss/
H A Dcamss.h46 char *clock[CAMSS_RES_MAX]; member in struct:camss_subdev_resources
136 int camss_enable_clocks(int nclocks, struct camss_clock *clock,
138 void camss_disable_clocks(int nclocks, struct camss_clock *clock);
/linux-master/drivers/media/rc/
H A Dir-hix5hd2.c89 struct clk *clock; member in struct:hix5hd2_ir_priv
112 ret = clk_prepare_enable(dev->clock);
114 clk_disable_unprepare(dev->clock);
288 priv->clock = devm_clk_get(dev, NULL);
289 if (IS_ERR(priv->clock)) {
290 dev_err(dev, "clock not found\n");
291 ret = PTR_ERR(priv->clock);
294 ret = clk_prepare_enable(priv->clock);
297 priv->rate = clk_get_rate(priv->clock);
336 clk_disable_unprepare(priv->clock);
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/linux-master/sound/soc/sh/
H A Dfsi.c101 #define SE (1 << 0) /* Fix the master clock */
188 * FSI clock
234 /* see [FSI clock] */
254 struct fsi_clk clock; member in struct:fsi_priv
706 * SPDIF master clock function
724 * clock function
734 struct fsi_clk *clock = &fsi->clock; local
737 clock->xck = NULL;
738 clock
805 struct fsi_clk *clock = &fsi->clock; local
844 struct fsi_clk *clock = &fsi->clock; local
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/linux-master/tools/perf/tests/shell/
H A Ddaemon.sh171 run = -e cpu-clock -m 1 sleep 10
174 run = -e task-clock -m 1 sleep 10
189 # pid:size:-e cpu-clock:base/size:base/size/output:base/size/control:base/size/ack:0
192 check_line_other "${line}" size "-e cpu-clock -m 1 sleep 10" ${base}/session-size \
197 # pid:time:-e task-clock:base/time:base/time/output:base/time/control:base/time/ack:0
200 check_line_other "${line}" time "-e task-clock -m 1 sleep 10" ${base}/session-time \
226 run = -e cpu-clock -m 1 sleep 10
229 run = -e task-clock -m 1 sleep 10
238 # pid:time:-e task-clock:base/time:base/time/output:base/time/control:base/time/ack:0
241 check_line_other "${line}" time "-e task-clock
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/linux-master/drivers/ptp/
H A Dptp_private.h3 * PTP 1588 clock support - private declarations for the core module.
14 #include <linux/posix-clock.h>
39 struct posix_clock clock; member in struct:ptp_clock
50 int defunct; /* tells readers to go away when clock is being removed */
74 struct ptp_clock *clock; member in struct:ptp_vclock
98 /* Check if ptp virtual clock is in use */
114 /* Check if ptp clock shall be free running */
/linux-master/arch/powerpc/include/asm/vdso/
H A Dgettimeofday.h141 int __c_kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts,
146 int __c_kernel_clock_gettime(clockid_t clock, struct old_timespec32 *ts,
148 int __c_kernel_clock_gettime64(clockid_t clock, struct __kernel_timespec *ts,
/linux-master/drivers/media/platform/samsung/s3c-camif/
H A Dcamif-core.c36 /* HCLK CAMIF clock */
38 /* CAMIF / external camera sensor master clock */
332 if (IS_ERR(camif->clock[i]))
334 clk_unprepare(camif->clock[i]);
335 clk_put(camif->clock[i]);
336 camif->clock[i] = ERR_PTR(-EINVAL);
345 camif->clock[i] = ERR_PTR(-EINVAL);
348 camif->clock[i] = clk_get(camif->dev, camif_clocks[i]);
349 if (IS_ERR(camif->clock[i])) {
350 ret = PTR_ERR(camif->clock[
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/linux-master/drivers/media/usb/uvc/
H A Duvc_video.c526 if (dev_sof == stream->clock.last_sof)
529 stream->clock.last_sof = dev_sof;
554 if (stream->clock.sof_offset == (u16)-1) {
557 stream->clock.sof_offset = delta_sof;
559 stream->clock.sof_offset = 0;
562 dev_sof = (dev_sof + stream->clock.sof_offset) & 2047;
564 spin_lock_irqsave(&stream->clock.lock, flags);
566 sample = &stream->clock.samples[stream->clock.head];
573 stream->clock
583 struct uvc_clock *clock = &stream->clock; local
593 struct uvc_clock *clock = &stream->clock; local
706 struct uvc_clock *clock = &stream->clock; local
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/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c42 struct radeon_pll *spll = &rdev->clock.spll;
72 struct radeon_pll *mpll = &rdev->clock.mpll;
101 * Read XTAL (ref clock), SCLK and MCLK from Open Firmware device
109 struct radeon_pll *p1pll = &rdev->clock.p1pll;
110 struct radeon_pll *p2pll = &rdev->clock.p2pll;
111 struct radeon_pll *spll = &rdev->clock.spll;
112 struct radeon_pll *mpll = &rdev->clock.mpll;
148 rdev->clock.max_pixel_clock = 35000;
157 rdev->clock.default_sclk = (*val) / 10;
159 rdev->clock
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/linux-master/drivers/isdn/mISDN/
H A DMakefile12 mISDN_core-objs := core.o fsm.o socket.o clock.o hwchannel.o stack.o layer1.o layer2.o tei.o timerdev.o
/linux-master/include/dt-bindings/clock/
H A Dr8a774c0-cpg-mssr.h8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
H A Dr8a7795-cpg-mssr.h8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
H A Dr8a7796-cpg-mssr.h8 #include <dt-bindings/clock/renesas-cpg-mssr.h>

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