Searched refs:chan (Results 176 - 200 of 1789) sorted by relevance

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/linux-master/drivers/soc/aspeed/
H A Daspeed-lpc-snoop.c70 struct aspeed_lpc_snoop_channel chan[NUM_SNOOP_CHANNELS]; member in struct:aspeed_lpc_snoop
83 struct aspeed_lpc_snoop_channel *chan = snoop_file_to_chan(file); local
87 if (kfifo_is_empty(&chan->fifo)) {
90 ret = wait_event_interruptible(chan->wq,
91 !kfifo_is_empty(&chan->fifo));
95 ret = kfifo_to_user(&chan->fifo, buffer, count, &copied);
105 struct aspeed_lpc_snoop_channel *chan = snoop_file_to_chan(file); local
107 poll_wait(file, &chan->wq, pt);
108 return !kfifo_is_empty(&chan->fifo) ? EPOLLIN : 0;
119 static void put_fifo_with_discard(struct aspeed_lpc_snoop_channel *chan, u argument
[all...]
/linux-master/drivers/dma/
H A Dat_hdmac.c345 * @chan: channels table to store at_dma_chan structures
358 struct at_dma_chan chan[]; member in struct:at_dma
371 static inline struct at_dma_chan *to_at_dma_chan(struct dma_chan *chan) argument
373 return container_of(chan, struct at_dma_chan, vc.chan);
384 static struct device *chan2dev(struct dma_chan *chan) argument
386 return &chan->dev->device;
392 struct at_dma *atdma = to_at_dma(atchan->vc.chan.device);
394 dev_err(chan2dev(&atchan->vc.chan),
396 atchan->vc.chan
746 atc_get_residue(struct dma_chan *chan, dma_cookie_t cookie, u32 *residue) argument
867 atc_prep_dma_interleaved(struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags) argument
971 atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
1050 atdma_create_memset_lli(struct dma_chan *chan, struct atdma_sg *atdma_sg, dma_addr_t psrc, dma_addr_t pdst, size_t len) argument
1094 atc_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value, size_t len, unsigned long flags) argument
1162 atc_prep_dma_memset_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, int value, unsigned long flags) argument
1249 atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
1426 atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, unsigned int i, dma_addr_t buf_addr, unsigned int reg_width, size_t period_len, enum dma_transfer_direction direction) argument
1493 atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
1559 atc_config(struct dma_chan *chan, struct dma_slave_config *sconfig) argument
1578 atc_pause(struct dma_chan *chan) argument
1597 atc_resume(struct dma_chan *chan) argument
1619 atc_terminate_all(struct dma_chan *chan) argument
1674 atc_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
1706 atc_issue_pending(struct dma_chan *chan) argument
1725 atc_alloc_chan_resources(struct dma_chan *chan) argument
1765 atc_free_chan_resources(struct dma_chan *chan) argument
1784 at_dma_filter(struct dma_chan *chan, void *slave) argument
1799 struct dma_chan *chan; local
2116 struct dma_chan *chan, *_chan; local
2148 struct dma_chan *chan, *_chan; local
2162 struct dma_chan *chan = &atchan->vc.chan; local
2182 struct dma_chan *chan, *_chan; local
2223 struct dma_chan *chan, *_chan; local
[all...]
H A Dfsl-edma-common.h253 #define edma_read_tcdreg_c(chan, _tcd, __name) \
255 edma_readq(chan->edma, &(_tcd)->__name) : \
257 edma_readl(chan->edma, &(_tcd)->__name) : \
258 edma_readw(chan->edma, &(_tcd)->__name) \
261 #define edma_read_tcdreg(chan, __name) \
262 ((fsl_edma_drvflags(chan) & FSL_EDMA_DRV_TCD64) ? \
263 edma_read_tcdreg_c(chan, ((struct fsl_edma_hw_tcd64 __iomem *)chan->tcd), __name) : \
264 edma_read_tcdreg_c(chan, ((struct fsl_edma_hw_tcd __iomem *)chan
434 to_fsl_edma_chan(struct dma_chan *chan) argument
[all...]
H A Dat_xdmac.c218 struct dma_chan chan; member in struct:at_xdmac_chan
252 struct at_xdmac_chan chan[]; member in struct:at_xdmac
324 return container_of(dchan, struct at_xdmac_chan, chan);
327 static struct device *chan2dev(struct dma_chan *chan) argument
329 return &chan->dev->device;
375 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
389 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
407 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
424 struct dma_chan *chan, *_chan; local
442 list_for_each_entry_safe(chan, _cha
564 at_xdmac_alloc_desc(struct dma_chan *chan, gfp_t gfp_flags) argument
608 at_xdmac_queue_desc(struct dma_chan *chan, struct at_xdmac_desc *prev, struct at_xdmac_desc *desc) argument
622 at_xdmac_increment_block_count(struct dma_chan *chan, struct at_xdmac_desc *desc) argument
640 struct dma_chan *chan; local
664 at_xdmac_compute_chan_conf(struct dma_chan *chan, enum dma_transfer_direction direction) argument
746 at_xdmac_set_slave_config(struct dma_chan *chan, struct dma_slave_config *sconfig) argument
762 at_xdmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
864 at_xdmac_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
948 at_xdmac_align_width(struct dma_chan *chan, dma_addr_t addr) argument
978 at_xdmac_interleaved_queue_desc(struct dma_chan *chan, struct at_xdmac_chan *atchan, struct at_xdmac_desc *prev, dma_addr_t src, dma_addr_t dst, struct dma_interleaved_template *xt, struct data_chunk *chunk) argument
1072 at_xdmac_prep_interleaved(struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags) argument
1169 at_xdmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
1275 at_xdmac_memset_create_desc(struct dma_chan *chan, struct at_xdmac_chan *atchan, dma_addr_t dst_addr, size_t len, int value) argument
1353 at_xdmac_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value, size_t len, unsigned long flags) argument
1376 at_xdmac_prep_dma_memset_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, int value, unsigned long flags) argument
1538 at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
1881 at_xdmac_issue_pending(struct dma_chan *chan) argument
1895 at_xdmac_device_config(struct dma_chan *chan, struct dma_slave_config *config) argument
1931 at_xdmac_device_pause(struct dma_chan *chan) argument
1972 at_xdmac_device_resume(struct dma_chan *chan) argument
2005 at_xdmac_device_terminate_all(struct dma_chan *chan) argument
2050 at_xdmac_alloc_chan_resources(struct dma_chan *chan) argument
2090 at_xdmac_free_chan_resources(struct dma_chan *chan) argument
2132 struct dma_chan *chan, *_chan; local
2147 struct dma_chan *chan, *_chan; local
2185 struct dma_chan *chan, *_chan; local
[all...]
H A Dmv_xor.c37 static void mv_xor_issue_pending(struct dma_chan *chan);
39 #define to_mv_xor_chan(chan) \
40 container_of(chan, struct mv_xor_chan, dmachan)
45 #define mv_chan_to_devp(chan) \
46 ((chan)->dmadev.dev)
98 static u32 mv_chan_get_current_desc(struct mv_xor_chan *chan) argument
100 return readl_relaxed(XOR_CURR_DESC(chan));
103 static void mv_chan_set_next_descriptor(struct mv_xor_chan *chan, argument
106 writel_relaxed(next_desc_addr, XOR_NEXT_DESC(chan));
109 static void mv_chan_unmask_interrupts(struct mv_xor_chan *chan) argument
116 mv_chan_get_intr_cause(struct mv_xor_chan *chan) argument
123 mv_chan_clear_eoc_cause(struct mv_xor_chan *chan) argument
133 mv_chan_clear_err_status(struct mv_xor_chan *chan) argument
139 mv_chan_set_mode(struct mv_xor_chan *chan, u32 op_mode) argument
156 mv_chan_activate(struct mv_xor_chan *chan) argument
164 mv_chan_is_busy(struct mv_xor_chan *chan) argument
341 struct mv_xor_chan *chan = from_tasklet(chan, t, irq_tasklet); local
434 mv_xor_alloc_chan_resources(struct dma_chan *chan) argument
555 mv_xor_prep_dma_xor(struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, unsigned int src_cnt, size_t len, unsigned long flags) argument
599 mv_xor_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
610 mv_xor_prep_dma_interrupt(struct dma_chan *chan, unsigned long flags) argument
627 mv_xor_free_chan_resources(struct dma_chan *chan) argument
674 mv_xor_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
692 mv_chan_dump_regs(struct mv_xor_chan *chan) argument
715 mv_chan_err_interrupt_handler(struct mv_xor_chan *chan, u32 intr_cause) argument
732 struct mv_xor_chan *chan = data; local
747 mv_xor_issue_pending(struct dma_chan *chan) argument
1011 struct dma_chan *chan, *_chan; local
1376 struct mv_xor_chan *chan; local
1408 struct mv_xor_chan *chan; local
[all...]
/linux-master/arch/sh/drivers/pci/
H A Dops-sh7786.c22 struct pci_channel *chan = bus->sysdata; local
51 *data = pci_read_reg(chan, PCI_REG(reg));
53 pci_write_reg(chan, *data, PCI_REG(reg));
61 pci_write_reg(chan, pci_read_reg(chan, SH4A_PCIEERRFR), SH4A_PCIEERRFR);
64 pci_write_reg(chan, (bus->number << 24) | (dev << 19) |
68 pci_write_reg(chan, (1 << 31) | (type << 8), SH4A_PCIEPCTLR);
71 if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10)
75 if (pci_read_reg(chan, SH4A_PCIEPCICONF1) & ((1 << 29) | (1 << 28)))
79 *data = pci_read_reg(chan, SH4A_PCIEPD
[all...]
/linux-master/sound/soc/cirrus/
H A Dep93xx-pcm.c38 static bool ep93xx_pcm_dma_filter(struct dma_chan *chan, void *filter_param) argument
42 if (data->direction == ep93xx_dma_chan_direction(chan)) {
43 chan->private = data;
/linux-master/drivers/gpu/drm/nouveau/
H A Dnv17_fence.c37 struct nouveau_channel *prev, struct nouveau_channel *chan)
40 struct nv10_fence_priv *priv = chan->drm->fence;
41 struct nv10_fence_chan *fctx = chan->fence;
42 struct nvif_push *ppush = prev->chan.push;
43 struct nvif_push *npush = chan->chan.push;
77 nv17_fence_context_new(struct nouveau_channel *chan) argument
79 struct nv10_fence_priv *priv = chan->drm->fence;
86 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
90 nouveau_fence_context_new(chan,
36 nv17_fence_sync(struct nouveau_fence *fence, struct nouveau_channel *prev, struct nouveau_channel *chan) argument
[all...]
H A Dnv50_fence.c36 nv50_fence_context_new(struct nouveau_channel *chan) argument
38 struct nv10_fence_priv *priv = chan->drm->fence;
45 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
49 nouveau_fence_context_new(chan, &fctx->base);
54 ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema,
64 nv10_fence_context_del(chan);
H A Dnouveau_bo9039.c38 nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, argument
41 struct nvif_push *push = chan->chan.push;
87 nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle) argument
89 struct nvif_push *push = chan->chan.push;
H A Dnouveau_boa0b5.c38 nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, argument
42 struct nvif_push *push = chan->chan.push;
79 nve0_bo_move_init(struct nouveau_channel *chan, u32 handle) argument
81 struct nvif_push *push = chan->chan.push;
H A Dnouveau_exec.c96 ret = nouveau_fence_create(&exec_job->fence, exec_job->chan);
130 struct nouveau_channel *chan = exec_job->chan; local
134 ret = nouveau_dma_wait(chan, exec_job->push.count + 1, 16);
144 nv50_dma_push(chan, p->va, p->va_len, no_prefetch);
151 WIND_RING(chan);
180 struct nouveau_channel *chan = exec_job->chan; local
182 if (unlikely(!atomic_read(&chan->killed)))
183 nouveau_channel_kill(chan);
353 struct nouveau_channel *chan = NULL; local
[all...]
/linux-master/sound/soc/fsl/
H A Dimx-pcm-dma.c22 static bool filter(struct dma_chan *chan, void *param) argument
24 if (!imx_dma_is_general_purpose(chan))
27 chan->private = param;
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgp102.c25 #include "chan.h"
34 gp102_disp_dmac_init(struct nvkm_disp_chan *chan) argument
36 struct nvkm_subdev *subdev = &chan->disp->engine.subdev;
38 int ctrl = chan->chid.ctrl;
39 int user = chan->chid.user;
42 nvkm_wr32(device, 0x611494 + (ctrl * 0x0010), chan->push);
46 nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), chan->suspend_put);
103 gp102_disp_core_init(struct nvkm_disp_chan *chan) argument
105 struct nvkm_subdev *subdev = &chan->disp->engine.subdev;
109 nvkm_wr32(device, 0x611494, chan
[all...]
/linux-master/drivers/mailbox/
H A Dmtk-adsp-mailbox.c38 struct mbox_chan *chan = data; local
39 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
49 struct mbox_chan *chan = data; local
51 mbox_chan_received_data(chan, NULL);
62 static int mtk_adsp_mbox_startup(struct mbox_chan *chan) argument
64 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
73 static void mtk_adsp_mbox_shutdown(struct mbox_chan *chan) argument
75 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox);
82 static int mtk_adsp_mbox_send_data(struct mbox_chan *chan, void *data) argument
84 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan
92 mtk_adsp_mbox_last_tx_done(struct mbox_chan *chan) argument
[all...]
/linux-master/drivers/iio/adc/
H A Dti_am335x_adc.c32 struct dma_chan *chan; member in struct:tiadc_dma
75 struct iio_chan_spec const *chan)
80 if (chan->channel == adc_dev->channel_line[i]) {
92 static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan) argument
94 return 1 << adc_dev->channel_step[chan];
122 int chan; local
124 chan = adc_dev->channel_line[i];
136 stepconfig | STEPCONFIG_INP(chan) |
253 dmaengine_slave_config(dma->chan, &dma->conf);
255 desc = dmaengine_prep_dma_cyclic(dma->chan, dm
74 get_adc_chan_step_mask(struct tiadc_device *adc_dev, struct iio_chan_spec const *chan) argument
402 struct iio_chan_spec *chan; local
430 tiadc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) argument
594 int chan; local
[all...]
/linux-master/drivers/usb/dwc2/
H A Dhcd_ddma.c203 struct dwc2_host_chan *chan; local
222 chan = qh->channel;
232 hsotg->frame_list[j] |= 1 << chan->hc_num;
234 hsotg->frame_list[j] &= ~(1 << chan->hc_num);
250 chan->schinfo = 0;
251 if (chan->speed == USB_SPEED_HIGH && qh->host_interval) {
256 chan->schinfo |= j;
260 chan->schinfo = 0xff;
267 struct dwc2_host_chan *chan = qh->channel; local
283 if (chan
659 dwc2_fill_host_dma_desc(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, struct dwc2_qh *qh, int n_desc) argument
715 struct dwc2_host_chan *chan = qh->channel; local
820 struct dwc2_host_chan *chan = qh->channel; local
862 dwc2_cmpl_host_isoc_dma_desc(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, struct dwc2_qh *qh, u16 idx) argument
938 dwc2_complete_isoc_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, enum dwc2_halt_status halt_status) argument
1044 dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, struct dwc2_dma_desc *dma_desc, enum dwc2_halt_status halt_status, u32 n_bytes, int *xfer_done) argument
1126 dwc2_process_non_isoc_desc(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, int desc_num, enum dwc2_halt_status halt_status, int *xfer_done) argument
1198 dwc2_complete_non_isoc_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, enum dwc2_halt_status halt_status) argument
1276 dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, enum dwc2_halt_status halt_status) argument
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv10.c26 #include "chan.h"
37 nv10_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) argument
39 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc;
40 const u32 base = chan->id * 32;
42 chan->ramfc_offset = base;
47 nvkm_wo32(ramfc, base + 0x0c, chan->push->addr >> 4);
105 .chan = {{ 0, 0, NV10_CHANNEL_DMA }, &nv10_chan },
H A Dr535.c24 #include "chan.h"
49 r535_chan_doorbell_handle(struct nvkm_chan *chan) argument
51 return (chan->cgrp->runl->id << 16) | chan->id;
55 r535_chan_stop(struct nvkm_chan *chan) argument
60 r535_chan_start(struct nvkm_chan *chan) argument
65 r535_chan_ramfc_clear(struct nvkm_chan *chan) argument
67 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
69 nvkm_gsp_rm_free(&chan->rm.object);
72 chan
80 r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) argument
228 r535_chan_id_put(struct nvkm_chan *chan) argument
256 r535_chan_id_get_locked(struct nvkm_chan *chan, struct nvkm_memory *muserd, u64 ouserd) argument
320 r535_chan_id_get(struct nvkm_chan *chan, struct nvkm_memory *muserd, u64 ouserd) argument
364 r535_gr_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
385 r535_flcn_bind(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
407 r535_flcn_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan) argument
[all...]
/linux-master/drivers/comedi/drivers/
H A Dfl512.c54 unsigned int chan = CR_CHAN(insn->chanspec); local
58 outb(chan, dev->iobase + FL512_AI_MUX_REG);
81 unsigned int chan = CR_CHAN(insn->chanspec); local
82 unsigned int val = s->readback[chan];
89 outb(val & 0x0ff, dev->iobase + FL512_AO_DATA_REG(chan));
90 outb((val >> 8) & 0xf, dev->iobase + FL512_AO_DATA_REG(chan));
91 inb(dev->iobase + FL512_AO_TRIG_REG(chan));
93 s->readback[chan] = val;
/linux-master/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Deeprom.h21 struct ieee80211_channel *chan,
24 struct ieee80211_channel *chan, s8 *tp);
/linux-master/sound/synth/emux/
H A Demux_nrpn.c40 struct snd_midi_channel *chan,
47 snd_emux_send_effect(port, chan, table[i].effect,
273 snd_emux_nrpn(void *p, struct snd_midi_channel *chan, argument
279 if (snd_BUG_ON(!port || !chan))
282 if (chan->control[MIDI_CTL_NONREG_PARM_NUM_MSB] == 127 &&
283 chan->control[MIDI_CTL_NONREG_PARM_NUM_LSB] <= 26) {
287 val = (chan->control[MIDI_CTL_MSB_DATA_ENTRY] << 7) |
288 chan->control[MIDI_CTL_LSB_DATA_ENTRY];
292 port, chan, chan
37 send_converted_effect(const struct nrpn_conv_table *table, int num_tables, struct snd_emux_port *port, struct snd_midi_channel *chan, int type, int val, int mode) argument
349 snd_emux_xg_control(struct snd_emux_port *port, struct snd_midi_channel *chan, int param) argument
[all...]
H A Demux_effect.c86 effect_set_byte(unsigned char *valp, struct snd_midi_channel *chan, int type) argument
89 struct snd_emux_effect_table *fx = chan->private;
107 effect_set_word(unsigned short *valp, struct snd_midi_channel *chan, int type) argument
110 struct snd_emux_effect_table *fx = chan->private;
124 effect_get_offset(struct snd_midi_channel *chan, int lo, int hi, int mode) argument
127 struct snd_emux_effect_table *fx = chan->private;
143 struct snd_midi_channel *chan, int type, int val)
155 snd_emux_send_effect(port, chan, type, val, mode);
163 snd_emux_send_effect(struct snd_emux_port *port, struct snd_midi_channel *chan, argument
174 fx = chan
142 snd_emux_send_effect_oss(struct snd_emux_port *port, struct snd_midi_channel *chan, int type, int val) argument
224 struct snd_midi_channel *chan = vp->chan; local
[all...]
/linux-master/include/acpi/
H A Dpcc.h38 extern void pcc_mbox_free_channel(struct pcc_mbox_chan *chan);
45 static inline void pcc_mbox_free_channel(struct pcc_mbox_chan *chan) { } argument
/linux-master/drivers/pwm/
H A Dpwm-samsung.c33 #define REG_TCNTB(chan) (0x0c + ((chan) * 0xc))
34 #define REG_TCMPB(chan) (0x10 + ((chan) * 0xc))
40 #define TCFG1_SHIFT(chan) (4 * (chan))
50 #define TCON_START(chan) BIT(4 * (chan) + 0)
51 #define TCON_MANUALUPDATE(chan) BIT(4 * (chan)
154 pwm_samsung_is_tdiv(struct samsung_pwm_chip *our_chip, unsigned int chan) argument
166 pwm_samsung_get_tin_rate(struct samsung_pwm_chip *our_chip, unsigned int chan) argument
182 pwm_samsung_calc_tin(struct pwm_chip *chip, unsigned int chan, unsigned long freq) argument
200 "tclk of PWM %d is inoperational, using tdiv\\n", chan); local
312 struct samsung_pwm_channel *chan = &our_chip->channel[pwm->hwpwm]; local
547 unsigned int chan; local
610 struct samsung_pwm_channel *chan = &our_chip->channel[i]; local
[all...]

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1234567891011>>