usb/dwc2/hcd_ddma.c

203 	struct dwc2_host_chan *chan;
222 	chan = qh->channel;
232 			hsotg->frame_list[j] |= 1 << chan->hc_num;
234 			hsotg->frame_list[j] &= ~(1 << chan->hc_num);
250 	chan->schinfo = 0;
251 	if (chan->speed == USB_SPEED_HIGH && qh->host_interval) {
256 			chan->schinfo |= j;
260 		chan->schinfo = 0xff;
267 	struct dwc2_host_chan *chan = qh->channel;
283 	if (chan->qh) {
284 		if (!list_empty(&chan->hc_list_entry))
285 			list_del(&chan->hc_list_entry);
286 		dwc2_hc_cleanup(hsotg, chan);
287 		list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list);
288 		chan->qh = NULL;
660 				    struct dwc2_host_chan *chan,
665 	int len = chan->xfer_len;
667 	if (len > HOST_DMA_NBYTES_LIMIT - (chan->max_packet - 1))
668 		len = HOST_DMA_NBYTES_LIMIT - (chan->max_packet - 1);
670 	if (chan->ep_is_in) {
673 		if (len > 0 && chan->max_packet)
674 			num_packets = (len + chan->max_packet - 1)
675 					/ chan->max_packet;
681 		len = num_packets * chan->max_packet;
691 	dma_desc->buf = (u32)chan->xfer_dma;
703 	if (len > chan->xfer_len) {
704 		chan->xfer_len = 0;
706 		chan->xfer_dma += len;
707 		chan->xfer_len -= len;
715 	struct dwc2_host_chan *chan = qh->channel;
719 		 (unsigned long)chan->xfer_dma, chan->xfer_len);
722 	 * Start with chan->xfer_dma initialized in assign_and_init_hc(), then
733 			chan->xfer_dma = qtd->urb->dma +
735 			chan->xfer_len = qtd->urb->length -
738 				 (unsigned long)chan->xfer_dma, chan->xfer_len);
756 			dwc2_fill_host_dma_desc(hsotg, chan, qtd, qh, n_desc);
764 		} while (chan->xfer_len > 0 &&
794 		chan->ntd = n_desc;
820 	struct dwc2_host_chan *chan = qh->channel;
823 	switch (chan->ep_type) {
827 		dwc2_hc_start_transfer_ddma(hsotg, chan);
832 		dwc2_hc_start_transfer_ddma(hsotg, chan);
839 		if (!chan->xfer_started) {
847 			chan->ntd = dwc2_max_desc_num(qh);
850 			dwc2_hc_start_transfer_ddma(hsotg, chan);
863 					struct dwc2_host_chan *chan,
891 	if (chan->ep_is_in)
924 		if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE)
939 					 struct dwc2_host_chan *chan,
948 	qh = chan->qh;
951 	if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) {
1009 			rc = dwc2_cmpl_host_isoc_dma_desc(hsotg, chan, qtd, qh,
1014 						    chan->speed);
1045 					       struct dwc2_host_chan *chan,
1054 	if (chan->ep_is_in)
1092 			 chan->hc_num);
1096 	if (chan->ep_type == USB_ENDPOINT_XFER_CONTROL) {
1127 				      struct dwc2_host_chan *chan,
1133 	struct dwc2_qh *qh = chan->qh;
1155 	failed = dwc2_update_non_isoc_urb_state_ddma(hsotg, chan, qtd, dma_desc,
1186 				dwc2_hcd_save_data_toggle(hsotg, chan, chnum,
1199 					     struct dwc2_host_chan *chan,
1204 	struct dwc2_qh *qh = chan->qh;
1209 	if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) {
1224 			if (dwc2_process_non_isoc_desc(hsotg, chan, chnum, qtd,
1244 			dwc2_hcd_save_data_toggle(hsotg, chan, chnum, NULL);
1248 		if (chan->hcint & HCINTMSK_NYET) {
1265  * @chan:        Host channel the transfer is completed on
1277 				 struct dwc2_host_chan *chan, int chnum,
1280 	struct dwc2_qh *qh = chan->qh;
1284 	if (chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1285 		dwc2_complete_isoc_xfer_ddma(hsotg, chan, halt_status);
1307 				dwc2_hc_halt(hsotg, chan, halt_status);
1318 			if (!chan->halt_status)
1330 		dwc2_complete_non_isoc_xfer_ddma(hsotg, chan, chnum,