Searched refs:channel (Results 176 - 200 of 1969) sorted by last modified time

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/linux-master/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_flows.c384 req->channel = pf->hw.rx_chan_base;
994 req->channel = pfvf->hw.rx_chan_base;
1419 req->channel = pfvf->hw.rx_chan_base;
/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc_fs.c698 /* check that none of the fields overwrite channel */
1160 req->chan_mask = 0x0; /* Do not care channel */
1162 npc_update_entry(rvu, NPC_CHAN, entry, req->channel, 0, req->chan_mask,
H A Dmbox.h902 u8 tx_link; /* Transmit channel link number */
1210 u16 chan_base; /* Starting channel number */
1214 /* bpid_per_chan = 1 assigns separate bp id for each channel */
1222 u8 chan_cnt; /* Number of channel for which bpids are assigned */
1269 /* channel is required for egress multicast */
1270 u16 channel[NIX_MCE_ENTRY_MAX]; member in struct:nix_mcast_grp_update_req
1573 u16 channel; member in struct:npc_install_flow_req
2039 u16 chan_base; /* MCS channel base */
/linux-master/drivers/net/ethernet/ibm/emac/
H A Dmal.h263 int mal_set_rcbs(struct mal_instance *mal, int channel, unsigned long size);
265 /* Returns BD ring offset for a particular channel
268 int mal_tx_bd_offset(struct mal_instance *mal, int channel);
269 int mal_rx_bd_offset(struct mal_instance *mal, int channel);
271 void mal_enable_tx_channel(struct mal_instance *mal, int channel);
272 void mal_disable_tx_channel(struct mal_instance *mal, int channel);
273 void mal_enable_rx_channel(struct mal_instance *mal, int channel);
274 void mal_disable_rx_channel(struct mal_instance *mal, int channel);
H A Dmal.c43 /* Don't let multiple commacs claim the same channel(s) */
82 int mal_set_rcbs(struct mal_instance *mal, int channel, unsigned long size) argument
84 BUG_ON(channel < 0 || channel >= mal->num_rx_chans ||
87 MAL_DBG(mal, "set_rbcs(%d, %lu)" NL, channel, size);
91 "mal%d: incorrect RX size %lu for the channel %d\n",
92 mal->index, size, channel);
96 set_mal_dcrn(mal, MAL_RCBS(channel), size >> 4);
100 int mal_tx_bd_offset(struct mal_instance *mal, int channel) argument
102 BUG_ON(channel <
107 mal_rx_bd_offset(struct mal_instance *mal, int channel) argument
113 mal_enable_tx_channel(struct mal_instance *mal, int channel) argument
127 mal_disable_tx_channel(struct mal_instance *mal, int channel) argument
134 mal_enable_rx_channel(struct mal_instance *mal, int channel) argument
156 mal_disable_rx_channel(struct mal_instance *mal, int channel) argument
[all...]
/linux-master/drivers/net/ethernet/freescale/dpaa2/
H A Ddpaa2-eth.c1800 struct dpaa2_eth_channel *channel; local
1804 channel = priv->channel[i];
1806 err = dpaa2_eth_seed_pool(priv, channel);
1814 channel->bp->dev->obj_desc.id,
1815 channel->bp->bpid);
1833 if (priv->channel[i]->bp->bpid == bpid)
1834 xsk_zc = priv->channel[i]->xsk_zc;
1862 if (priv->channel[i]->bp->bpid == bpid)
1863 priv->channel[
3113 struct dpaa2_eth_channel *channel; local
3148 dpaa2_eth_free_channel(struct dpaa2_eth_priv *priv, struct dpaa2_eth_channel *channel) argument
3161 struct dpaa2_eth_channel *channel; local
[all...]
/linux-master/drivers/net/ethernet/freescale/dpaa/
H A Ddpaa_eth.c794 static void dpaa_eth_add_channel(u16 channel, struct device *dev) argument
796 u32 pool = QM_SDQCR_CHANNELS_POOL_CONV(channel);
874 pr_debug("Created CGR %d for netdev with hwaddr %pM on QMan channel %d\n",
915 fq->channel = priv->channel;
928 fq->channel = (u16)fman_port_get_qman_channel_id(port);
963 fq->channel = channels[portal_cnt++ % num_portals];
1055 qm_fqd_set_destwq(&initfq.fqd, dpaa_fq->channel, dpaa_fq->wq);
3288 int err = 0, channel; local
3405 channel
[all...]
/linux-master/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_main.c905 * Return the channel of the ingress queue with the given qid.
1751 /* Low 2 bits encode the Tx channel number */
2115 * cxgb4_port_chan - get the HW channel of a port
2118 * Return the HW Tx channel of the given port.
2127 * cxgb4_port_e2cchan - get the HW c-channel of a port
2130 * Return the HW RX c-channel of the given port.
2321 /* T4/T6 only has a single memory channel */
3557 p.u.params.channel = pi->tx_chan;
5748 /* For offload we use 1 queue/channel if all ports are up to 1G,
/linux-master/drivers/net/ethernet/broadcom/
H A Dtg3.c5481 /* Deselect the channel register so we can read the PHYID
6470 netdev_err(tp->dev, "PCI channel ERROR!\n");
12786 struct ethtool_channels *channel)
12791 channel->max_rx = tp->rxq_max;
12792 channel->max_tx = tp->txq_max;
12795 channel->rx_count = tp->rxq_cnt;
12796 channel->tx_count = tp->txq_cnt;
12799 channel->rx_count = tp->rxq_req;
12801 channel->rx_count = min(deflt_qs, tp->rxq_max);
12804 channel
12785 tg3_get_channels(struct net_device *dev, struct ethtool_channels *channel) argument
12810 tg3_set_channels(struct net_device *dev, struct ethtool_channels *channel) argument
[all...]
/linux-master/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_ethtool.c871 struct ethtool_channels *channel)
892 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
904 channel->max_rx = max_rx_rings;
905 channel->max_tx = max_tx_rings;
906 channel->max_other = 0;
908 channel->combined_count = bp->rx_nr_rings;
910 channel->combined_count--;
913 channel->rx_count = bp->rx_nr_rings;
914 channel->tx_count = bp->tx_nr_rings_per_tc;
920 struct ethtool_channels *channel)
870 bnxt_get_channels(struct net_device *dev, struct ethtool_channels *channel) argument
919 bnxt_set_channels(struct net_device *dev, struct ethtool_channels *channel) argument
[all...]
/linux-master/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-drv.c176 for (i = 0; i < ARRAY_SIZE(pdata->channel); i++) {
177 if (!pdata->channel[i])
180 kfree(pdata->channel[i]->rx_ring);
181 kfree(pdata->channel[i]->tx_ring);
182 kfree(pdata->channel[i]);
184 pdata->channel[i] = NULL;
192 struct xgbe_channel *channel; local
206 channel = xgbe_alloc_node(sizeof(*channel), node);
207 if (!channel)
273 xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel, struct xgbe_ring *ring, unsigned int count) argument
309 xgbe_enable_rx_tx_int(struct xgbe_prv_data *pdata, struct xgbe_channel *channel) argument
335 xgbe_disable_rx_tx_int(struct xgbe_prv_data *pdata, struct xgbe_channel *channel) argument
480 struct xgbe_channel *channel; local
617 struct xgbe_channel *channel = data; local
646 struct xgbe_channel *channel = from_timer(channel, t, tx_timer); local
685 struct xgbe_channel *channel; local
707 struct xgbe_channel *channel; local
728 struct xgbe_channel *channel; local
961 struct xgbe_channel *channel; local
984 struct xgbe_channel *channel; local
1005 struct xgbe_channel *channel; local
1076 struct xgbe_channel *channel; local
1379 struct xgbe_channel *channel; local
1943 struct xgbe_channel *channel; local
2155 struct xgbe_channel *channel; local
2319 xgbe_rx_refresh(struct xgbe_channel *channel) argument
2415 xgbe_tx_poll(struct xgbe_channel *channel) argument
2486 xgbe_rx_poll(struct xgbe_channel *channel, int budget) argument
2688 struct xgbe_channel *channel = container_of(napi, struct xgbe_channel, local
2719 struct xgbe_channel *channel; local
[all...]
/linux-master/drivers/message/fusion/
H A Dmptspi.c245 * @channel: channel number
254 mptspi_writeIOCPage4(MPT_SCSI_HOST *hd, u8 channel , u8 id)
294 IOCPage4Ptr->SEP[ii].SEPBus = channel;
296 pReq->PageAddress = cpu_to_le32(id | (channel << 8 ));
307 ioc->name, IOCPage4Ptr->MaxSEP, IOCPage4Ptr->ActiveSEP, id, channel));
347 mptspi_writeIOCPage4(hd, vtarget->channel, vtarget->id);
358 mptspi_writeIOCPage4(hd, vtarget->channel, vtarget->id);
415 vtarget->channel = (u8)starget->channel;
618 mptscsih_quiesce_raid(MPT_SCSI_HOST *hd, int quiesce, u8 channel, u8 id) argument
[all...]
H A Dmptscsih.c97 int mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id,
412 SEPMsg->Bus = vtarget->channel;
417 "Sending SEP cmd=%x channel=%d id=%d\n",
695 sc->device->host->host_no, sc->device->channel,
810 "RESIDUAL_MISMATCH: result=%x on channel=%d id=%d\n",
811 ioc->name, sc->result, sc->device->channel, sc->device->id));
1036 int channel, id; local
1045 channel = mf->Bus;
1056 "idx=%x\n", ioc->name, channel, id, sc, mf, ii));
1102 if ((mf->Bus != vdevice->vtarget->channel) ||
1513 mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, u64 lun, int ctx2abort, ulong timeout) argument
2175 mptscsih_is_phys_disk(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
2253 mptscsih_raid_id_to_num(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
[all...]
H A Dmptsas.c73 * Reserved channel for integrated raid
574 * @channel: channel number
583 mptsas_add_device_component(MPT_ADAPTER *ioc, u8 channel, u8 id, argument
599 (sas_info->fw.channel == channel &&
614 sas_info->fw.channel = channel;
631 sas_info->os.channel = starget->channel;
648 mptsas_add_device_component_by_fw(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
816 mptsas_del_device_component_by_os(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
993 mptsas_find_vtarget(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
1066 mptsas_target_reset(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
1142 u8 id, channel; local
1189 u8 id, channel; local
1225 u8 id, channel; local
1748 u8 id, channel; local
3760 u8 channel, id; local
4053 int channel = -1; local
4166 mptsas_find_phyinfo_by_phys_disk_num(MPT_ADAPTER *ioc, u8 phys_disk_num, u8 channel, u8 id) argument
4248 mptsas_adding_inactive_raid_components(MPT_ADAPTER *ioc, u8 channel, u8 id) argument
4787 mptsas_issue_tm(MPT_ADAPTER *ioc, u8 type, u8 channel, u8 id, u64 lun, int task_context, ulong timeout, u8 *issue_reset) argument
4871 u8 channel, id; local
5045 u8 id, channel; local
[all...]
H A Dmptfc.c267 int channel = SCpnt->device->channel; local
275 if (!vtarget || vtarget->channel != channel)
321 void(*func)(MPT_ADAPTER *ioc,int channel, FCDevicePage0_t *arg))
459 mptfc_register_dev(MPT_ADAPTER *ioc, int channel, FCDevicePage0_t *pg0) argument
498 rport = fc_remote_port_add(ioc->sh, channel, &rport_ids);
512 vtarget->channel = pg0->CurrentBus;
585 vtarget->channel = ri->pg0.CurrentBus;
320 mptfc_GetFcDevPage0(MPT_ADAPTER *ioc, int ioc_port, void(*func)(MPT_ADAPTER *ioc,int channel, FCDevicePage0_t *arg)) argument
/linux-master/drivers/iio/frequency/
H A Dadmv1013.c199 switch (chan->channel) {
214 if (!chan->channel)
245 if (!chan->channel) {
418 .channel = _channel, \
427 .channel = _channel, \
/linux-master/drivers/iio/addac/
H A Dad74115.c644 enum ad74115_adc_ch channel, bool status)
646 unsigned int mask = ad74115_adc_ch_en_bit_tbl[channel];
685 * register to select the ADC result of the next enabled channel, and
686 * reads the ADC result of the previous enabled channel.
775 enum ad74115_adc_ch channel, int *val)
784 if (channel == AD74115_ADC_CH_CONV1)
795 enum ad74115_adc_ch channel, int *val)
802 ret = ad74115_set_adc_ch_en(st, channel, true);
819 ret = ad74115_get_adc_rate(st, channel, &rate);
846 ret = regmap_read(st->regmap, ad74115_adc_ch_data_regs_tbl[channel],
643 ad74115_set_adc_ch_en(struct ad74115_state *st, enum ad74115_adc_ch channel, bool status) argument
774 ad74115_get_adc_rate(struct ad74115_state *st, enum ad74115_adc_ch channel, int *val) argument
794 _ad74115_get_adc_code(struct ad74115_state *st, enum ad74115_adc_ch channel, int *val) argument
863 ad74115_get_adc_code(struct iio_dev *indio_dev, enum ad74115_adc_ch channel, int *val) argument
893 ad74115_set_dac_code(struct ad74115_state *st, enum ad74115_dac_ch channel, int val) argument
914 ad74115_get_dac_code(struct ad74115_state *st, enum ad74115_dac_ch channel, int *val) argument
932 ad74115_set_adc_rate(struct ad74115_state *st, enum ad74115_adc_ch channel, int val) argument
1050 ad74115_get_adc_range(struct ad74115_state *st, enum ad74115_adc_ch channel, unsigned int *val) argument
[all...]
/linux-master/drivers/hwmon/
H A Dtmp108.c92 u32 attr, int channel, long *temp)
191 u32 attr, int channel, long temp)
252 u32 attr, int channel)
91 tmp108_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *temp) argument
190 tmp108_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long temp) argument
251 tmp108_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dtmp102.c73 u32 attr, int channel, long *temp)
107 u32 attr, int channel, long temp)
128 u32 attr, int channel)
72 tmp102_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *temp) argument
106 tmp102_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long temp) argument
127 tmp102_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dtmp103.c55 u32 attr, int channel, long *temp)
85 u32 attr, int channel, long temp)
106 u32 attr, int channel)
54 tmp103_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *temp) argument
84 tmp103_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long temp) argument
105 tmp103_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dsbrmi.c192 u32 attr, int channel, long *val)
226 u32 attr, int channel, long val)
250 u32 attr, int channel)
191 sbrmi_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
225 sbrmi_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
248 sbrmi_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dsht4x.c175 u32 attr, int channel)
189 u32 attr, int channel, long *val)
206 u32 attr, int channel, long val)
173 sht4x_hwmon_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
188 sht4x_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
205 sht4x_hwmon_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
H A Dsbtsi_temp.c73 u32 attr, int channel, long *val)
130 u32 attr, int channel, long val)
165 u32 attr, int channel)
72 sbtsi_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
129 sbtsi_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
163 sbtsi_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dpwm-fan.c294 u32 attr, int channel, long val)
323 u32 attr, int channel, long *val)
339 *val = ctx->tachs[channel].rpm;
349 u32 attr, int channel)
483 int channel_count = 1; /* We always have a PWM channel. */
550 channel_count++; /* We also have a FAN channel. */
293 pwm_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
322 pwm_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
347 pwm_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
H A Dpt5161l.c425 u32 attr, int channel, long *val)
469 int channel)
424 pt5161l_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
467 pt5161l_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument

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