Searched refs:regs (Results 151 - 167 of 167) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/dvb/cx23882/
H A Dcx23882.c324 char *start = (char *)(device->regs) + SRAM_START_ADDRESS + SRAM_BASE_RISC_PROG;
/haiku/headers/private/graphics/skeleton/
H A Dmacros.h741 #define ENG_REG8(r_) ((vuint8 *)regs)[(r_)]
742 #define ENG_REG16(r_) ((vuint16 *)regs)[(r_) >> 1]
743 #define ENG_RG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/headers/private/graphics/via/
H A Dmacros.h804 #define ENG_REG8(r_) ((vuint8 *)regs)[(r_)]
805 #define ENG_REG16(r_) ((vuint16 *)regs)[(r_) >> 1]
806 #define ENG_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/headers/private/graphics/nvidia/
H A Dnv_macros.h888 #define NV_REG8(r_) ((vuint8 *)regs)[(r_)]
889 #define NV_REG16(r_) ((vuint16 *)regs)[(r_) >> 1]
890 #define NV_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc.c1358 &(regs[(si->engine.fifo.ch_ptr[NV_ROP5_SOLID]) >> 2]);
1361 &(regs[(si->engine.fifo.ch_ptr[NV_IMAGE_BLACK_RECTANGLE]) >> 2]);
1364 &(regs[(si->engine.fifo.ch_ptr[NV_IMAGE_PATTERN]) >> 2]);
1367 &(regs[(si->engine.fifo.ch_ptr[NV_IMAGE_BLIT]) >> 2]);
1370 &(regs[(si->engine.fifo.ch_ptr[NV4_GDI_RECTANGLE_TEXT]) >> 2]);
/haiku/src/add-ons/kernel/drivers/audio/hda/
H A Dhda_controller.cpp1121 (void**)&controller->regs);
1351 controller->regs = NULL;
1424 controller->regs = NULL;
/haiku/src/system/boot/platform/riscv/
H A Dmmu.cpp280 MapAddrRange(gKernelArgs.arch_args.uart.regs,
/haiku/src/add-ons/kernel/drivers/disk/nvme/libnvme/
H A Dnvme_ctrlr.c808 ctrlr->regs = (volatile struct nvme_registers *)addr;
819 void *addr = (void *)ctrlr->regs;
H A Dnvme_qpair.c917 doorbell_base = &ctrlr->regs->doorbell[0].sq_tdbl;
/haiku/src/add-ons/kernel/busses/virtio/virtio_pci/
H A Dvirtio_pci.cpp84 union regs { union
87 } * v = (union regs*)buffer;
/haiku/src/add-ons/accelerants/radeon_hd/
H A Dencoder.cpp373 register_info* regs = gDisplay[crtcID]->regs; local
382 Write32(OUT, regs->modeDataFormat, 0);
/haiku/src/add-ons/kernel/drivers/audio/cmedia/
H A Dpcm.c117 uint8 regs[0x2e];
130 state->regs[ix] = get_indirect(port->card, ix+0x30);
145 set_indirect(port->card, ix, state->regs[ix]+0x30, 0xff);
/haiku/src/system/libroot/posix/glibc/regex/
H A Dregex_internal.h604 regmatch_t *regs; member in struct:re_fail_stack_ent_t
/haiku/headers/os/kernel/
H A DOS.h601 } regs; member in union:__anon16
/haiku/src/add-ons/kernel/drivers/network/wlan/marvell88w8363/dev/mwl/
H A Dmwlhal.c2275 mwl_hal_getregdump(struct mwl_hal_priv *mh, const MWL_DIAG_REGRANGE *regs, argument
2282 u_int r = regs[i].start;
2283 u_int e = regs[i].end;
/haiku/src/servers/app/drawing/Painter/
H A DPainter.cpp157 uint32 maxStdFunc = cpuInfo.regs.eax;
160 uint32 edx = cpuInfo.regs.edx;
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_reset.c283 u_int32_t regs[HAL_NUM_NF_READINGS] = { local
328 nf = (OS_REG_READ(ah, regs[i]) & masks[chan]) >> shifts[chan];
2247 /* XXX where are EXT regs defined */
4604 * recv DMA regs are not available to be read

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