Searched refs:bank (Results 151 - 175 of 367) sorted by relevance

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/linux-master/drivers/nvmem/
H A Dimx-iim.c44 int bank = i >> 5; local
47 *buf8++ = readl(iim->base + IIM_BANK_BASE(bank) + reg * 4);
/linux-master/drivers/thermal/mediatek/
H A Dauxadc_thermal.c109 /* The number of sensing points per bank */
198 /* The number of sensing points per bank */
219 /* The number of sensing points per bank */
258 /* The number of sensing points per bank */
276 /* The number of sensing points per bank */
472 * The MT8173 thermal controller has four banks. Each bank can read up to
474 * temperature sensors. We use each bank to measure a certain area of the
479 * the bank concept wouldn't be necessary here. However, the SVS (Smart
480 * Voltage Scaling) unit makes its decisions based on the same bank
515 * The MT2701 thermal controller has one bank, whic
780 mtk_thermal_get_bank(struct mtk_thermal_bank *bank) argument
801 mtk_thermal_put_bank(struct mtk_thermal_bank *bank) argument
816 mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) argument
855 struct mtk_thermal_bank *bank = &mt->banks[i]; local
877 struct mtk_thermal_bank *bank = &mt->banks[num]; local
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/linux-master/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.c50 * for each bank in the following order:
64 u32 bank = pin / PINS_PER_BANK; local
67 *reg = bank * pctl->bank_mem_size + MUX_REGS_OFFSET +
76 u32 bank = pin / PINS_PER_BANK; local
79 *reg = bank * pctl->bank_mem_size + DATA_REGS_OFFSET +
88 u32 bank = pin / PINS_PER_BANK; local
91 *reg = bank * pctl->bank_mem_size + DLEVEL_REGS_OFFSET +
100 u32 bank = pin / PINS_PER_BANK; local
103 *reg = bank * pctl->bank_mem_size + pctl->pull_regs_offset +
682 unsigned short bank; local
840 unsigned short bank = offset / PINS_PER_BANK; local
886 unsigned short bank = offset / PINS_PER_BANK; local
1148 u8 bank = d->hwirq / IRQ_PER_BANK; local
1219 unsigned long bank, reg, val; local
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/linux-master/arch/x86/kernel/cpu/mce/
H A Dcore.c76 /* One object for each MCE bank, shared by all CPUs */
80 u8 bank; /* bank number */ member in struct:mce_bank_dev
167 m->mcgstatus, m->bank, m->status);
333 unsigned bank = __this_cpu_read(injectm.bank); local
337 if (msr == mca_msr_reg(bank, MCA_STATUS))
339 if (msr == mca_msr_reg(bank, MCA_ADDR))
341 if (msr == mca_msr_reg(bank, MCA_MISC))
434 * the severity of the problem as we read per-bank specifi
804 quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs) argument
887 quirk_zen_ifu(int bank, struct mce *m, struct pt_regs *regs) argument
2269 int bank = *((int *)arg); local
2274 mce_disable_bank(int bank) argument
2475 u8 bank = attr_to_bank(attr)->bank; local
2492 u8 bank = attr_to_bank(attr)->bank; local
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/linux-master/drivers/gpio/
H A Dgpio-pca953x.c287 int bank = (reg & REG_ADDR_MASK) >> bank_shift; local
294 bank += 8;
297 /* Register is not in the matching bank. */
298 if (!(BIT(bank) & checkbank))
301 /* Register is not within allowed range of bank. */
312 * rules, including being able to use bit shifting to determine bank. These
319 int bank; local
325 * configuration register to form a bank.
332 * expected bank boundaries like other devices.
340 bank
357 u32 bank; local
380 u32 bank; local
400 u32 bank; local
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/linux-master/drivers/hwmon/
H A Dnct6775-platform.c129 static int nct6775_asuswmi_evaluate_method(u32 method_id, u8 bank, u8 reg, u8 val, u32 *retval) argument
133 u32 args = bank | (reg << 8) | (val << 16);
162 static inline int nct6775_asuswmi_write(u8 bank, u8 reg, u8 val) argument
164 return nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WHWM, bank,
168 static inline int nct6775_asuswmi_read(u8 bank, u8 reg, u8 *val) argument
172 ret = nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RHWM, bank,
259 u8 bank = reg >> 8; local
261 data->bank = bank;
273 err = nct6775_asuswmi_read(data->bank, re
317 u8 bank = reg >> 8; local
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H A Dasb100.c750 /* If we're in bank 0 */
760 /* Put it now into bank 0 and Vendor ID High Byte */
838 * bank switches.
844 int res, bank; local
848 bank = (reg >> 8) & 0x0f;
849 if (bank > 2)
851 i2c_smbus_write_byte_data(client, ASB100_REG_BANK, bank);
853 if (bank == 0 || bank > 2) {
857 cl = data->lm75[bank
889 int bank; local
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/linux-master/sound/pci/cs46xx/
H A Dcs46xx_lib.h47 unsigned int bank = reg >> 16; local
51 if (bank == 0)
55 writel(val, chip->region.idx[bank+1].remap_addr + offset);
60 unsigned int bank = reg >> 16; local
62 return readl(chip->region.idx[bank+1].remap_addr + offset);
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_gt_irq.h28 const unsigned int bank,
/linux-master/drivers/clk/tegra/
H A Dclk-sdmmc-mux.c240 const struct tegra_clk_periph_regs *bank; local
249 bank = get_reg_bank(clk_num);
250 if (!bank)
262 sdmmc_mux->gate.regs = bank;
H A Dclk-periph.c176 const struct tegra_clk_periph_regs *bank; local
192 bank = get_reg_bank(periph->gate.clk_num);
193 if (!bank)
202 periph->gate.regs = bank;
/linux-master/include/uapi/sound/
H A Dasound_fm.h113 unsigned char bank; member in struct:sbi_patch
/linux-master/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.h71 void stm32_pmx_get_mode(struct stm32_gpio_bank *bank,
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras_eeprom.h124 unsigned char bank; member in union:eeprom_table_record::__anon473
/linux-master/drivers/pinctrl/
H A Dpinctrl-equilibrium.h83 * struct eqbr_pin_bank: represent a pin bank.
84 * @membase: base address of the pin bank register.
85 * @id: bank id, to idenify the unique bank.
86 * @pin_base: starting pin number of the pin bank.
87 * @nr_pins: number of the pins of the pin bank.
88 * @aval_pinmap: available pin bitmap of the pin bank.
104 * @bank: pointer to corresponding pin bank.
113 struct eqbr_pin_bank *bank; member in struct:eqbr_gpio_ctrl
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/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dqat_compression.c120 unsigned long bank; local
154 ret = kstrtoul(val, 10, &bank);
169 ret = adf_create_ring(accel_dev, SEC, bank, num_msg_dc,
176 ret = adf_create_ring(accel_dev, SEC, bank, num_msg_dc,
H A Dadf_vf_isr.c166 struct adf_etr_bank_data *bank = &etr_data->banks[0]; local
169 csr_ops->write_csr_int_flag_and_col(bank->csr_addr,
170 bank->bank_number, 0);
171 tasklet_hi_schedule(&bank->resp_handler);
/linux-master/net/ethtool/
H A Deeprom.c13 u8 bank; member in struct:eeprom_req_info
117 page_data.bank = request->bank;
186 request->bank = nla_get_u8(tb[ETHTOOL_A_MODULE_EEPROM_BANK]);
/linux-master/drivers/mtd/nand/raw/
H A Ddenali_dt.c85 u32 bank; local
100 ret = of_property_read_u32_index(chip_np, "reg", i, &bank);
104 dchip->sels[i].bank = bank;
/linux-master/drivers/reset/hisilicon/
H A Dhi6220_reset.c48 u32 bank = idx >> 8; local
50 u32 reg = PERIPH_ASSERT_OFFSET + bank * 0x10;
60 u32 bank = idx >> 8; local
62 u32 reg = PERIPH_DEASSERT_OFFSET + bank * 0x10;
/linux-master/drivers/edac/
H A Dghes_edac.c101 const char *bank = NULL, *device = NULL; local
103 dmi_memdev_name(handle, &bank, &device);
106 * Set to a NULL string when both bank and device are zero. In this case,
110 (bank && *bank) ? bank : "",
111 (bank && *bank && device && *device) ? " " : "",
H A Docteon_edac-lmc.c33 unsigned long bank; member in struct:octeon_lmc_pvt
49 "DIMM %d rank %d bank %d row %d col %d",
95 fadr.cn61xx.fbank = pvt->bank;
100 "DIMM %d rank %d bank %d row %d col %d",
158 TEMPLATE_SHOW(bank); variable
159 TEMPLATE_STORE(bank); variable
205 static DEVICE_ATTR(bank, S_IRUGO | S_IWUSR,
/linux-master/arch/powerpc/platforms/powermac/
H A Dnvram.c79 static int (*core99_write_bank)(int bank, u8* datas);
80 static int (*core99_erase_bank)(int bank);
280 static int sm_erase_bank(int bank) argument
287 DBG("nvram: Sharp/Micron Erasing bank %d...\n", bank);
311 static int sm_write_bank(int bank, u8* datas) argument
318 DBG("nvram: Sharp/Micron Writing bank %d...\n", bank);
345 static int amd_erase_bank(int bank) argument
352 DBG("nvram: AMD Erasing bank
391 amd_write_bank(int bank, u8* datas) argument
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/linux-master/drivers/mfd/
H A Dmt6360-core.c403 u8 bank = *(u8 *)reg; local
413 if (bank >= MT6360_SLAVE_MAX)
416 i2c = ddata->i2c[bank];
418 if (bank == MT6360_SLAVE_PMIC || bank == MT6360_SLAVE_LDO) {
459 u8 bank = *(u8 *)val; local
468 if (bank >= MT6360_SLAVE_MAX)
471 i2c = ddata->i2c[bank];
473 if (bank == MT6360_SLAVE_PMIC || bank
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/linux-master/arch/arm/mach-omap2/
H A Dprm44xx.c502 static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, argument
507 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
516 static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, argument
521 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
582 static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) argument
586 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
596 static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) argument
600 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
613 * @bank: memory bank inde
624 omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) argument
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