Searched refs:__raw_readl (Results 151 - 175 of 424) sorted by relevance

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/linux-master/arch/arm/mach-mmp/
H A Dtime.c53 val = __raw_readl(mmp_timer_base + TMR_CVWR(1));
151 uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR);
/linux-master/drivers/clk/bcm/
H A Dclk-bcm63268-timer.c91 val = __raw_readl(reset->regs);
138 return !(__raw_readl(reset->regs) & BIT(id));
/linux-master/arch/sh/mm/
H A Dcache-sh7705.c50 data = __raw_readl(addr);
117 data = __raw_readl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
H A Dcache-sh3.c50 data = __raw_readl(addr);
H A Dpmb.c316 addr_val = __raw_readl(addr);
317 data_val = __raw_readl(data);
587 addr_val = __raw_readl(addr);
588 data_val = __raw_readl(data);
812 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
828 addr = __raw_readl(mk_pmb_addr(i));
829 data = __raw_readl(mk_pmb_data(i));
/linux-master/arch/mips/mti-malta/
H A Dmalta-setup.c119 cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
136 int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
/linux-master/tools/testing/selftests/kvm/include/aarch64/
H A Dprocessor.h173 static __always_inline u32 __raw_readl(const volatile void *addr) function
181 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
/linux-master/drivers/video/fbdev/nvidia/
H A Dnv_local.h67 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
/linux-master/drivers/video/fbdev/mb862xx/
H A Dmb862xxfb.h105 #define gdc_read __raw_readl
/linux-master/sound/soc/sh/rcar/
H A Ddebugfs.c51 seq_printf(m, " %08x", __raw_readl(base + offset + i + j));
/linux-master/arch/arm/mach-omap1/
H A Dio.c89 return __raw_readl(OMAP1_IO_ADDRESS(pa));
/linux-master/include/asm-generic/
H A Dfb.h62 return __raw_readl(addr);
/linux-master/drivers/char/hw_random/
H A Dnomadik-rng.c25 *(u16 *)data = __raw_readl(base + 8) & 0xffff;
/linux-master/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.h62 return __raw_readl(addr);
/linux-master/arch/sh/kernel/cpu/sh4/
H A Dprobe.c28 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
30 cvr = (__raw_readl(CCN_CVR));
/linux-master/drivers/net/ethernet/sfc/falcon/
H A Dio.h85 return (__force __le32)__raw_readl(efx->membase + reg);
173 value->u32[0] = (__force __le32)__raw_readl(membase + addr);
174 value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4);
/linux-master/arch/mips/include/asm/
H A Dmips-gic.h57 return __raw_readl(addr_gic_##name(intr)); \
102 val = __raw_readl(addr) >> intr % 32; \
142 _val = __raw_readl(addr); \
/linux-master/arch/arm/mm/
H A Dcache-b15-rac.c64 u32 val = __raw_readl(b15_rac_base + RAC_CONFIG0_REG);
81 reg = __raw_readl(b15_rac_base + rac_flush_offset);
352 reg = __raw_readl(b15_rac_base + RAC_CONFIG0_REG);
/linux-master/drivers/net/ethernet/sfc/siena/
H A Dio.h102 return (__force __le32)__raw_readl(efx->membase + reg);
190 value->u32[0] = (__force __le32)__raw_readl(membase + addr);
191 value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4);
/linux-master/arch/mips/loongson32/common/
H A Dplatform.c76 val = __raw_readl(LS1X_MUX_CTRL1);
81 __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
120 val = __raw_readl(LS1X_MUX_CTRL0);
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7723.c48 if (__raw_readl(PLLCR) & 0x1000)
49 mult = __raw_readl(DLLFRQ);
71 if (__raw_readl(PLLCR) & 0x4000)
72 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
273 if (__raw_readl(PLLCR) & 0x1000)
H A Dsetup-sh7724.c1155 sh7724_rstandby_state.mmselr = __raw_readl(0xff800020); /* MMSELR */
1157 sh7724_rstandby_state.cs0bcr = __raw_readl(0xfec10004); /* CS0BCR */
1158 sh7724_rstandby_state.cs4bcr = __raw_readl(0xfec10010); /* CS4BCR */
1159 sh7724_rstandby_state.cs5abcr = __raw_readl(0xfec10014); /* CS5ABCR */
1160 sh7724_rstandby_state.cs5bbcr = __raw_readl(0xfec10018); /* CS5BBCR */
1161 sh7724_rstandby_state.cs6abcr = __raw_readl(0xfec1001c); /* CS6ABCR */
1162 sh7724_rstandby_state.cs6bbcr = __raw_readl(0xfec10020); /* CS6BBCR */
1163 sh7724_rstandby_state.cs4wcr = __raw_readl(0xfec10030); /* CS4WCR */
1164 sh7724_rstandby_state.cs5awcr = __raw_readl(0xfec10034); /* CS5AWCR */
1165 sh7724_rstandby_state.cs5bwcr = __raw_readl(
[all...]
/linux-master/arch/alpha/kernel/
H A Dio.c133 u32 __raw_readl(const volatile void __iomem *addr) function
165 EXPORT_SYMBOL(__raw_readl); variable
194 ret = __raw_readl(addr);
260 return __raw_readl(addr);
503 *(u32 *)to = __raw_readl(from);
/linux-master/arch/sparc/include/asm/
H A Dio_64.h45 #define __raw_readl __raw_readl macro
46 static inline u32 __raw_readl(const volatile void __iomem *addr) function
316 return __raw_readl(addr);
443 #define ioread32be __raw_readl
/linux-master/arch/mips/alchemy/common/
H A Ddbdma.c991 alchemy_dbdma_pm_data[0][0] = __raw_readl(addr + 0x00);
992 alchemy_dbdma_pm_data[0][1] = __raw_readl(addr + 0x04);
993 alchemy_dbdma_pm_data[0][2] = __raw_readl(addr + 0x08);
994 alchemy_dbdma_pm_data[0][3] = __raw_readl(addr + 0x0c);
999 alchemy_dbdma_pm_data[i][0] = __raw_readl(addr + 0x00);
1000 alchemy_dbdma_pm_data[i][1] = __raw_readl(addr + 0x04);
1001 alchemy_dbdma_pm_data[i][2] = __raw_readl(addr + 0x08);
1002 alchemy_dbdma_pm_data[i][3] = __raw_readl(addr + 0x0c);
1003 alchemy_dbdma_pm_data[i][4] = __raw_readl(addr + 0x10);
1004 alchemy_dbdma_pm_data[i][5] = __raw_readl(add
[all...]

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