/linux-master/drivers/base/ |
H A D | memory.c | 145 const char *output; local 153 output = "online"; 156 output = "offline"; 159 output = "going-offline"; 166 return sysfs_emit(buf, "%s\n", output);
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H A D | soc.c | 73 const char *output; local 76 output = soc_dev->attr->machine; 78 output = soc_dev->attr->family; 80 output = soc_dev->attr->revision; 82 output = soc_dev->attr->serial_number; 84 output = soc_dev->attr->soc_id; 88 return sysfs_emit(buf, "%s\n", output);
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/linux-master/drivers/base/power/ |
H A D | sysfs.c | 153 const char *output; local 156 output = "error"; 158 output = "unsupported"; 162 output = "suspended"; 165 output = "suspending"; 168 output = "resuming"; 171 output = "active"; 177 return sysfs_emit(buf, "%s\n", output); 572 const char *output; local 575 output [all...] |
/linux-master/drivers/clk/at91/ |
H A D | at91rm9200.c | 24 .output = { .min = 0, .max = 80000000 }, 38 .output = rm9200_pll_outputs,
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H A D | at91sam9260.c | 38 .output = { .min = 0, .max = 105000000 }, 54 .output = sam9260_plla_outputs, 70 .output = sam9260_pllb_outputs, 125 .output = { .min = 0, .max = 133000000 }, 147 .output = sam9g20_plla_outputs, 163 .output = sam9g20_pllb_outputs, 183 .output = { .min = 0, .max = 94000000 }, 195 .output = sam9261_plla_outputs, 211 .output = sam9261_pllb_outputs, 263 .output [all...] |
H A D | at91sam9g45.c | 13 .output = { .min = 0, .max = 133333333 }, 35 .output = plla_outputs,
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H A D | at91sam9n12.c | 13 .output = { .min = 0, .max = 133333333 }, 36 .output = plla_outputs, 50 .output = pllb_outputs,
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H A D | at91sam9rl.c | 13 .output = { .min = 0, .max = 94000000 }, 27 .output = sam9rl_plla_outputs,
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H A D | at91sam9x5.c | 13 .output = { .min = 0, .max = 133333333 }, 36 .output = plla_outputs,
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H A D | clk-master.c | 105 if (rate < characteristics->output.min) 107 else if (rate > characteristics->output.max) 198 if (rate < characteristics->output.min) 200 else if (rate > characteristics->output.max) 313 tmp_diff = characteristics->output.max - new_rate;
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H A D | clk-pll.c | 145 * Should always be 2 according to the input and output characteristics 214 /* Check if bestrate is a valid output rate */ 216 if (bestrate >= characteristics->output[i].min && 217 bestrate <= characteristics->output[i].max)
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H A D | clk-sam9x60-pll.c | 450 if (rate < characteristics->output[0].min || 451 rate > characteristics->output[0].max) 472 if (best_rate < characteristics->output[0].min || 473 best_rate > characteristics->output[0].max)
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H A D | dt-compat.c | 161 if (of_property_read_string(np, "clock-output-names", &name)) 164 of_at91_get_clk_range(gcknp, "atmel,clk-output-range", 262 of_property_read_string(np, "clock-output-names", &name); 290 of_property_read_string(np, "clock-output-names", &name); 318 of_property_read_string(np, "clock-output-names", &name); 355 of_property_read_string(np, "clock-output-names", &name); 376 if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output)) 410 of_property_read_string(np, "clock-output-names", &name); 488 if (of_property_read_string(np, "clock-output 551 struct clk_range *output; local [all...] |
H A D | pmc.h | 52 struct clk_range output; member in struct:clk_master_characteristics 77 const struct clk_range *output; member in struct:clk_pll_characteristics
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H A D | sam9x60.c | 14 .output = { .min = 140000000, .max = 200000000 }, 32 .output = plla_outputs, 42 .output = upll_outputs,
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H A D | sama5d2.c | 13 .output = { .min = 124000000, .max = 166000000 }, 28 .output = plla_outputs,
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H A D | sama5d3.c | 13 .output = { .min = 0, .max = 166000000 }, 28 .output = plla_outputs,
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H A D | sama5d4.c | 13 .output = { .min = 125000000, .max = 200000000 }, 28 .output = plla_outputs,
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H A D | sama7g5.c | 106 * CPU PLL output range. 108 * block which cannot output exactly 1GHz. 114 /* PLL output range. */ 123 .output = cpu_pll_outputs, 130 .output = pll_outputs, 552 * @r: clock output range 951 .output = { .min = 32768, .max = 200000000 },
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/linux-master/drivers/clk/ |
H A D | clk-si5341.c | 59 /* The output stages can be connected to any synth (full mux) */ 137 #define SI5341_OUT_CONFIG(output) \ 138 ((output)->data->reg_output_offset[(output)->index]) 139 #define SI5341_OUT_FORMAT(output) (SI5341_OUT_CONFIG(output) + 1) 140 #define SI5341_OUT_CM(output) (SI5341_OUT_CONFIG(output) + 2) 141 #define SI5341_OUT_MUX_SEL(output) (SI5341_OUT_CONFIG(output) 750 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 766 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 779 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 796 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 868 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 902 si5341_output_reparent(struct clk_si5341_output *output, u8 index) argument 910 struct clk_si5341_output *output = to_clk_si5341_output(hw); local 920 struct clk_si5341_output *output = to_clk_si5341_output(hw); local [all...] |
/linux-master/drivers/clk/microchip/ |
H A D | clk-mpfs.c | 64 struct clk_divider output; member in struct:mpfs_msspll_out_hw_clock 174 * MSS PLL output clocks 179 .output.shift = _shift, \ 180 .output.width = _width, \ 181 .output.table = NULL, \ 183 .output.flags = _flags, \ 184 .output.hw.init = CLK_HW_INIT(_name, _parent, &clk_divider_ops, 0), \ 185 .output.lock = &mpfs_clk_lock, \ 209 msspll_out_hw->output.reg = data->msspll_base + msspll_out_hw->reg_offset; 210 ret = devm_clk_hw_register(dev, &msspll_out_hw->output [all...] |
/linux-master/drivers/clk/st/ |
H A D | clkgen-fsyn.c | 82 unsigned long output, struct stm_fs *fs); 350 unsigned long output, struct stm_fs *fs) 359 if (output < 384000000 || output > 660000000) 368 output /= 1000; 370 n = output * pdiv / input; 492 * struct st_clk_quadfs_fsynth - One clock output from a four channel digital 497 * @nsb: regmap field in the output control register for the digital 501 * @nsdiv: regmap field in the output control register for 647 signed long input, unsigned long output, uint64_ 349 clk_fs660c32_vco_get_params(unsigned long input, unsigned long output, struct stm_fs *fs) argument 646 clk_fs660c32_get_pe(int m, int si, unsigned long *deviation, signed long input, unsigned long output, uint64_t *p, struct stm_fs *fs) argument 682 clk_fs660c32_dig_get_params(unsigned long input, unsigned long output, struct stm_fs *fs) argument [all...] |
H A D | clkgen-pll.c | 315 static int clk_pll3200c32_get_params(unsigned long input, unsigned long output, argument 329 if (output < 800000000 || output > 1600000000) 333 output /= 1000; 336 n = i * output / (2 * input); 346 new_deviation = abs(new_freq - output); 462 /* PLL output structure 463 * FVCO >> /2 >> FVCOBY2 (no output) 466 * FVCOby2 output = (input * 2 * NDIV) / IDF (assuming FRAC_CONTROL==L) 471 * 19.05Mhz <= FVCOby2 output (PH 476 clk_pll4600c28_get_params(unsigned long input, unsigned long output, struct stm_pll *pll) argument [all...] |
/linux-master/drivers/clk/ti/ |
H A D | clkctrl.c | 468 * Get clock name based on "clock-output-names" property or the 476 const char *output; local 480 if (!of_property_read_string_index(np, "clock-output-names", 0, 481 &output)) { 484 len = strlen(output); 485 end = strstr(output, "_clkctrl"); 488 name = kstrndup(output, len, GFP_KERNEL);
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/linux-master/drivers/cpufreq/ |
H A D | pcc-cpufreq.c | 305 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL}; local 329 status = acpi_evaluate_object(*handle, "_OSC", &input, &output); 333 if (!output.length) 336 out_obj = output.pointer; 354 kfree(output.pointer); 358 status = acpi_evaluate_object(*handle, "_OSC", &input, &output); 362 if (!output.length) 365 out_obj = output.pointer; 384 kfree(output.pointer); 391 struct acpi_buffer output local [all...] |