Searched refs:idx (Results 126 - 150 of 3979) sorted by relevance

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/linux-master/drivers/net/ethernet/ti/
H A Dcpsw_ale.c109 int idx, idx2; local
112 idx = start / 32;
115 if (idx != idx2) {
119 start -= idx * 32;
120 idx = 2 - idx; /* flip */
121 return (hi_val + (ale_entry[idx] >> start)) & BITMASK(bits);
127 int idx, idx2; local
130 idx = start / 32;
133 if (idx !
314 cpsw_ale_read(struct cpsw_ale *ale, int idx, u32 *ale_entry) argument
329 cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry) argument
348 int type, idx; local
369 int type, idx; local
385 int type, idx; local
399 int type, idx; local
438 int ret, idx; local
485 int idx; local
511 int idx; local
526 int idx, mask; local
560 int idx; local
588 int idx; local
617 int idx; local
696 int idx; local
713 int members, idx; local
750 int idx, ret = 0; local
788 int type, idx; local
831 int idx; local
849 int type, idx; local
[all...]
/linux-master/drivers/media/usb/pvrusb2/
H A Dpvrusb2-ioread.c41 unsigned int idx; local
46 for (idx = 0; idx < BUFFER_COUNT; idx++) {
47 cp->buffer_storage[idx] = kmalloc(BUFFER_SIZE,GFP_KERNEL);
48 if (!(cp->buffer_storage[idx])) break;
51 if (idx < BUFFER_COUNT) {
53 for (idx = 0; idx < BUFFER_COUNT; idx
64 unsigned int idx; local
189 unsigned int idx; local
295 unsigned int idx; local
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/linux-master/drivers/irqchip/
H A Dirq-bcm7120-l2.c60 unsigned int idx; local
64 for (idx = 0; idx < b->n_words; idx++) {
65 int base = idx * IRQS_PER_WORD;
72 pending = irq_reg_readl(gc, b->stat_offset[idx]) &
74 data->irq_map_mask[idx];
112 unsigned int idx; local
129 for (idx = 0; idx < dat
227 unsigned int idx, irq, flags; local
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/linux-master/security/selinux/
H A Dibpkey.c72 unsigned int idx; local
75 idx = sel_ib_pkey_hashfn(pkey_num);
76 list_for_each_entry_rcu(pkey, &sel_ib_pkey_hash[idx].list, list) {
95 unsigned int idx; local
100 idx = sel_ib_pkey_hashfn(pkey->psec.pkey);
101 list_add_rcu(&pkey->list, &sel_ib_pkey_hash[idx].list);
102 if (sel_ib_pkey_hash[idx].size == SEL_PKEY_HASH_BKT_LIMIT) {
107 list_tail_rcu(&sel_ib_pkey_hash[idx].list),
113 sel_ib_pkey_hash[idx].size++;
206 unsigned int idx; local
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H A Dnetport.c85 unsigned int idx; local
88 idx = sel_netport_hashfn(pnum);
89 list_for_each_entry_rcu(port, &sel_netport_hash[idx].list, list)
106 unsigned int idx; local
110 idx = sel_netport_hashfn(port->psec.port);
111 list_add_rcu(&port->list, &sel_netport_hash[idx].list);
112 if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) {
116 list_tail_rcu(&sel_netport_hash[idx].list),
122 sel_netport_hash[idx].size++;
208 unsigned int idx; local
[all...]
/linux-master/drivers/gpu/drm/
H A Ddrm_displayid.c24 validate_displayid(const u8 *displayid, int length, int idx) argument
30 base = displayid_get_header(displayid, length, idx);
39 if (dispid_length > length - idx)
43 csum += displayid[idx + i];
53 int *length, int *idx,
64 *idx = 1;
66 base = validate_displayid(displayid, *length, *idx);
70 *length = *idx + sizeof(*base) + base->bytes;
91 block = (const struct displayid_block *)&iter->section[iter->idx];
93 if (iter->idx
52 drm_find_displayid_extension(const struct drm_edid *drm_edid, int *length, int *idx, int *ext_index) argument
[all...]
/linux-master/fs/bcachefs/
H A Dbtree_journal_iter.c34 static inline size_t idx_to_pos(struct journal_keys *keys, size_t idx) argument
38 if (idx >= keys->gap)
39 idx += gap_size;
40 return idx;
43 static inline struct journal_key *idx_to_key(struct journal_keys *keys, size_t idx) argument
45 return keys->data + idx_to_pos(keys, idx);
81 struct bpos end_pos, size_t *idx)
87 BUG_ON(*idx > keys->nr);
89 if (!*idx)
90 *idx
79 bch2_journal_keys_peek_upto(struct bch_fs *c, enum btree_id btree_id, unsigned level, struct bpos pos, struct bpos end_pos, size_t *idx) argument
128 size_t idx = 0; local
203 size_t idx = bch2_journal_key_search(keys, id, level, k->k.p); local
296 size_t idx = bch2_journal_key_search(keys, btree, level, pos); local
312 size_t idx = bch2_journal_key_search(keys, btree, level, pos); local
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/linux-master/tools/testing/selftests/kvm/x86_64/
H A Dhyperv_features.c25 uint32_t idx; member in struct:msr_data
47 GUEST_ASSERT(msr->idx);
50 vector = wrmsr_safe(msr->idx, msr->write_val);
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx)))
53 vector = rdmsr_safe(msr->idx, &msr_val);
58 msr->write ? "WR" : "RD", msr->idx, vector);
62 msr->write ? "WR" : "RD", msr->idx, vector);
64 if (vector || is_write_only_msr(msr->idx))
70 msr->idx, msr->write_val, msr_val);
73 if (msr->idx
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/linux-master/arch/sh/kernel/
H A Dperf_event.c159 struct hw_perf_event *hwc, int idx)
179 new_raw_count = sh_pmu->read(idx);
203 int idx = hwc->idx; local
206 sh_pmu->disable(hwc, idx);
207 cpuc->events[idx] = NULL;
212 sh_perf_event_update(event, &event->hw, idx);
221 int idx = hwc->idx; local
223 if (WARN_ON_ONCE(idx
158 sh_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
248 int idx = hwc->idx; local
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/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_display_power_map.c111 .hsw.idx = HSW_PW_CTL_IDX_GLOBAL,
145 .hsw.idx = HSW_PW_CTL_IDX_GLOBAL,
204 .vlv.idx = PUNIT_PWGT_IDX_DISP2D,
211 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_01),
213 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_B_LANES_23),
215 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_01),
217 .vlv.idx = PUNIT_PWGT_IDX_DPIO_TX_C_LANES_23),
223 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
291 .vlv.idx = PUNIT_PWGT_IDX_DPIO_CMN_BC,
294 .vlv.idx
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H A Dintel_dsb_buffer.c18 void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val) argument
20 dsb_buf->cmd_buf[idx] = val;
23 u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx) argument
25 return dsb_buf->cmd_buf[idx];
28 void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val, size_t size) argument
30 WARN_ON(idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf));
32 memset(&dsb_buf->cmd_buf[idx], val, size);
H A Dintel_cx0_phy_regs.h16 * _PICK_EVEN_2RANGES(idx, PORT_TC1, ...), this single range will be the second
34 #define _XELPDP_PORT_M2P_MSGBUS_CTL(idx, lane) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \
54 #define _XELPDP_PORT_P2M_MSGBUS_STATUS(idx, lane) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \
85 #define _XELPDP_PORT_BUF_CTL1(idx) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \
110 #define _XELPDP_PORT_BUF_CTL2(idx) _MMIO(_PICK_EVEN_2RANGES(idx, PORT_TC1, \
133 #define _XELPDP_PORT_BUF_CTL3(idx) _MMI
[all...]
/linux-master/drivers/gpu/drm/radeon/
H A Devergreen_cs.c755 unsigned idx)
763 texdw[0] = radeon_get_ib_value(p, idx + 0);
764 texdw[1] = radeon_get_ib_value(p, idx + 1);
765 texdw[2] = radeon_get_ib_value(p, idx + 2);
766 texdw[3] = radeon_get_ib_value(p, idx + 3);
767 texdw[4] = radeon_get_ib_value(p, idx + 4);
768 texdw[5] = radeon_get_ib_value(p, idx + 5);
769 texdw[6] = radeon_get_ib_value(p, idx + 6);
770 texdw[7] = radeon_get_ib_value(p, idx + 7);
1049 unsigned idx, unsigne
752 evergreen_cs_track_validate_texture(struct radeon_cs_parser *p, struct radeon_bo *texture, struct radeon_bo *mipmap, unsigned idx) argument
1047 evergreen_packet0_check(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, unsigned idx, unsigned reg) argument
1073 unsigned idx; local
1093 evergreen_cs_handle_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) argument
1777 unsigned idx; local
2802 u32 idx; local
3350 u32 idx = pkt->idx + 1; local
3523 u32 idx = 0; local
3567 u32 idx = 0; local
[all...]
H A Dr600_cs.c837 r = radeon_cs_packet_parse(p, &wait_reg_mem, p->idx);
848 wait_reg_mem_info = radeon_get_ib_value(p, wait_reg_mem.idx + 1);
864 if ((radeon_get_ib_value(p, wait_reg_mem.idx + 2) << 2) != vline_status[0]) {
869 if (radeon_get_ib_value(p, wait_reg_mem.idx + 5) != RADEON_VLINE_STAT) {
875 r = radeon_cs_packet_parse(p, &p3reloc, p->idx + wait_reg_mem.count + 2);
879 h_idx = p->idx - 2;
880 p->idx += wait_reg_mem.count + 2;
881 p->idx += p3reloc.count + 2;
918 unsigned idx, unsigned reg)
927 idx, re
916 r600_packet0_check(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, unsigned idx, unsigned reg) argument
942 unsigned idx; local
966 r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) argument
1469 r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, struct radeon_bo *texture, struct radeon_bo *mipmap, u64 base_offset, u64 mip_offset, u32 tiling_flags) argument
1610 r600_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) argument
1632 unsigned idx; local
2345 unsigned idx; local
2382 u32 idx, idx_value; local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A DP0260.c58 nvbios_P0260Ee(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) argument
62 if (data && idx < cnt)
63 return data + hdr + (idx * *len);
68 nvbios_P0260Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, argument
71 u32 data = nvbios_P0260Ee(bios, idx, ver, len);
84 nvbios_P0260Xe(struct nvkm_bios *bios, int idx, u8 *ver, u8 *xsz) argument
88 if (data && idx < xnr)
89 return data + hdr + (cnt * len) + (idx * *xsz);
94 nvbios_P0260Xp(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, argument
97 u32 data = nvbios_P0260Xe(bios, idx, ve
[all...]
/linux-master/drivers/reset/hisilicon/
H A Dreset-hi3660.c23 unsigned long idx, bool assert)
26 unsigned int offset = idx >> 8;
27 unsigned int mask = BIT(idx & 0x1f);
36 unsigned long idx)
38 return hi3660_reset_program_hw(rcdev, idx, true);
42 unsigned long idx)
44 return hi3660_reset_program_hw(rcdev, idx, false);
48 unsigned long idx)
52 err = hi3660_reset_assert(rcdev, idx);
56 return hi3660_reset_deassert(rcdev, idx);
22 hi3660_reset_program_hw(struct reset_controller_dev *rcdev, unsigned long idx, bool assert) argument
35 hi3660_reset_assert(struct reset_controller_dev *rcdev, unsigned long idx) argument
41 hi3660_reset_deassert(struct reset_controller_dev *rcdev, unsigned long idx) argument
47 hi3660_reset_dev(struct reset_controller_dev *rcdev, unsigned long idx) argument
[all...]
/linux-master/arch/loongarch/kernel/
H A Dperf_event.c136 u64 (*read_counter)(unsigned int idx);
137 void (*write_counter)(unsigned int idx, u64 val);
161 static u64 loongarch_pmu_read_counter(unsigned int idx) argument
165 switch (idx) {
179 WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx);
186 static void loongarch_pmu_write_counter(unsigned int idx, u64 val) argument
188 switch (idx) {
202 WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx);
207 static unsigned int loongarch_pmu_read_control(unsigned int idx) argument
211 switch (idx) {
232 loongarch_pmu_write_control(unsigned int idx, unsigned int val) argument
265 loongarch_pmu_enable_event(struct hw_perf_event *evt, int idx) argument
285 loongarch_pmu_disable_event(int idx) argument
299 loongarch_pmu_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
335 loongarch_pmu_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
387 int idx, err = 0; local
424 int idx = hwc->idx; local
481 handle_associated_event(struct cpu_hw_events *cpuc, int idx, struct perf_sample_data *data, struct pt_regs *regs) argument
600 loongarch_pmu_map_general_event(int idx) argument
[all...]
/linux-master/drivers/net/ethernet/cavium/liquidio/
H A Docteon_config.h146 #define CFG_GET_MAX_TXQS_NIC_IF(cfg, idx) \
147 ((cfg)->nic_if_cfg[idx].max_txqs)
148 #define CFG_GET_NUM_TXQS_NIC_IF(cfg, idx) \
149 ((cfg)->nic_if_cfg[idx].num_txqs)
150 #define CFG_GET_MAX_RXQS_NIC_IF(cfg, idx) \
151 ((cfg)->nic_if_cfg[idx].max_rxqs)
152 #define CFG_GET_NUM_RXQS_NIC_IF(cfg, idx) \
153 ((cfg)->nic_if_cfg[idx].num_rxqs)
154 #define CFG_GET_NUM_RX_DESCS_NIC_IF(cfg, idx) \
155 ((cfg)->nic_if_cfg[idx]
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/linux-master/drivers/mtd/parsers/
H A Dtplink_safeloader.c82 int idx; local
97 for (idx = 0, offset = TPLINK_SAFELOADER_DATA_OFFSET;
98 idx < TPLINK_SAFELOADER_MAX_PARTS &&
100 name, &parts[idx].offset, &parts[idx].size, &bytes) == 3;
101 idx++, offset += bytes + 1) {
102 parts[idx].name = kstrdup(name, GFP_KERNEL);
103 if (!parts[idx].name) {
109 if (idx == TPLINK_SAFELOADER_MAX_PARTS)
116 return idx;
[all...]
/linux-master/drivers/clk/starfive/
H A Dclk-starfive-jh7110-stg.c81 unsigned int idx = clkspec->args[0]; local
83 if (idx < JH7110_STGCLK_END)
84 return &priv->reg[idx].hw;
92 unsigned int idx; local
106 for (idx = 0; idx < JH7110_STGCLK_END; idx++) {
107 u32 max = jh7110_stgclk_data[idx].max;
110 .name = jh7110_stgclk_data[idx].name,
115 .flags = jh7110_stgclk_data[idx]
[all...]
H A Dclk-starfive-jh7100-audio.c90 unsigned int idx = clkspec->args[0]; local
92 if (idx < JH7100_AUDCLK_END)
93 return &priv->reg[idx].hw;
101 unsigned int idx; local
114 for (idx = 0; idx < JH7100_AUDCLK_END; idx++) {
115 u32 max = jh7100_audclk_data[idx].max;
118 .name = jh7100_audclk_data[idx].name,
122 .flags = jh7100_audclk_data[idx]
[all...]
H A Dclk-starfive-jh7110-aon.c60 unsigned int idx = clkspec->args[0]; local
62 if (idx < JH7110_AONCLK_END)
63 return &priv->reg[idx].hw;
71 unsigned int idx; local
86 for (idx = 0; idx < JH7110_AONCLK_END; idx++) {
87 u32 max = jh7110_aonclk_data[idx].max;
90 .name = jh7110_aonclk_data[idx].name,
95 .flags = jh7110_aonclk_data[idx]
[all...]
/linux-master/drivers/w1/masters/
H A Dds2482.c447 int idx; local
492 for (idx = 0; idx < data->w1_count; idx++) {
493 data->w1_ch[idx].pdev = data;
494 data->w1_ch[idx].channel = idx;
497 data->w1_ch[idx].w1_bm.data = &data->w1_ch[idx];
498 data->w1_ch[idx]
528 int idx; local
[all...]
/linux-master/drivers/gpu/drm/i915/selftests/
H A Di915_syncmap.c33 unsigned int idx)
49 len = scnprintf(buf, *sz, "%x-> ", idx);
146 static int check_seqno(struct i915_syncmap *leaf, unsigned int idx, u32 seqno) argument
154 if (__sync_seqno(leaf)[idx] != seqno) {
156 __func__, idx, __sync_seqno(leaf)[idx], seqno);
335 unsigned int step, order, idx; local
372 for (idx = 1; idx < KSYNCMAP; idx
29 __sync_print(struct i915_syncmap *p, char *buf, unsigned long *sz, unsigned int depth, unsigned int last, unsigned int idx) argument
415 unsigned int idx; local
449 unsigned int idx, order; local
[all...]
/linux-master/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_mps.c31 static int cxgb4_mps_ref_dec(struct adapter *adap, u16 idx) argument
38 if (mps_entry->idx == idx) {
54 u16 idx, const u8 *mask)
62 if (mps_entry->idx == idx) {
74 mps_entry->idx = idx;
102 u16 *idx, u64 *hash, bool sleep_ok)
107 naddr, addr, idx, has
53 cxgb4_mps_ref_inc(struct adapter *adap, const u8 *mac_addr, u16 idx, const u8 *mask) argument
100 cxgb4_alloc_mac_filt(struct adapter *adap, unsigned int viid, bool free, unsigned int naddr, const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok) argument
144 cxgb4_free_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok) argument
163 cxgb4_alloc_raw_mac_filt(struct adapter *adap, unsigned int viid, const u8 *addr, const u8 *mask, unsigned int idx, u8 lookup_type, u8 port_id, bool sleep_ok) argument
190 cxgb4_free_encap_mac_filt(struct adapter *adap, unsigned int viid, int idx, bool sleep_ok) argument
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