Searched refs:controller (Results 126 - 150 of 629) sorted by relevance

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/linux-master/arch/arm/mm/
H A Dl2c-l2x0-resume.S4 * the settings of their L2 cache controller before restoring the
21 @ r1 = phys address of L2C-310 controller
/linux-master/drivers/usb/host/
H A Dohci-mem.c47 ohci_to_hcd(ohci)->self.controller,
54 ohci_to_hcd(ohci)->self.controller,
H A Dohci-da8xx.c91 struct device *dev = hcd->self.controller;
171 struct device *dev = hcd->self.controller;
197 struct device *dev = da8xx_ohci->hcd->self.controller;
213 struct device *dev = hcd->self.controller;
230 struct device *dev = hcd->self.controller;
236 dev_dbg(dev, "starting USB controller\n");
287 dev_dbg(hcd->self.controller, "over-current indicator change "
304 struct device *dev = hcd->self.controller;
457 device_wakeup_enable(hcd->self.controller);
H A Dxhci-mvebu.c47 struct device *dev = hcd->self.controller;
H A Dsl811-hcd.c11 * The SL811HS controller handles host side USB (like the SL11H, but with
100 dev_dbg(hcd->self.controller, "power %s\n",
102 sl811->board->port_power(hcd->self.controller, is_on);
107 sl811->board->reset(hcd->self.controller);
283 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq on\n");
291 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq off\n");
339 dev_dbg(sl811_to_hcd(sl811)->self.controller,
393 dev_dbg(sl811_to_hcd(sl811)->self.controller,
450 dev_dbg(sl811_to_hcd(sl811)->self.controller,
598 dev_dbg(sl811_to_hcd(sl811)->self.controller,
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H A Dohci-omap.c93 struct omap_usb_config *config = dev_get_platdata(hcd->self.controller);
98 dev_dbg(hcd->self.controller, "starting USB Controller\n");
115 dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
188 * @pdev: USB controller to probe
192 * Allocates basic resources for this USB host controller, and
292 device_wakeup_enable(hcd->self.controller);
312 /* may be called with controller, bus, and devices active */
329 dev_dbg(hcd->self.controller, "stopping USB Controller\n");
/linux-master/drivers/media/common/siano/
H A Dsmsir.c50 coredev->ir.controller = 0; /* Todo: vega/nova SPI number */
53 coredev->ir.controller, coredev->ir.timeout);
/linux-master/drivers/peci/
H A Drequest.c136 struct peci_controller *controller = to_peci_controller(device->dev.parent); local
139 mutex_lock(&controller->bus_lock);
140 ret = controller->ops->xfer(controller, device->addr, req);
141 mutex_unlock(&controller->bus_lock);
150 struct peci_controller *controller = to_peci_controller(device->dev.parent); local
161 dev_dbg(&controller->dev, "xfer error: %d\n", ret);
177 dev_dbg(&controller->dev, "request timed out\n");
/linux-master/drivers/mtd/nand/raw/ingenic/
H A Dingenic_nand_drv.c46 struct nand_controller controller; member in struct:ingenic_nfc
68 return container_of(ctrl, struct ingenic_nfc, controller);
152 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller);
173 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller);
186 struct ingenic_nfc *nfc = to_ingenic_nfc(chip->controller);
200 dev_err(nfc->dev, "HW ECC selected, but ECC controller not found\n");
262 struct ingenic_nfc *nfc = to_ingenic_nfc(chip->controller);
316 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller);
401 chip->controller = &nfc->controller;
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/linux-master/drivers/pci/hotplug/
H A Dcpqphp_core.c38 struct controller *cpqhp_ctrl_list; /* = NULL */
116 * @ctrl: controller to use
120 static int init_SERR(struct controller *ctrl)
266 static int ctrl_slot_cleanup(struct controller *ctrl)
370 * @ctrl: struct controller to use
375 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
419 struct controller *ctrl = slot->ctrl;
446 struct controller *ctrl = slot->ctrl;
478 struct controller *ctrl = slot->ctrl;
505 struct controller *ctr
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H A Dibmphp_hpc.c99 static u8 i2c_ctrl_read(struct controller *, void __iomem *, u8);
100 static u8 i2c_ctrl_write(struct controller *, void __iomem *, u8, u8);
107 static int process_changeinlatch(u8, u8, struct controller *);
108 static int hpc_wait_ctlr_notworking(int, struct controller *, void __iomem *, u8 *);
118 static u8 i2c_ctrl_read(struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index)
150 err("this controller type is not supported \n");
226 static u8 i2c_ctrl_write(struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index, u8 cmd)
261 err("this controller type is not supported \n");
325 static u8 isa_ctrl_read(struct controller *ctlr_ptr, u8 offset)
338 static void isa_ctrl_write(struct controller *ctlr_pt
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/linux-master/drivers/clk/actions/
H A Dowl-reset.c10 #include <linux/reset-controller.h>
/linux-master/drivers/xen/
H A Ddbgp.c13 const struct device *ctrlr = hcd_to_bus(hcd)->controller;
/linux-master/drivers/reset/
H A Dreset-sunxi.c16 #include <linux/reset-controller.h>
66 * These are the reset controller we need to initialize early on in
H A Dreset-axs10x.c15 #include <linux/reset-controller.h>
/linux-master/drivers/hid/surface-hid/
H A Dsurface_hid_core.h17 #include <linux/surface_aggregator/controller.h>
/linux-master/drivers/spi/
H A Dspi-rpc-if.c23 struct rpcif *rpc = spi_controller_get_devdata(spi_dev->controller);
82 spi_controller_get_devdata(desc->mem->spi->controller);
95 spi_controller_get_devdata(desc->mem->spi->controller);
116 spi_controller_get_devdata(mem->spi->controller);
H A Dspi-sh-sci.c59 setbits(spi_controller_get_devdata(dev->controller), PIN_SCK, on);
64 setbits(spi_controller_get_devdata(dev->controller), PIN_TXD, on);
69 struct sh_sci_spi *sp = spi_controller_get_devdata(dev->controller);
108 struct sh_sci_spi *sp = spi_controller_get_devdata(dev->controller);
H A Dspi.c51 spi_controller_put(spi->controller);
528 * would make them board-specific. Similarly with SPI controller drivers.
559 * spi_device structure to add it to the SPI controller. If the caller
585 spi->controller = ctlr;
611 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
655 if (spi->controller == new_spi->controller) {
667 if (spi->controller->cleanup)
668 spi->controller->cleanup(spi);
673 struct spi_controller *ctlr = spi->controller;
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/linux-master/drivers/gpu/drm/tiny/
H A Dili9486.c39 * in front of the display controller. This means that 8-bit values have to be
58 * SPI controller, so 16-bit command and parameters need byte swapping
62 spi_bus_lock(spi->controller);
66 spi_bus_unlock(spi->controller);
84 spi_bus_lock(spi->controller);
88 spi_bus_unlock(spi->controller);
/linux-master/drivers/usb/c67x00/
H A Dc67x00-hcd.h7 * based on multiple host controller drivers inside the linux kernel.
116 #define c67x00_hcd_dev(x) (c67x00_hcd_to_hcd(x)->self.controller)
/linux-master/drivers/clk/qcom/
H A Dreset.c9 #include <linux/reset-controller.h>
/linux-master/drivers/mux/
H A Dcore.c32 * struct mux_state - Represents a mux controller state specific to a given
34 * @mux: Pointer to a mux controller.
535 unsigned int controller; local
547 dev_err(dev, "mux controller '%s' not found\n",
572 controller = 0;
583 controller = args.args[0];
599 controller = args.args[0];
602 if (controller >= mux_chip->controllers) {
603 dev_err(dev, "%pOF: bad mux controller %u specified in %pOF\n",
604 np, controller, arg
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/linux-master/drivers/mtd/nand/raw/
H A Dau1550nd.c20 struct nand_controller controller; member in struct:au1550nd_ctx
305 nand_controller_init(&ctx->controller);
306 ctx->controller.ops = &au1550nd_ops;
307 this->controller = &ctx->controller;
/linux-master/drivers/usb/musb/
H A Dmusb_core.c14 * controller driver implementing the "Gadget" API; OTG support is
15 * in the works. These are normal Linux-USB controller drivers which
324 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
366 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
463 * @musb: musb controller driver data
494 dev_err(musb->controller, "%s: could not set host: %02x\n",
514 * @musb: musb controller driver data
541 dev_err(musb->controller, "%s: could not set peripheral: %02x\n",
803 dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller,
1000 dev_err(musb->controller, "Babbl
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