1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SL811HS HCD (Host Controller Driver) for USB. 4 * 5 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) 6 * Copyright (C) 2004-2005 David Brownell 7 * 8 * Periodic scheduling is based on Roman's OHCI code 9 * Copyright (C) 1999 Roman Weissgaerber 10 * 11 * The SL811HS controller handles host side USB (like the SL11H, but with 12 * another register set and SOF generation) as well as peripheral side USB 13 * (like the SL811S). This driver version doesn't implement the Gadget API 14 * for the peripheral role; or OTG (that'd need much external circuitry). 15 * 16 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host" 17 * document (providing significant pieces missing from that spec); plus 18 * the SL811S spec if you want peripheral side info. 19 */ 20 21/* 22 * Status: Passed basic stress testing, works with hubs, mice, keyboards, 23 * and usb-storage. 24 * 25 * TODO: 26 * - usb suspend/resume triggered by sl811 27 * - various issues noted in the code 28 * - performance work; use both register banks; ... 29 * - use urb->iso_frame_desc[] with ISO transfers 30 */ 31 32#undef VERBOSE 33#undef PACKET_TRACE 34 35#include <linux/module.h> 36#include <linux/moduleparam.h> 37#include <linux/kernel.h> 38#include <linux/delay.h> 39#include <linux/ioport.h> 40#include <linux/sched.h> 41#include <linux/slab.h> 42#include <linux/errno.h> 43#include <linux/timer.h> 44#include <linux/list.h> 45#include <linux/interrupt.h> 46#include <linux/usb.h> 47#include <linux/usb/sl811.h> 48#include <linux/usb/hcd.h> 49#include <linux/platform_device.h> 50#include <linux/prefetch.h> 51#include <linux/debugfs.h> 52#include <linux/seq_file.h> 53 54#include <asm/io.h> 55#include <asm/irq.h> 56#include <asm/byteorder.h> 57#include <asm/unaligned.h> 58 59#include "sl811.h" 60 61 62MODULE_DESCRIPTION("SL811HS USB Host Controller Driver"); 63MODULE_LICENSE("GPL"); 64MODULE_ALIAS("platform:sl811-hcd"); 65 66#define DRIVER_VERSION "19 May 2005" 67 68/* for now, use only one transfer register bank */ 69#undef USE_B 70 71// #define QUIRK2 72#define QUIRK3 73 74static const char hcd_name[] = "sl811-hcd"; 75 76/*-------------------------------------------------------------------------*/ 77 78static void port_power(struct sl811 *sl811, int is_on) 79{ 80 struct usb_hcd *hcd = sl811_to_hcd(sl811); 81 82 /* hub is inactive unless the port is powered */ 83 if (is_on) { 84 if (sl811->port1 & USB_PORT_STAT_POWER) 85 return; 86 87 sl811->port1 = USB_PORT_STAT_POWER; 88 sl811->irq_enable = SL11H_INTMASK_INSRMV; 89 } else { 90 sl811->port1 = 0; 91 sl811->irq_enable = 0; 92 hcd->state = HC_STATE_HALT; 93 } 94 sl811->ctrl1 = 0; 95 sl811_write(sl811, SL11H_IRQ_ENABLE, 0); 96 sl811_write(sl811, SL11H_IRQ_STATUS, ~0); 97 98 if (sl811->board && sl811->board->port_power) { 99 /* switch VBUS, at 500mA unless hub power budget gets set */ 100 dev_dbg(hcd->self.controller, "power %s\n", 101 is_on ? "on" : "off"); 102 sl811->board->port_power(hcd->self.controller, is_on); 103 } 104 105 /* reset as thoroughly as we can */ 106 if (sl811->board && sl811->board->reset) 107 sl811->board->reset(hcd->self.controller); 108 else { 109 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0); 110 mdelay(20); 111 } 112 113 sl811_write(sl811, SL11H_IRQ_ENABLE, 0); 114 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 115 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT); 116 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 117 118 // if !is_on, put into lowpower mode now 119} 120 121/*-------------------------------------------------------------------------*/ 122 123/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue, 124 * and may start I/O. Endpoint queues are scanned during completion irq 125 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation. 126 * 127 * Using an external DMA engine to copy a packet at a time could work, 128 * though setup/teardown costs may be too big to make it worthwhile. 129 */ 130 131/* SETUP starts a new control request. Devices are not allowed to 132 * STALL or NAK these; they must cancel any pending control requests. 133 */ 134static void setup_packet( 135 struct sl811 *sl811, 136 struct sl811h_ep *ep, 137 struct urb *urb, 138 u8 bank, 139 u8 control 140) 141{ 142 u8 addr; 143 u8 len; 144 void __iomem *data_reg; 145 146 addr = SL811HS_PACKET_BUF(bank == 0); 147 len = sizeof(struct usb_ctrlrequest); 148 data_reg = sl811->data_reg; 149 sl811_write_buf(sl811, addr, urb->setup_packet, len); 150 151 /* autoincrementing */ 152 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 153 writeb(len, data_reg); 154 writeb(SL_SETUP /* | ep->epnum */, data_reg); 155 writeb(usb_pipedevice(urb->pipe), data_reg); 156 157 /* always OUT/data0 */ 158 sl811_write(sl811, bank + SL11H_HOSTCTLREG, 159 control | SL11H_HCTLMASK_OUT); 160 ep->length = 0; 161 PACKET("SETUP qh%p\n", ep); 162} 163 164/* STATUS finishes control requests, often after IN or OUT data packets */ 165static void status_packet( 166 struct sl811 *sl811, 167 struct sl811h_ep *ep, 168 struct urb *urb, 169 u8 bank, 170 u8 control 171) 172{ 173 int do_out; 174 void __iomem *data_reg; 175 176 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe); 177 data_reg = sl811->data_reg; 178 179 /* autoincrementing */ 180 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); 181 writeb(0, data_reg); 182 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg); 183 writeb(usb_pipedevice(urb->pipe), data_reg); 184 185 /* always data1; sometimes IN */ 186 control |= SL11H_HCTLMASK_TOGGLE; 187 if (do_out) 188 control |= SL11H_HCTLMASK_OUT; 189 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); 190 ep->length = 0; 191 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "", 192 do_out ? "out" : "in", ep); 193} 194 195/* IN packets can be used with any type of endpoint. here we just 196 * start the transfer, data from the peripheral may arrive later. 197 * urb->iso_frame_desc is currently ignored here... 198 */ 199static void in_packet( 200 struct sl811 *sl811, 201 struct sl811h_ep *ep, 202 struct urb *urb, 203 u8 bank, 204 u8 control 205) 206{ 207 u8 addr; 208 u8 len; 209 void __iomem *data_reg; 210 211 /* avoid losing data on overflow */ 212 len = ep->maxpacket; 213 addr = SL811HS_PACKET_BUF(bank == 0); 214 if (!(control & SL11H_HCTLMASK_ISOCH) 215 && usb_gettoggle(urb->dev, ep->epnum, 0)) 216 control |= SL11H_HCTLMASK_TOGGLE; 217 data_reg = sl811->data_reg; 218 219 /* autoincrementing */ 220 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 221 writeb(len, data_reg); 222 writeb(SL_IN | ep->epnum, data_reg); 223 writeb(usb_pipedevice(urb->pipe), data_reg); 224 225 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); 226 ep->length = min_t(u32, len, 227 urb->transfer_buffer_length - urb->actual_length); 228 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", 229 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len); 230} 231 232/* OUT packets can be used with any type of endpoint. 233 * urb->iso_frame_desc is currently ignored here... 234 */ 235static void out_packet( 236 struct sl811 *sl811, 237 struct sl811h_ep *ep, 238 struct urb *urb, 239 u8 bank, 240 u8 control 241) 242{ 243 void *buf; 244 u8 addr; 245 u8 len; 246 void __iomem *data_reg; 247 248 buf = urb->transfer_buffer + urb->actual_length; 249 prefetch(buf); 250 251 len = min_t(u32, ep->maxpacket, 252 urb->transfer_buffer_length - urb->actual_length); 253 254 if (!(control & SL11H_HCTLMASK_ISOCH) 255 && usb_gettoggle(urb->dev, ep->epnum, 1)) 256 control |= SL11H_HCTLMASK_TOGGLE; 257 addr = SL811HS_PACKET_BUF(bank == 0); 258 data_reg = sl811->data_reg; 259 260 sl811_write_buf(sl811, addr, buf, len); 261 262 /* autoincrementing */ 263 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); 264 writeb(len, data_reg); 265 writeb(SL_OUT | ep->epnum, data_reg); 266 writeb(usb_pipedevice(urb->pipe), data_reg); 267 268 sl811_write(sl811, bank + SL11H_HOSTCTLREG, 269 control | SL11H_HCTLMASK_OUT); 270 ep->length = len; 271 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", 272 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len); 273} 274 275/*-------------------------------------------------------------------------*/ 276 277/* caller updates on-chip enables later */ 278 279static inline void sofirq_on(struct sl811 *sl811) 280{ 281 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR) 282 return; 283 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq on\n"); 284 sl811->irq_enable |= SL11H_INTMASK_SOFINTR; 285} 286 287static inline void sofirq_off(struct sl811 *sl811) 288{ 289 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR)) 290 return; 291 dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq off\n"); 292 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR; 293} 294 295/*-------------------------------------------------------------------------*/ 296 297/* pick the next endpoint for a transaction, and issue it. 298 * frames start with periodic transfers (after whatever is pending 299 * from the previous frame), and the rest of the time is async 300 * transfers, scheduled round-robin. 301 */ 302static struct sl811h_ep *start(struct sl811 *sl811, u8 bank) 303{ 304 struct sl811h_ep *ep; 305 struct urb *urb; 306 int fclock; 307 u8 control; 308 309 /* use endpoint at schedule head */ 310 if (sl811->next_periodic) { 311 ep = sl811->next_periodic; 312 sl811->next_periodic = ep->next; 313 } else { 314 if (sl811->next_async) 315 ep = sl811->next_async; 316 else if (!list_empty(&sl811->async)) 317 ep = container_of(sl811->async.next, 318 struct sl811h_ep, schedule); 319 else { 320 /* could set up the first fullspeed periodic 321 * transfer for the next frame ... 322 */ 323 return NULL; 324 } 325 326#ifdef USE_B 327 if ((bank && sl811->active_b == ep) || sl811->active_a == ep) 328 return NULL; 329#endif 330 331 if (ep->schedule.next == &sl811->async) 332 sl811->next_async = NULL; 333 else 334 sl811->next_async = container_of(ep->schedule.next, 335 struct sl811h_ep, schedule); 336 } 337 338 if (unlikely(list_empty(&ep->hep->urb_list))) { 339 dev_dbg(sl811_to_hcd(sl811)->self.controller, 340 "empty %p queue?\n", ep); 341 return NULL; 342 } 343 344 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); 345 control = ep->defctrl; 346 347 /* if this frame doesn't have enough time left to transfer this 348 * packet, wait till the next frame. too-simple algorithm... 349 */ 350 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6; 351 fclock -= 100; /* setup takes not much time */ 352 if (urb->dev->speed == USB_SPEED_LOW) { 353 if (control & SL11H_HCTLMASK_PREAMBLE) { 354 /* also note erratum 1: some hubs won't work */ 355 fclock -= 800; 356 } 357 fclock -= ep->maxpacket << 8; 358 359 /* erratum 2: AFTERSOF only works for fullspeed */ 360 if (fclock < 0) { 361 if (ep->period) 362 sl811->stat_overrun++; 363 sofirq_on(sl811); 364 return NULL; 365 } 366 } else { 367 fclock -= 12000 / 19; /* 19 64byte packets/msec */ 368 if (fclock < 0) { 369 if (ep->period) 370 sl811->stat_overrun++; 371 control |= SL11H_HCTLMASK_AFTERSOF; 372 373 /* throttle bulk/control irq noise */ 374 } else if (ep->nak_count) 375 control |= SL11H_HCTLMASK_AFTERSOF; 376 } 377 378 379 switch (ep->nextpid) { 380 case USB_PID_IN: 381 in_packet(sl811, ep, urb, bank, control); 382 break; 383 case USB_PID_OUT: 384 out_packet(sl811, ep, urb, bank, control); 385 break; 386 case USB_PID_SETUP: 387 setup_packet(sl811, ep, urb, bank, control); 388 break; 389 case USB_PID_ACK: /* for control status */ 390 status_packet(sl811, ep, urb, bank, control); 391 break; 392 default: 393 dev_dbg(sl811_to_hcd(sl811)->self.controller, 394 "bad ep%p pid %02x\n", ep, ep->nextpid); 395 ep = NULL; 396 } 397 return ep; 398} 399 400#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2) 401 402static inline void start_transfer(struct sl811 *sl811) 403{ 404 if (sl811->port1 & USB_PORT_STAT_SUSPEND) 405 return; 406 if (sl811->active_a == NULL) { 407 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF)); 408 if (sl811->active_a != NULL) 409 sl811->jiffies_a = jiffies + MIN_JIFFIES; 410 } 411#ifdef USE_B 412 if (sl811->active_b == NULL) { 413 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF)); 414 if (sl811->active_b != NULL) 415 sl811->jiffies_b = jiffies + MIN_JIFFIES; 416 } 417#endif 418} 419 420static void finish_request( 421 struct sl811 *sl811, 422 struct sl811h_ep *ep, 423 struct urb *urb, 424 int status 425) __releases(sl811->lock) __acquires(sl811->lock) 426{ 427 unsigned i; 428 429 if (usb_pipecontrol(urb->pipe)) 430 ep->nextpid = USB_PID_SETUP; 431 432 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb); 433 spin_unlock(&sl811->lock); 434 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status); 435 spin_lock(&sl811->lock); 436 437 /* leave active endpoints in the schedule */ 438 if (!list_empty(&ep->hep->urb_list)) 439 return; 440 441 /* async deschedule? */ 442 if (!list_empty(&ep->schedule)) { 443 list_del_init(&ep->schedule); 444 if (ep == sl811->next_async) 445 sl811->next_async = NULL; 446 return; 447 } 448 449 /* periodic deschedule */ 450 dev_dbg(sl811_to_hcd(sl811)->self.controller, 451 "deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); 452 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { 453 struct sl811h_ep *temp; 454 struct sl811h_ep **prev = &sl811->periodic[i]; 455 456 while (*prev && ((temp = *prev) != ep)) 457 prev = &temp->next; 458 if (*prev) 459 *prev = ep->next; 460 sl811->load[i] -= ep->load; 461 } 462 ep->branch = PERIODIC_SIZE; 463 sl811->periodic_count--; 464 sl811_to_hcd(sl811)->self.bandwidth_allocated 465 -= ep->load / ep->period; 466 if (ep == sl811->next_periodic) 467 sl811->next_periodic = ep->next; 468 469 /* we might turn SOFs back on again for the async schedule */ 470 if (sl811->periodic_count == 0) 471 sofirq_off(sl811); 472} 473 474static void 475done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank) 476{ 477 u8 status; 478 struct urb *urb; 479 int urbstat = -EINPROGRESS; 480 481 if (unlikely(!ep)) 482 return; 483 484 status = sl811_read(sl811, bank + SL11H_PKTSTATREG); 485 486 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); 487 488 /* we can safely ignore NAKs */ 489 if (status & SL11H_STATMASK_NAK) { 490 // PACKET("...NAK_%02x qh%p\n", bank, ep); 491 if (!ep->period) 492 ep->nak_count++; 493 ep->error_count = 0; 494 495 /* ACK advances transfer, toggle, and maybe queue */ 496 } else if (status & SL11H_STATMASK_ACK) { 497 struct usb_device *udev = urb->dev; 498 int len; 499 unsigned char *buf; 500 501 /* urb->iso_frame_desc is currently ignored here... */ 502 503 ep->nak_count = ep->error_count = 0; 504 switch (ep->nextpid) { 505 case USB_PID_OUT: 506 // PACKET("...ACK/out_%02x qh%p\n", bank, ep); 507 urb->actual_length += ep->length; 508 usb_dotoggle(udev, ep->epnum, 1); 509 if (urb->actual_length 510 == urb->transfer_buffer_length) { 511 if (usb_pipecontrol(urb->pipe)) 512 ep->nextpid = USB_PID_ACK; 513 514 /* some bulk protocols terminate OUT transfers 515 * by a short packet, using ZLPs not padding. 516 */ 517 else if (ep->length < ep->maxpacket 518 || !(urb->transfer_flags 519 & URB_ZERO_PACKET)) 520 urbstat = 0; 521 } 522 break; 523 case USB_PID_IN: 524 // PACKET("...ACK/in_%02x qh%p\n", bank, ep); 525 buf = urb->transfer_buffer + urb->actual_length; 526 prefetchw(buf); 527 len = ep->maxpacket - sl811_read(sl811, 528 bank + SL11H_XFERCNTREG); 529 if (len > ep->length) { 530 len = ep->length; 531 urbstat = -EOVERFLOW; 532 } 533 urb->actual_length += len; 534 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0), 535 buf, len); 536 usb_dotoggle(udev, ep->epnum, 0); 537 if (urbstat == -EINPROGRESS && 538 (len < ep->maxpacket || 539 urb->actual_length == 540 urb->transfer_buffer_length)) { 541 if (usb_pipecontrol(urb->pipe)) 542 ep->nextpid = USB_PID_ACK; 543 else 544 urbstat = 0; 545 } 546 break; 547 case USB_PID_SETUP: 548 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep); 549 if (urb->transfer_buffer_length == urb->actual_length) 550 ep->nextpid = USB_PID_ACK; 551 else if (usb_pipeout(urb->pipe)) { 552 usb_settoggle(udev, 0, 1, 1); 553 ep->nextpid = USB_PID_OUT; 554 } else { 555 usb_settoggle(udev, 0, 0, 1); 556 ep->nextpid = USB_PID_IN; 557 } 558 break; 559 case USB_PID_ACK: 560 // PACKET("...ACK/status_%02x qh%p\n", bank, ep); 561 urbstat = 0; 562 break; 563 } 564 565 /* STALL stops all transfers */ 566 } else if (status & SL11H_STATMASK_STALL) { 567 PACKET("...STALL_%02x qh%p\n", bank, ep); 568 ep->nak_count = ep->error_count = 0; 569 urbstat = -EPIPE; 570 571 /* error? retry, until "3 strikes" */ 572 } else if (++ep->error_count >= 3) { 573 if (status & SL11H_STATMASK_TMOUT) 574 urbstat = -ETIME; 575 else if (status & SL11H_STATMASK_OVF) 576 urbstat = -EOVERFLOW; 577 else 578 urbstat = -EPROTO; 579 ep->error_count = 0; 580 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n", 581 bank, status, ep, urbstat); 582 } 583 584 if (urbstat != -EINPROGRESS || urb->unlinked) 585 finish_request(sl811, ep, urb, urbstat); 586} 587 588#ifdef QUIRK2 589static inline u8 checkdone(struct sl811 *sl811) 590{ 591 u8 ctl; 592 u8 irqstat = 0; 593 594 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) { 595 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)); 596 if (ctl & SL11H_HCTLMASK_ARM) 597 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); 598 dev_dbg(sl811_to_hcd(sl811)->self.controller, 599 "%s DONE_A: ctrl %02x sts %02x\n", 600 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", 601 ctl, 602 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); 603 irqstat |= SL11H_INTMASK_DONE_A; 604 } 605#ifdef USE_B 606 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) { 607 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)); 608 if (ctl & SL11H_HCTLMASK_ARM) 609 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); 610 dev_dbg(sl811_to_hcd(sl811)->self.controller, 611 "%s DONE_B: ctrl %02x sts %02x\n", 612 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", 613 ctl, 614 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); 615 irqstat |= SL11H_INTMASK_DONE_A; 616 } 617#endif 618 return irqstat; 619} 620#endif 621 622static irqreturn_t sl811h_irq(struct usb_hcd *hcd) 623{ 624 struct sl811 *sl811 = hcd_to_sl811(hcd); 625 u8 irqstat; 626 irqreturn_t ret = IRQ_NONE; 627 unsigned retries = 5; 628 629 spin_lock(&sl811->lock); 630 631retry: 632 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP; 633 if (irqstat) { 634 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); 635 irqstat &= sl811->irq_enable; 636 } 637 638#ifdef QUIRK2 639 /* this may no longer be necessary ... */ 640 if (irqstat == 0) { 641 irqstat = checkdone(sl811); 642 if (irqstat) 643 sl811->stat_lost++; 644 } 645#endif 646 647 /* USB packets, not necessarily handled in the order they're 648 * issued ... that's fine if they're different endpoints. 649 */ 650 if (irqstat & SL11H_INTMASK_DONE_A) { 651 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF)); 652 sl811->active_a = NULL; 653 sl811->stat_a++; 654 } 655#ifdef USE_B 656 if (irqstat & SL11H_INTMASK_DONE_B) { 657 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF)); 658 sl811->active_b = NULL; 659 sl811->stat_b++; 660 } 661#endif 662 if (irqstat & SL11H_INTMASK_SOFINTR) { 663 unsigned index; 664 665 index = sl811->frame++ % (PERIODIC_SIZE - 1); 666 sl811->stat_sof++; 667 668 /* be graceful about almost-inevitable periodic schedule 669 * overruns: continue the previous frame's transfers iff 670 * this one has nothing scheduled. 671 */ 672 if (sl811->next_periodic) { 673 // dev_err(hcd->self.controller, "overrun to slot %d\n", index); 674 sl811->stat_overrun++; 675 } 676 if (sl811->periodic[index]) 677 sl811->next_periodic = sl811->periodic[index]; 678 } 679 680 /* hub_wq manages debouncing and wakeup */ 681 if (irqstat & SL11H_INTMASK_INSRMV) { 682 sl811->stat_insrmv++; 683 684 /* most stats are reset for each VBUS session */ 685 sl811->stat_wake = 0; 686 sl811->stat_sof = 0; 687 sl811->stat_a = 0; 688 sl811->stat_b = 0; 689 sl811->stat_lost = 0; 690 691 sl811->ctrl1 = 0; 692 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 693 694 sl811->irq_enable = SL11H_INTMASK_INSRMV; 695 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 696 697 /* usbcore nukes other pending transactions on disconnect */ 698 if (sl811->active_a) { 699 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); 700 finish_request(sl811, sl811->active_a, 701 container_of(sl811->active_a 702 ->hep->urb_list.next, 703 struct urb, urb_list), 704 -ESHUTDOWN); 705 sl811->active_a = NULL; 706 } 707#ifdef USE_B 708 if (sl811->active_b) { 709 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); 710 finish_request(sl811, sl811->active_b, 711 container_of(sl811->active_b 712 ->hep->urb_list.next, 713 struct urb, urb_list), 714 NULL, -ESHUTDOWN); 715 sl811->active_b = NULL; 716 } 717#endif 718 719 /* port status seems weird until after reset, so 720 * force the reset and make hub_wq clean up later. 721 */ 722 if (irqstat & SL11H_INTMASK_RD) 723 sl811->port1 &= ~USB_PORT_STAT_CONNECTION; 724 else 725 sl811->port1 |= USB_PORT_STAT_CONNECTION; 726 727 sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16; 728 729 } else if (irqstat & SL11H_INTMASK_RD) { 730 if (sl811->port1 & USB_PORT_STAT_SUSPEND) { 731 dev_dbg(hcd->self.controller, "wakeup\n"); 732 sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16; 733 sl811->stat_wake++; 734 } else 735 irqstat &= ~SL11H_INTMASK_RD; 736 } 737 738 if (irqstat) { 739 if (sl811->port1 & USB_PORT_STAT_ENABLE) 740 start_transfer(sl811); 741 ret = IRQ_HANDLED; 742 if (retries--) 743 goto retry; 744 } 745 746 if (sl811->periodic_count == 0 && list_empty(&sl811->async)) 747 sofirq_off(sl811); 748 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 749 750 spin_unlock(&sl811->lock); 751 752 return ret; 753} 754 755/*-------------------------------------------------------------------------*/ 756 757/* usb 1.1 says max 90% of a frame is available for periodic transfers. 758 * this driver doesn't promise that much since it's got to handle an 759 * IRQ per packet; irq handling latencies also use up that time. 760 * 761 * NOTE: the periodic schedule is a sparse tree, with the load for 762 * each branch minimized. see fig 3.5 in the OHCI spec for example. 763 */ 764#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */ 765 766static int balance(struct sl811 *sl811, u16 period, u16 load) 767{ 768 int i, branch = -ENOSPC; 769 770 /* search for the least loaded schedule branch of that period 771 * which has enough bandwidth left unreserved. 772 */ 773 for (i = 0; i < period ; i++) { 774 if (branch < 0 || sl811->load[branch] > sl811->load[i]) { 775 int j; 776 777 for (j = i; j < PERIODIC_SIZE; j += period) { 778 if ((sl811->load[j] + load) 779 > MAX_PERIODIC_LOAD) 780 break; 781 } 782 if (j < PERIODIC_SIZE) 783 continue; 784 branch = i; 785 } 786 } 787 return branch; 788} 789 790/*-------------------------------------------------------------------------*/ 791 792static int sl811h_urb_enqueue( 793 struct usb_hcd *hcd, 794 struct urb *urb, 795 gfp_t mem_flags 796) { 797 struct sl811 *sl811 = hcd_to_sl811(hcd); 798 struct usb_device *udev = urb->dev; 799 unsigned int pipe = urb->pipe; 800 int is_out = !usb_pipein(pipe); 801 int type = usb_pipetype(pipe); 802 int epnum = usb_pipeendpoint(pipe); 803 struct sl811h_ep *ep = NULL; 804 unsigned long flags; 805 int i; 806 int retval; 807 struct usb_host_endpoint *hep = urb->ep; 808 809#ifndef CONFIG_USB_SL811_HCD_ISO 810 if (type == PIPE_ISOCHRONOUS) 811 return -ENOSPC; 812#endif 813 814 /* avoid all allocations within spinlocks */ 815 if (!hep->hcpriv) { 816 ep = kzalloc(sizeof *ep, mem_flags); 817 if (ep == NULL) 818 return -ENOMEM; 819 } 820 821 spin_lock_irqsave(&sl811->lock, flags); 822 823 /* don't submit to a dead or disabled port */ 824 if (!(sl811->port1 & USB_PORT_STAT_ENABLE) 825 || !HC_IS_RUNNING(hcd->state)) { 826 retval = -ENODEV; 827 kfree(ep); 828 goto fail_not_linked; 829 } 830 retval = usb_hcd_link_urb_to_ep(hcd, urb); 831 if (retval) { 832 kfree(ep); 833 goto fail_not_linked; 834 } 835 836 if (hep->hcpriv) { 837 kfree(ep); 838 ep = hep->hcpriv; 839 } else if (!ep) { 840 retval = -ENOMEM; 841 goto fail; 842 843 } else { 844 INIT_LIST_HEAD(&ep->schedule); 845 ep->udev = udev; 846 ep->epnum = epnum; 847 ep->maxpacket = usb_maxpacket(udev, urb->pipe); 848 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; 849 usb_settoggle(udev, epnum, is_out, 0); 850 851 if (type == PIPE_CONTROL) 852 ep->nextpid = USB_PID_SETUP; 853 else if (is_out) 854 ep->nextpid = USB_PID_OUT; 855 else 856 ep->nextpid = USB_PID_IN; 857 858 if (ep->maxpacket > H_MAXPACKET) { 859 /* iso packets up to 240 bytes could work... */ 860 dev_dbg(hcd->self.controller, 861 "dev %d ep%d maxpacket %d\n", udev->devnum, 862 epnum, ep->maxpacket); 863 retval = -EINVAL; 864 kfree(ep); 865 goto fail; 866 } 867 868 if (udev->speed == USB_SPEED_LOW) { 869 /* send preamble for external hub? */ 870 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD)) 871 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE; 872 } 873 switch (type) { 874 case PIPE_ISOCHRONOUS: 875 case PIPE_INTERRUPT: 876 if (urb->interval > PERIODIC_SIZE) 877 urb->interval = PERIODIC_SIZE; 878 ep->period = urb->interval; 879 ep->branch = PERIODIC_SIZE; 880 if (type == PIPE_ISOCHRONOUS) 881 ep->defctrl |= SL11H_HCTLMASK_ISOCH; 882 ep->load = usb_calc_bus_time(udev->speed, !is_out, 883 type == PIPE_ISOCHRONOUS, 884 usb_maxpacket(udev, pipe)) 885 / 1000; 886 break; 887 } 888 889 ep->hep = hep; 890 hep->hcpriv = ep; 891 } 892 893 /* maybe put endpoint into schedule */ 894 switch (type) { 895 case PIPE_CONTROL: 896 case PIPE_BULK: 897 if (list_empty(&ep->schedule)) 898 list_add_tail(&ep->schedule, &sl811->async); 899 break; 900 case PIPE_ISOCHRONOUS: 901 case PIPE_INTERRUPT: 902 urb->interval = ep->period; 903 if (ep->branch < PERIODIC_SIZE) { 904 /* NOTE: the phase is correct here, but the value 905 * needs offsetting by the transfer queue depth. 906 * All current drivers ignore start_frame, so this 907 * is unlikely to ever matter... 908 */ 909 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) 910 + ep->branch; 911 break; 912 } 913 914 retval = balance(sl811, ep->period, ep->load); 915 if (retval < 0) 916 goto fail; 917 ep->branch = retval; 918 retval = 0; 919 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) 920 + ep->branch; 921 922 /* sort each schedule branch by period (slow before fast) 923 * to share the faster parts of the tree without needing 924 * dummy/placeholder nodes 925 */ 926 dev_dbg(hcd->self.controller, "schedule qh%d/%p branch %d\n", 927 ep->period, ep, ep->branch); 928 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { 929 struct sl811h_ep **prev = &sl811->periodic[i]; 930 struct sl811h_ep *here = *prev; 931 932 while (here && ep != here) { 933 if (ep->period > here->period) 934 break; 935 prev = &here->next; 936 here = *prev; 937 } 938 if (ep != here) { 939 ep->next = here; 940 *prev = ep; 941 } 942 sl811->load[i] += ep->load; 943 } 944 sl811->periodic_count++; 945 hcd->self.bandwidth_allocated += ep->load / ep->period; 946 sofirq_on(sl811); 947 } 948 949 urb->hcpriv = hep; 950 start_transfer(sl811); 951 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 952fail: 953 if (retval) 954 usb_hcd_unlink_urb_from_ep(hcd, urb); 955fail_not_linked: 956 spin_unlock_irqrestore(&sl811->lock, flags); 957 return retval; 958} 959 960static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 961{ 962 struct sl811 *sl811 = hcd_to_sl811(hcd); 963 struct usb_host_endpoint *hep; 964 unsigned long flags; 965 struct sl811h_ep *ep; 966 int retval; 967 968 spin_lock_irqsave(&sl811->lock, flags); 969 retval = usb_hcd_check_unlink_urb(hcd, urb, status); 970 if (retval) 971 goto fail; 972 973 hep = urb->hcpriv; 974 ep = hep->hcpriv; 975 if (ep) { 976 /* finish right away if this urb can't be active ... 977 * note that some drivers wrongly expect delays 978 */ 979 if (ep->hep->urb_list.next != &urb->urb_list) { 980 /* not front of queue? never active */ 981 982 /* for active transfers, we expect an IRQ */ 983 } else if (sl811->active_a == ep) { 984 if (time_before_eq(sl811->jiffies_a, jiffies)) { 985 /* happens a lot with lowspeed?? */ 986 dev_dbg(hcd->self.controller, 987 "giveup on DONE_A: ctrl %02x sts %02x\n", 988 sl811_read(sl811, 989 SL811_EP_A(SL11H_HOSTCTLREG)), 990 sl811_read(sl811, 991 SL811_EP_A(SL11H_PKTSTATREG))); 992 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 993 0); 994 sl811->active_a = NULL; 995 } else 996 urb = NULL; 997#ifdef USE_B 998 } else if (sl811->active_b == ep) { 999 if (time_before_eq(sl811->jiffies_a, jiffies)) { 1000 /* happens a lot with lowspeed?? */ 1001 dev_dbg(hcd->self.controller, 1002 "giveup on DONE_B: ctrl %02x sts %02x\n", 1003 sl811_read(sl811, 1004 SL811_EP_B(SL11H_HOSTCTLREG)), 1005 sl811_read(sl811, 1006 SL811_EP_B(SL11H_PKTSTATREG))); 1007 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 1008 0); 1009 sl811->active_b = NULL; 1010 } else 1011 urb = NULL; 1012#endif 1013 } else { 1014 /* front of queue for inactive endpoint */ 1015 } 1016 1017 if (urb) 1018 finish_request(sl811, ep, urb, 0); 1019 else 1020 dev_dbg(sl811_to_hcd(sl811)->self.controller, 1021 "dequeue, urb %p active %s; wait4irq\n", urb, 1022 (sl811->active_a == ep) ? "A" : "B"); 1023 } else 1024 retval = -EINVAL; 1025 fail: 1026 spin_unlock_irqrestore(&sl811->lock, flags); 1027 return retval; 1028} 1029 1030static void 1031sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) 1032{ 1033 struct sl811h_ep *ep = hep->hcpriv; 1034 1035 if (!ep) 1036 return; 1037 1038 /* assume we'd just wait for the irq */ 1039 if (!list_empty(&hep->urb_list)) 1040 msleep(3); 1041 if (!list_empty(&hep->urb_list)) 1042 dev_warn(hcd->self.controller, "ep %p not empty?\n", ep); 1043 1044 kfree(ep); 1045 hep->hcpriv = NULL; 1046} 1047 1048static int 1049sl811h_get_frame(struct usb_hcd *hcd) 1050{ 1051 struct sl811 *sl811 = hcd_to_sl811(hcd); 1052 1053 /* wrong except while periodic transfers are scheduled; 1054 * never matches the on-the-wire frame; 1055 * subject to overruns. 1056 */ 1057 return sl811->frame; 1058} 1059 1060 1061/*-------------------------------------------------------------------------*/ 1062 1063/* the virtual root hub timer IRQ checks for hub status */ 1064static int 1065sl811h_hub_status_data(struct usb_hcd *hcd, char *buf) 1066{ 1067 struct sl811 *sl811 = hcd_to_sl811(hcd); 1068#ifdef QUIRK3 1069 unsigned long flags; 1070 1071 /* non-SMP HACK: use root hub timer as i/o watchdog 1072 * this seems essential when SOF IRQs aren't in use... 1073 */ 1074 local_irq_save(flags); 1075 if (!timer_pending(&sl811->timer)) { 1076 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE) 1077 sl811->stat_lost++; 1078 } 1079 local_irq_restore(flags); 1080#endif 1081 1082 if (!(sl811->port1 & (0xffff << 16))) 1083 return 0; 1084 1085 /* tell hub_wq port 1 changed */ 1086 *buf = (1 << 1); 1087 return 1; 1088} 1089 1090static void 1091sl811h_hub_descriptor ( 1092 struct sl811 *sl811, 1093 struct usb_hub_descriptor *desc 1094) { 1095 u16 temp = 0; 1096 1097 desc->bDescriptorType = USB_DT_HUB; 1098 desc->bHubContrCurrent = 0; 1099 1100 desc->bNbrPorts = 1; 1101 desc->bDescLength = 9; 1102 1103 /* per-port power switching (gang of one!), or none */ 1104 desc->bPwrOn2PwrGood = 0; 1105 if (sl811->board && sl811->board->port_power) { 1106 desc->bPwrOn2PwrGood = sl811->board->potpg; 1107 if (!desc->bPwrOn2PwrGood) 1108 desc->bPwrOn2PwrGood = 10; 1109 temp = HUB_CHAR_INDV_PORT_LPSM; 1110 } else 1111 temp = HUB_CHAR_NO_LPSM; 1112 1113 /* no overcurrent errors detection/handling */ 1114 temp |= HUB_CHAR_NO_OCPM; 1115 1116 desc->wHubCharacteristics = cpu_to_le16(temp); 1117 1118 /* ports removable, and legacy PortPwrCtrlMask */ 1119 desc->u.hs.DeviceRemovable[0] = 0 << 1; 1120 desc->u.hs.DeviceRemovable[1] = ~0; 1121} 1122 1123static void 1124sl811h_timer(struct timer_list *t) 1125{ 1126 struct sl811 *sl811 = from_timer(sl811, t, timer); 1127 unsigned long flags; 1128 u8 irqstat; 1129 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE; 1130 const u32 mask = USB_PORT_STAT_CONNECTION 1131 | USB_PORT_STAT_ENABLE 1132 | USB_PORT_STAT_LOW_SPEED; 1133 1134 spin_lock_irqsave(&sl811->lock, flags); 1135 1136 /* stop special signaling */ 1137 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; 1138 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1139 udelay(3); 1140 1141 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS); 1142 1143 switch (signaling) { 1144 case SL11H_CTL1MASK_SE0: 1145 dev_dbg(sl811_to_hcd(sl811)->self.controller, "end reset\n"); 1146 sl811->port1 = (USB_PORT_STAT_C_RESET << 16) 1147 | USB_PORT_STAT_POWER; 1148 sl811->ctrl1 = 0; 1149 /* don't wrongly ack RD */ 1150 if (irqstat & SL11H_INTMASK_INSRMV) 1151 irqstat &= ~SL11H_INTMASK_RD; 1152 break; 1153 case SL11H_CTL1MASK_K: 1154 dev_dbg(sl811_to_hcd(sl811)->self.controller, "end resume\n"); 1155 sl811->port1 &= ~USB_PORT_STAT_SUSPEND; 1156 break; 1157 default: 1158 dev_dbg(sl811_to_hcd(sl811)->self.controller, 1159 "odd timer signaling: %02x\n", signaling); 1160 break; 1161 } 1162 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); 1163 1164 if (irqstat & SL11H_INTMASK_RD) { 1165 /* usbcore nukes all pending transactions on disconnect */ 1166 if (sl811->port1 & USB_PORT_STAT_CONNECTION) 1167 sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16) 1168 | (USB_PORT_STAT_C_ENABLE << 16); 1169 sl811->port1 &= ~mask; 1170 sl811->irq_enable = SL11H_INTMASK_INSRMV; 1171 } else { 1172 sl811->port1 |= mask; 1173 if (irqstat & SL11H_INTMASK_DP) 1174 sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED; 1175 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD; 1176 } 1177 1178 if (sl811->port1 & USB_PORT_STAT_CONNECTION) { 1179 u8 ctrl2 = SL811HS_CTL2_INIT; 1180 1181 sl811->irq_enable |= SL11H_INTMASK_DONE_A; 1182#ifdef USE_B 1183 sl811->irq_enable |= SL11H_INTMASK_DONE_B; 1184#endif 1185 if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) { 1186 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; 1187 ctrl2 |= SL811HS_CTL2MASK_DSWAP; 1188 } 1189 1190 /* start SOFs flowing, kickstarting with A registers */ 1191 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; 1192 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0); 1193 sl811_write(sl811, SL811HS_CTLREG2, ctrl2); 1194 1195 /* autoincrementing */ 1196 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0); 1197 writeb(SL_SOF, sl811->data_reg); 1198 writeb(0, sl811->data_reg); 1199 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 1200 SL11H_HCTLMASK_ARM); 1201 1202 /* hub_wq provides debounce delay */ 1203 } else { 1204 sl811->ctrl1 = 0; 1205 } 1206 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1207 1208 /* reenable irqs */ 1209 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); 1210 spin_unlock_irqrestore(&sl811->lock, flags); 1211} 1212 1213static int 1214sl811h_hub_control( 1215 struct usb_hcd *hcd, 1216 u16 typeReq, 1217 u16 wValue, 1218 u16 wIndex, 1219 char *buf, 1220 u16 wLength 1221) { 1222 struct sl811 *sl811 = hcd_to_sl811(hcd); 1223 int retval = 0; 1224 unsigned long flags; 1225 1226 spin_lock_irqsave(&sl811->lock, flags); 1227 1228 switch (typeReq) { 1229 case ClearHubFeature: 1230 case SetHubFeature: 1231 switch (wValue) { 1232 case C_HUB_OVER_CURRENT: 1233 case C_HUB_LOCAL_POWER: 1234 break; 1235 default: 1236 goto error; 1237 } 1238 break; 1239 case ClearPortFeature: 1240 if (wIndex != 1 || wLength != 0) 1241 goto error; 1242 1243 switch (wValue) { 1244 case USB_PORT_FEAT_ENABLE: 1245 sl811->port1 &= USB_PORT_STAT_POWER; 1246 sl811->ctrl1 = 0; 1247 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1248 sl811->irq_enable = SL11H_INTMASK_INSRMV; 1249 sl811_write(sl811, SL11H_IRQ_ENABLE, 1250 sl811->irq_enable); 1251 break; 1252 case USB_PORT_FEAT_SUSPEND: 1253 if (!(sl811->port1 & USB_PORT_STAT_SUSPEND)) 1254 break; 1255 1256 /* 20 msec of resume/K signaling, other irqs blocked */ 1257 dev_dbg(hcd->self.controller, "start resume...\n"); 1258 sl811->irq_enable = 0; 1259 sl811_write(sl811, SL11H_IRQ_ENABLE, 1260 sl811->irq_enable); 1261 sl811->ctrl1 |= SL11H_CTL1MASK_K; 1262 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1263 1264 mod_timer(&sl811->timer, jiffies 1265 + msecs_to_jiffies(USB_RESUME_TIMEOUT)); 1266 break; 1267 case USB_PORT_FEAT_POWER: 1268 port_power(sl811, 0); 1269 break; 1270 case USB_PORT_FEAT_C_ENABLE: 1271 case USB_PORT_FEAT_C_SUSPEND: 1272 case USB_PORT_FEAT_C_CONNECTION: 1273 case USB_PORT_FEAT_C_OVER_CURRENT: 1274 case USB_PORT_FEAT_C_RESET: 1275 break; 1276 default: 1277 goto error; 1278 } 1279 sl811->port1 &= ~(1 << wValue); 1280 break; 1281 case GetHubDescriptor: 1282 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf); 1283 break; 1284 case GetHubStatus: 1285 put_unaligned_le32(0, buf); 1286 break; 1287 case GetPortStatus: 1288 if (wIndex != 1) 1289 goto error; 1290 put_unaligned_le32(sl811->port1, buf); 1291 1292 if (__is_defined(VERBOSE) || 1293 *(u16*)(buf+2)) /* only if wPortChange is interesting */ 1294 dev_dbg(hcd->self.controller, "GetPortStatus %08x\n", 1295 sl811->port1); 1296 break; 1297 case SetPortFeature: 1298 if (wIndex != 1 || wLength != 0) 1299 goto error; 1300 switch (wValue) { 1301 case USB_PORT_FEAT_SUSPEND: 1302 if (sl811->port1 & USB_PORT_STAT_RESET) 1303 goto error; 1304 if (!(sl811->port1 & USB_PORT_STAT_ENABLE)) 1305 goto error; 1306 1307 dev_dbg(hcd->self.controller,"suspend...\n"); 1308 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; 1309 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1310 break; 1311 case USB_PORT_FEAT_POWER: 1312 port_power(sl811, 1); 1313 break; 1314 case USB_PORT_FEAT_RESET: 1315 if (sl811->port1 & USB_PORT_STAT_SUSPEND) 1316 goto error; 1317 if (!(sl811->port1 & USB_PORT_STAT_POWER)) 1318 break; 1319 1320 /* 50 msec of reset/SE0 signaling, irqs blocked */ 1321 sl811->irq_enable = 0; 1322 sl811_write(sl811, SL11H_IRQ_ENABLE, 1323 sl811->irq_enable); 1324 sl811->ctrl1 = SL11H_CTL1MASK_SE0; 1325 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); 1326 sl811->port1 |= USB_PORT_STAT_RESET; 1327 mod_timer(&sl811->timer, jiffies 1328 + msecs_to_jiffies(50)); 1329 break; 1330 default: 1331 goto error; 1332 } 1333 sl811->port1 |= 1 << wValue; 1334 break; 1335 1336 default: 1337error: 1338 /* "protocol stall" on error */ 1339 retval = -EPIPE; 1340 } 1341 1342 spin_unlock_irqrestore(&sl811->lock, flags); 1343 return retval; 1344} 1345 1346#ifdef CONFIG_PM 1347 1348static int 1349sl811h_bus_suspend(struct usb_hcd *hcd) 1350{ 1351 // SOFs off 1352 dev_dbg(hcd->self.controller, "%s\n", __func__); 1353 return 0; 1354} 1355 1356static int 1357sl811h_bus_resume(struct usb_hcd *hcd) 1358{ 1359 // SOFs on 1360 dev_dbg(hcd->self.controller, "%s\n", __func__); 1361 return 0; 1362} 1363 1364#else 1365 1366#define sl811h_bus_suspend NULL 1367#define sl811h_bus_resume NULL 1368 1369#endif 1370 1371 1372/*-------------------------------------------------------------------------*/ 1373 1374static void dump_irq(struct seq_file *s, char *label, u8 mask) 1375{ 1376 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask, 1377 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "", 1378 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "", 1379 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "", 1380 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "", 1381 (mask & SL11H_INTMASK_RD) ? " rd" : "", 1382 (mask & SL11H_INTMASK_DP) ? " dp" : ""); 1383} 1384 1385static int sl811h_debug_show(struct seq_file *s, void *unused) 1386{ 1387 struct sl811 *sl811 = s->private; 1388 struct sl811h_ep *ep; 1389 unsigned i; 1390 1391 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n", 1392 sl811_to_hcd(sl811)->product_desc, 1393 hcd_name, DRIVER_VERSION, 1394 sl811->port1); 1395 1396 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv); 1397 seq_printf(s, "current session: done_a %ld done_b %ld " 1398 "wake %ld sof %ld overrun %ld lost %ld\n\n", 1399 sl811->stat_a, sl811->stat_b, 1400 sl811->stat_wake, sl811->stat_sof, 1401 sl811->stat_overrun, sl811->stat_lost); 1402 1403 spin_lock_irq(&sl811->lock); 1404 1405 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND) 1406 seq_printf(s, "(suspended)\n\n"); 1407 else { 1408 u8 t = sl811_read(sl811, SL11H_CTLREG1); 1409 1410 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t, 1411 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "", 1412 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) { 1413 case SL11H_CTL1MASK_NORMAL: s = ""; break; 1414 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break; 1415 case SL11H_CTL1MASK_K: s = " k/resume"; break; 1416 default: s = "j"; break; 1417 } s; }), 1418 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "", 1419 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : ""); 1420 1421 dump_irq(s, "irq_enable", 1422 sl811_read(sl811, SL11H_IRQ_ENABLE)); 1423 dump_irq(s, "irq_status", 1424 sl811_read(sl811, SL11H_IRQ_STATUS)); 1425 seq_printf(s, "frame clocks remaining: %d\n", 1426 sl811_read(sl811, SL11H_SOFTMRREG) << 6); 1427 } 1428 1429 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a, 1430 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)), 1431 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); 1432 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b, 1433 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)), 1434 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); 1435 seq_printf(s, "\n"); 1436 list_for_each_entry (ep, &sl811->async, schedule) { 1437 struct urb *urb; 1438 1439 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d" 1440 " nak %d err %d\n", 1441 (ep == sl811->active_a) ? "(A) " : "", 1442 (ep == sl811->active_b) ? "(B) " : "", 1443 ep, ep->epnum, 1444 ({ char *s; switch (ep->nextpid) { 1445 case USB_PID_IN: s = "in"; break; 1446 case USB_PID_OUT: s = "out"; break; 1447 case USB_PID_SETUP: s = "setup"; break; 1448 case USB_PID_ACK: s = "status"; break; 1449 default: s = "?"; break; 1450 } s;}), 1451 ep->maxpacket, 1452 ep->nak_count, ep->error_count); 1453 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) { 1454 seq_printf(s, " urb%p, %d/%d\n", urb, 1455 urb->actual_length, 1456 urb->transfer_buffer_length); 1457 } 1458 } 1459 if (!list_empty(&sl811->async)) 1460 seq_printf(s, "\n"); 1461 1462 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); 1463 1464 for (i = 0; i < PERIODIC_SIZE; i++) { 1465 ep = sl811->periodic[i]; 1466 if (!ep) 1467 continue; 1468 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]); 1469 1470 /* DUMB: prints shared entries multiple times */ 1471 do { 1472 seq_printf(s, 1473 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) " 1474 "err %d\n", 1475 (ep == sl811->active_a) ? "(A) " : "", 1476 (ep == sl811->active_b) ? "(B) " : "", 1477 ep->period, ep, 1478 (ep->udev->speed == USB_SPEED_FULL) 1479 ? "" : "ls ", 1480 ep->udev->devnum, ep->epnum, 1481 (ep->epnum == 0) ? "" 1482 : ((ep->nextpid == USB_PID_IN) 1483 ? "in" 1484 : "out"), 1485 ep->maxpacket, ep->error_count); 1486 ep = ep->next; 1487 } while (ep); 1488 } 1489 1490 spin_unlock_irq(&sl811->lock); 1491 seq_printf(s, "\n"); 1492 1493 return 0; 1494} 1495DEFINE_SHOW_ATTRIBUTE(sl811h_debug); 1496 1497/* expect just one sl811 per system */ 1498static void create_debug_file(struct sl811 *sl811) 1499{ 1500 debugfs_create_file("sl811h", S_IRUGO, usb_debug_root, sl811, 1501 &sl811h_debug_fops); 1502} 1503 1504static void remove_debug_file(struct sl811 *sl811) 1505{ 1506 debugfs_lookup_and_remove("sl811h", usb_debug_root); 1507} 1508 1509/*-------------------------------------------------------------------------*/ 1510 1511static void 1512sl811h_stop(struct usb_hcd *hcd) 1513{ 1514 struct sl811 *sl811 = hcd_to_sl811(hcd); 1515 unsigned long flags; 1516 1517 del_timer_sync(&hcd->rh_timer); 1518 1519 spin_lock_irqsave(&sl811->lock, flags); 1520 port_power(sl811, 0); 1521 spin_unlock_irqrestore(&sl811->lock, flags); 1522} 1523 1524static int 1525sl811h_start(struct usb_hcd *hcd) 1526{ 1527 struct sl811 *sl811 = hcd_to_sl811(hcd); 1528 1529 /* chip has been reset, VBUS power is off */ 1530 hcd->state = HC_STATE_RUNNING; 1531 1532 if (sl811->board) { 1533 if (!device_can_wakeup(hcd->self.controller)) 1534 device_init_wakeup(hcd->self.controller, 1535 sl811->board->can_wakeup); 1536 hcd->power_budget = sl811->board->power * 2; 1537 } 1538 1539 /* enable power and interrupts */ 1540 port_power(sl811, 1); 1541 1542 return 0; 1543} 1544 1545/*-------------------------------------------------------------------------*/ 1546 1547static const struct hc_driver sl811h_hc_driver = { 1548 .description = hcd_name, 1549 .hcd_priv_size = sizeof(struct sl811), 1550 1551 /* 1552 * generic hardware linkage 1553 */ 1554 .irq = sl811h_irq, 1555 .flags = HCD_USB11 | HCD_MEMORY, 1556 1557 /* Basic lifecycle operations */ 1558 .start = sl811h_start, 1559 .stop = sl811h_stop, 1560 1561 /* 1562 * managing i/o requests and associated device resources 1563 */ 1564 .urb_enqueue = sl811h_urb_enqueue, 1565 .urb_dequeue = sl811h_urb_dequeue, 1566 .endpoint_disable = sl811h_endpoint_disable, 1567 1568 /* 1569 * periodic schedule support 1570 */ 1571 .get_frame_number = sl811h_get_frame, 1572 1573 /* 1574 * root hub support 1575 */ 1576 .hub_status_data = sl811h_hub_status_data, 1577 .hub_control = sl811h_hub_control, 1578 .bus_suspend = sl811h_bus_suspend, 1579 .bus_resume = sl811h_bus_resume, 1580}; 1581 1582/*-------------------------------------------------------------------------*/ 1583 1584static void 1585sl811h_remove(struct platform_device *dev) 1586{ 1587 struct usb_hcd *hcd = platform_get_drvdata(dev); 1588 struct sl811 *sl811 = hcd_to_sl811(hcd); 1589 struct resource *res; 1590 1591 remove_debug_file(sl811); 1592 usb_remove_hcd(hcd); 1593 1594 /* some platforms may use IORESOURCE_IO */ 1595 res = platform_get_resource(dev, IORESOURCE_MEM, 1); 1596 if (res) 1597 iounmap(sl811->data_reg); 1598 1599 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 1600 if (res) 1601 iounmap(sl811->addr_reg); 1602 1603 usb_put_hcd(hcd); 1604} 1605 1606static int 1607sl811h_probe(struct platform_device *dev) 1608{ 1609 struct usb_hcd *hcd; 1610 struct sl811 *sl811; 1611 struct resource *addr, *data, *ires; 1612 int irq; 1613 void __iomem *addr_reg; 1614 void __iomem *data_reg; 1615 int retval; 1616 u8 tmp, ioaddr; 1617 unsigned long irqflags; 1618 1619 if (usb_disabled()) 1620 return -ENODEV; 1621 1622 /* the chip may be wired for either kind of addressing */ 1623 addr = platform_get_mem_or_io(dev, 0); 1624 data = platform_get_mem_or_io(dev, 1); 1625 if (!addr || !data || resource_type(addr) != resource_type(data)) 1626 return -ENODEV; 1627 1628 /* basic sanity checks first. board-specific init logic should 1629 * have initialized these three resources and probably board 1630 * specific platform_data. we don't probe for IRQs, and do only 1631 * minimal sanity checking. 1632 */ 1633 ires = platform_get_resource(dev, IORESOURCE_IRQ, 0); 1634 if (dev->num_resources < 3 || !ires) 1635 return -ENODEV; 1636 1637 irq = ires->start; 1638 irqflags = ires->flags & IRQF_TRIGGER_MASK; 1639 1640 ioaddr = resource_type(addr) == IORESOURCE_IO; 1641 if (ioaddr) { 1642 /* 1643 * NOTE: 64-bit resource->start is getting truncated 1644 * to avoid compiler warning, assuming that ->start 1645 * is always 32-bit for this case 1646 */ 1647 addr_reg = (void __iomem *) (unsigned long) addr->start; 1648 data_reg = (void __iomem *) (unsigned long) data->start; 1649 } else { 1650 addr_reg = ioremap(addr->start, 1); 1651 if (addr_reg == NULL) { 1652 retval = -ENOMEM; 1653 goto err2; 1654 } 1655 1656 data_reg = ioremap(data->start, 1); 1657 if (data_reg == NULL) { 1658 retval = -ENOMEM; 1659 goto err4; 1660 } 1661 } 1662 1663 /* allocate and initialize hcd */ 1664 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev)); 1665 if (!hcd) { 1666 retval = -ENOMEM; 1667 goto err5; 1668 } 1669 hcd->rsrc_start = addr->start; 1670 sl811 = hcd_to_sl811(hcd); 1671 1672 spin_lock_init(&sl811->lock); 1673 INIT_LIST_HEAD(&sl811->async); 1674 sl811->board = dev_get_platdata(&dev->dev); 1675 timer_setup(&sl811->timer, sl811h_timer, 0); 1676 sl811->addr_reg = addr_reg; 1677 sl811->data_reg = data_reg; 1678 1679 spin_lock_irq(&sl811->lock); 1680 port_power(sl811, 0); 1681 spin_unlock_irq(&sl811->lock); 1682 msleep(200); 1683 1684 tmp = sl811_read(sl811, SL11H_HWREVREG); 1685 switch (tmp >> 4) { 1686 case 1: 1687 hcd->product_desc = "SL811HS v1.2"; 1688 break; 1689 case 2: 1690 hcd->product_desc = "SL811HS v1.5"; 1691 break; 1692 default: 1693 /* reject case 0, SL11S is less functional */ 1694 dev_dbg(&dev->dev, "chiprev %02x\n", tmp); 1695 retval = -ENXIO; 1696 goto err6; 1697 } 1698 1699 /* The chip's IRQ is level triggered, active high. A requirement 1700 * for platform device setup is to cope with things like signal 1701 * inverters (e.g. CF is active low) or working only with edge 1702 * triggers (e.g. most ARM CPUs). Initial driver stress testing 1703 * was on a system with single edge triggering, so most sorts of 1704 * triggering arrangement should work. 1705 * 1706 * Use resource IRQ flags if set by platform device setup. 1707 */ 1708 irqflags |= IRQF_SHARED; 1709 retval = usb_add_hcd(hcd, irq, irqflags); 1710 if (retval != 0) 1711 goto err6; 1712 1713 device_wakeup_enable(hcd->self.controller); 1714 1715 create_debug_file(sl811); 1716 return retval; 1717 1718 err6: 1719 usb_put_hcd(hcd); 1720 err5: 1721 if (!ioaddr) 1722 iounmap(data_reg); 1723 err4: 1724 if (!ioaddr) 1725 iounmap(addr_reg); 1726 err2: 1727 dev_dbg(&dev->dev, "init error, %d\n", retval); 1728 return retval; 1729} 1730 1731#ifdef CONFIG_PM 1732 1733/* for this device there's no useful distinction between the controller 1734 * and its root hub. 1735 */ 1736 1737static int 1738sl811h_suspend(struct platform_device *dev, pm_message_t state) 1739{ 1740 struct usb_hcd *hcd = platform_get_drvdata(dev); 1741 struct sl811 *sl811 = hcd_to_sl811(hcd); 1742 int retval = 0; 1743 1744 switch (state.event) { 1745 case PM_EVENT_FREEZE: 1746 retval = sl811h_bus_suspend(hcd); 1747 break; 1748 case PM_EVENT_SUSPEND: 1749 case PM_EVENT_HIBERNATE: 1750 case PM_EVENT_PRETHAW: /* explicitly discard hw state */ 1751 port_power(sl811, 0); 1752 break; 1753 } 1754 return retval; 1755} 1756 1757static int 1758sl811h_resume(struct platform_device *dev) 1759{ 1760 struct usb_hcd *hcd = platform_get_drvdata(dev); 1761 struct sl811 *sl811 = hcd_to_sl811(hcd); 1762 1763 /* with no "check to see if VBUS is still powered" board hook, 1764 * let's assume it'd only be powered to enable remote wakeup. 1765 */ 1766 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) { 1767 sl811->port1 = 0; 1768 port_power(sl811, 1); 1769 usb_root_hub_lost_power(hcd->self.root_hub); 1770 return 0; 1771 } 1772 1773 return sl811h_bus_resume(hcd); 1774} 1775 1776#else 1777 1778#define sl811h_suspend NULL 1779#define sl811h_resume NULL 1780 1781#endif 1782 1783 1784/* this driver is exported so sl811_cs can depend on it */ 1785struct platform_driver sl811h_driver = { 1786 .probe = sl811h_probe, 1787 .remove_new = sl811h_remove, 1788 1789 .suspend = sl811h_suspend, 1790 .resume = sl811h_resume, 1791 .driver = { 1792 .name = hcd_name, 1793 }, 1794}; 1795EXPORT_SYMBOL(sl811h_driver); 1796 1797module_platform_driver(sl811h_driver); 1798