/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
H A D | r8a7792-cpg-mssr.h | 9 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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H A D | rk3188-cru.h | 10 #include <dt-bindings/clock/rk3188-cru-common.h>
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H A D | r8a7742-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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/linux-master/drivers/clk/sunxi-ng/ |
H A D | ccu-sun5i.h | 11 #include <dt-bindings/clock/sun5i-ccu.h> 33 /* The CPU clock is exported */ 46 /* GPS clock is exported */
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H A D | ccu-sun8i-a83t.h | 11 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
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H A D | ccu-sun9i-a80.h | 11 #include <dt-bindings/clock/sun9i-a80-ccu.h>
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H A D | ccu-sun6i-a31.h | 11 #include <dt-bindings/clock/sun6i-a31-ccu.h> 22 /* The PLL_VIDEO0_2X clock is exported */ 27 /* The PLL_PERIPH clock is exported */ 32 /* The PLL_VIDEO1_2X clock is exported */ 36 /* The PLL_VIDEO1_2X clock is exported */ 41 /* The CPUX clock is exported */ 52 /* EMAC clock is not implemented */ 65 /* Some more module clocks and external clock outputs are exported */
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H A D | ccu-sun8i-h3.h | 11 #include <dt-bindings/clock/sun8i-h3-ccu.h> 33 /* The CPUX clock is exported */
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H A D | ccu-sun8i-v3s.h | 12 #include <dt-bindings/clock/sun8i-v3s-ccu.h> 30 /* The CPU clock is exported */ 50 /* And the GPU module clock is exported */
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/linux-master/include/dt-bindings/clock/ |
H A D | rk3188-cru.h | 10 #include <dt-bindings/clock/rk3188-cru-common.h>
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H A D | r8a7742-cpg-mssr.h | 8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
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/linux-master/drivers/gpu/drm/gma500/ |
H A D | gma_display.h | 49 void (*clock)(int refclk, struct gma_clock_t *clock); member in struct:gma_clock_funcs 53 struct gma_clock_t *clock); 82 /* Common clock related functions */ 86 struct gma_clock_t *clock);
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H A D | gma_display.c | 721 struct gma_clock_t *clock) 723 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) 725 if (clock->p < limit->p.min || limit->p.max < clock->p) 727 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) 729 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) 732 if (clock 719 gma_pll_is_valid(struct drm_crtc *crtc, const struct gma_limit_t *limit, struct gma_clock_t *clock) argument 757 struct gma_clock_t clock; local [all...] |
/linux-master/sound/pci/echoaudio/ |
H A D | layla20_dsp.c | 86 /* Map the DSP clock detect bits to the generic driver clock detect bits */ 166 /* Only set the clock for internal mode. Do not return failure, 170 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n"); 190 u16 clock; local 197 clock = LAYLA20_CLOCK_INTERNAL; 200 clock = LAYLA20_CLOCK_SPDIF; 203 clock = LAYLA20_CLOCK_WORD; 206 clock = LAYLA20_CLOCK_SUPER; 210 "Input clock 228 set_output_clock(struct echoaudio *chip, u16 clock) argument [all...] |
H A D | echoaudio_3g.c | 191 disconnects clock inputs. You should use this information to determine which 197 /* Map the DSP clock detect bits to the generic driver clock 245 * 48 kHz, internal clock, S/PDIF RCA mode */ 260 u32 control_reg, clock, base_rate, frq_reg; local 262 /* Only set the clock for internal mode. */ 265 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n"); 282 clock = E3G_96KHZ; 285 clock = E3G_88KHZ; 288 clock 328 set_input_clock(struct echoaudio *chip, u16 clock) argument [all...] |
H A D | mia_dsp.c | 32 static int set_input_clock(struct echoaudio *chip, u16 clock); 87 /* Map the DSP clock detect bits to the generic driver clock 135 /* Override the clock setting if this Mia is set to S/PDIF clock */ 156 static int set_input_clock(struct echoaudio *chip, u16 clock) argument 158 dev_dbg(chip->card->dev, "set_input_clock(%d)\n", clock); 159 if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL && 160 clock != ECHO_CLOCK_SPDIF)) 163 chip->input_clock = clock; [all...] |
/linux-master/arch/sh/kernel/cpu/sh4/ |
H A D | Makefile | 29 clock-$(CONFIG_CPU_SH4) := clock-sh4.o 32 obj-y += $(clock-y)
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/linux-master/drivers/ptp/ |
H A D | ptp_ines.c | 148 struct ines_clock *clock; member in struct:ines_port 180 static void ines_clock_cleanup(struct ines_clock *clock) argument 186 port = &clock->port[i]; 191 static int ines_clock_init(struct ines_clock *clock, struct device *device, argument 199 INIT_LIST_HEAD(&clock->list); 200 clock->node = node; 201 clock->dev = device; 202 clock->base = addr; 203 clock->regs = clock 239 struct ines_clock *clock; local 735 struct ines_clock *clock; local 770 struct ines_clock *clock = dev_get_drvdata(&pld->dev); local [all...] |
H A D | ptp_mock.c | 7 * Create a PTP clock which offers PTP time manipulation operations 38 struct ptp_clock *clock; member in struct:mock_phc 114 return ptp_clock_index(phc->clock); 131 .name = "Mock-up PTP clock", 150 phc->clock = ptp_clock_register(&phc->info, dev); 151 if (IS_ERR(phc->clock)) { 152 err = PTR_ERR(phc->clock); 156 ptp_schedule_worker(phc->clock, MOCK_PHC_REFRESH_INTERVAL); 169 ptp_clock_unregister(phc->clock);
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/linux-master/drivers/clk/ti/ |
H A D | clk-814x.c | 8 #include <dt-bindings/clock/dm814.h> 10 #include "clock.h" 93 struct clk *clock; local 95 clock = clk_get(NULL, init_clocks[i]); 96 if (WARN(IS_ERR(clock), "could not find init clock %s\n", 99 err = clk_prepare_enable(clock); 100 if (WARN(err, "could not enable init clock %s\n",
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/linux-master/drivers/media/platform/qcom/camss/ |
H A D | camss-csid.c | 84 * csid_set_clock_rates - Calculate and set clock rates on CSID module 103 struct camss_clock *clock = &csid->clock[i]; local 105 if (!strcmp(clock->name, "csi0") || 106 !strcmp(clock->name, "csi1") || 107 !strcmp(clock->name, "csi2") || 108 !strcmp(clock->name, "csi3")) { 114 for (j = 0; j < clock->nfreqs; j++) 115 if (min_rate < clock->freq[j]) 118 if (j == clock 628 struct camss_clock *clock = &csid->clock[i]; local [all...] |
/linux-master/drivers/clk/zynqmp/ |
H A D | clkc.c | 3 * Zynq UltraScale+ MPSoC clock controller 51 * @id: Parent clock ID 63 * @valid: Validity flag of clock 67 * @parent: Parent of clock 68 * @num_parents: Number of parents of clock 136 static struct zynqmp_clock *clock; variable in typeref:struct:zynqmp_clock 141 * zynqmp_is_valid_clock() - Check whether clock is valid or not 144 * Return: 1 if clock is valid, 0 if clock is invalid else error code 151 return clock[clk_i [all...] |
/linux-master/drivers/ata/ |
H A D | pata_opti.c | 104 * are two tables depending on the hardware clock speed. 110 int clock; local 126 clock = ioread16(regio + 5) & 1; 133 addr = addr_timing[clock][pio]; 136 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0]; 143 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); 144 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
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/linux-master/drivers/gpu/drm/amd/pm/ |
H A D | amdgpu_dpm_internal.c | 61 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { 68 vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; 87 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) {
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/linux-master/drivers/pcmcia/ |
H A D | pxa2xx_base.c | 107 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value: 115 static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock) argument 119 val = ((pxa2xx_mcxx_setup(speed, clock) 121 | ((pxa2xx_mcxx_asst(speed, clock) 123 | ((pxa2xx_mcxx_hold(speed, clock) 129 static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock) argument 133 val = ((pxa2xx_mcxx_setup(speed, clock) 135 | ((pxa2xx_mcxx_asst(speed, clock) 137 | ((pxa2xx_mcxx_hold(speed, clock) 144 static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock) argument [all...] |