Searched refs:bank (Results 126 - 150 of 367) sorted by relevance

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/linux-master/drivers/gpio/
H A Dgpio-sprd.c28 /* We have 16 banks GPIOs and each bank contain 16 GPIOs */
43 unsigned int bank)
45 return sprd_gpio->base + SPRD_GPIO_BANK_SIZE * bank;
194 u32 bank, n; local
198 for (bank = 0; bank * SPRD_GPIO_BANK_NR < chip->ngpio; bank++) {
199 void __iomem *base = sprd_gpio_bank_base(sprd_gpio, bank);
205 bank * SPRD_GPIO_BANK_NR + n);
42 sprd_gpio_bank_base(struct sprd_gpio *sprd_gpio, unsigned int bank) argument
/linux-master/arch/powerpc/platforms/85xx/
H A Dp1022_ds.c234 br0 = in_be32(&lbc->bank[0].br);
235 br1 = in_be32(&lbc->bank[1].br);
236 or0 = in_be32(&lbc->bank[0].or);
237 or1 = in_be32(&lbc->bank[1].or);
253 out_be32(&lbc->bank[0].br, br0);
254 out_be32(&lbc->bank[0].or, or0);
259 out_be32(&lbc->bank[1].br, br1);
260 out_be32(&lbc->bank[1].or, or1);
/linux-master/arch/arm/kernel/
H A Dtcm.c111 static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, argument
120 * If there are more than one TCM bank of this type,
121 * select the TCM bank to operate on in the TCM selection
127 : "r" (bank));
140 type ? "I" : "D", bank);
144 type ? "I" : "D", bank);
149 bank,
155 /* Not much fun you can do with a size 0 bank */
159 /* Force move the TCM bank to where we want it, enable */
176 bank,
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/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_nvm.c236 * ice_get_flash_bank_offset - Get offset into requested flash bank
238 * @bank: whether to read from the active or inactive flash bank
247 static u32 ice_get_flash_bank_offset(struct ice_hw *hw, enum ice_bank_select bank, u16 module) argument
283 ice_debug(hw, ICE_DBG_NVM, "Unexpected value for active flash bank: %u\n",
288 /* The second flash bank is stored immediately following the first
289 * bank. Based on whether the 1st or 2nd bank is active, and whether
290 * we want the active or inactive bank, calculate the desired offset.
292 switch (bank) {
321 ice_read_flash_module(struct ice_hw *hw, enum ice_bank_select bank, u16 module, u32 offset, u8 *data, u32 length) argument
356 ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data) argument
380 ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data) argument
395 ice_read_netlist_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data) argument
563 ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nvm_info *nvm) argument
617 ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_civd_info *civd) argument
695 ice_get_orom_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_info *orom) argument
741 ice_get_netlist_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_netlist_info *netlist) argument
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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_aca.h107 struct aca_bank bank; member in struct:aca_bank_node
160 int (*aca_bank_generate_report)(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,
162 bool (*aca_bank_is_valid)(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type,
171 int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_error_type type, int idx, struct aca_bank *bank);
192 int aca_bank_info_decode(struct aca_bank *bank, struct aca_bank_info *info);
193 int aca_bank_check_error_codes(struct amdgpu_device *adev, struct aca_bank *bank, int *err_codes, int size);
H A Dumc_v12_0.c214 uint32_t bank0, bank1, bank2, bank3, bank; local
223 /* apply bank hash algorithm */
241 bank = bank0 | (bank1 << 1) | (bank2 << 2) | (bank3 << 3);
243 err_addr |= (bank << UMC_V12_0_MCA_B0_BIT);
264 addr_out->pa.bank = bank;
273 uint32_t col, row, row_xor, bank, channel_index; local
290 bank = addr_out.pa.bank;
310 retired_page, row, col, bank, channel_inde
501 umc_v12_0_aca_bank_generate_report(struct aca_handle *handle, struct aca_bank *bank, enum aca_error_type type, struct aca_bank_report *report, void *data) argument
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/linux-master/drivers/pinctrl/nuvoton/
H A Dpinctrl-wpcm450.c8 // - GPIO registers, specific to each GPIO bank
52 const struct wpcm450_bank *bank; member in struct:wpcm450_gpio
82 u8 first_irq_bit; /* First bit in GPEVST that belongs to this bank */
83 u8 num_irqs; /* Number of IRQ-capable GPIOs in this bank */
84 u8 first_irq_gpio; /* First IRQ-capable GPIO in this bank */
101 const struct wpcm450_bank *bank = gpio->bank; local
104 if (hwirq < bank->first_irq_gpio)
107 if (hwirq - bank->first_irq_gpio >= bank
115 const struct wpcm450_bank *bank = gpio->bank; local
1018 const struct wpcm450_bank *bank = gpio->bank; local
1041 const struct wpcm450_bank *bank; local
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/linux-master/drivers/pinctrl/
H A Dpinctrl-falcon.c93 static void lantiq_load_pin_desc(struct pinctrl_pin_desc *d, int bank, int len) argument
95 int base = bank * PINS;
102 pad_count[bank] = len;
434 const __be32 *bank = of_get_property(np, "lantiq,bank", NULL); local
443 if (!bank || *bank >= PORTS)
454 falcon_info.clk[*bank] = clk_get(&ppdev->dev, NULL);
456 if (IS_ERR(falcon_info.clk[*bank])) {
459 return PTR_ERR(falcon_info.clk[*bank]);
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H A Dpinctrl-pic32.c41 #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK)
1802 struct pic32_gpio_bank *bank = gpiochip_get_data(range->gc); local
1803 u32 mask = BIT(offset - bank->gpio_chip.base);
1805 dev_dbg(pctl->dev, "requesting gpio %d in bank %d with mask 0x%x\n",
1806 offset, bank->gpio_chip.base, mask);
1808 writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));
1816 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); local
1819 writel(mask, bank->reg_base + PIC32_SET(TRIS_REG));
1826 struct pic32_gpio_bank *bank local
1834 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); local
1846 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); local
1882 struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin); local
1923 struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin); local
1991 struct pic32_gpio_bank *bank = gpiochip_get_data(chip); local
2001 struct pic32_gpio_bank *bank = irqd_to_bank(data); local
2008 struct pic32_gpio_bank *bank = irqd_to_bank(data); local
2016 struct pic32_gpio_bank *bank = irqd_to_bank(data); local
2034 struct pic32_gpio_bank *bank = irqd_to_bank(data); local
2073 struct pic32_gpio_bank *bank = gpiochip_get_data(gc); local
2094 struct pic32_gpio_bank *bank = gpiochip_get_data(gc); local
2145 struct pic32_gpio_bank *bank = irqd_to_bank(data); local
2216 struct pic32_gpio_bank *bank; local
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/linux-master/sound/pci/ymfpci/
H A Dymfpci_main.c297 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
309 voice->bank[chip->active_bank].start);
320 struct snd_ymfpci_playback_bank *bank; local
323 bank = &voice->bank[next_bank];
325 bank->left_gain_end = volume;
327 bank->eff2_gain_end = volume;
329 bank = &ypcm->voices[1]->bank[next_bank];
331 bank
488 struct snd_ymfpci_playback_bank *bank; local
694 struct snd_ymfpci_capture_bank * bank; local
2097 int voice, bank, reg; local
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/linux-master/drivers/net/wireless/mediatek/mt7601u/
H A Dtrace.h142 TP_PROTO(struct mt7601u_dev *dev, u8 bank, u8 reg, u8 val),
143 TP_ARGS(dev, bank, reg, val),
146 __field(u8, bank)
153 __entry->bank = bank;
157 DEV_PR_ARG, __entry->bank, __entry->reg, __entry->val
162 TP_PROTO(struct mt7601u_dev *dev, u8 bank, u8 reg, u8 val),
163 TP_ARGS(dev, bank, reg, val)
167 TP_PROTO(struct mt7601u_dev *dev, u8 bank, u8 reg, u8 val),
168 TP_ARGS(dev, bank, re
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/linux-master/drivers/hwmon/
H A Dasus-ec-sensors.c41 /* Writing to this EC register switches EC bank */
46 * Arbitrary set max. allowed bank number. Required for sorting banks and
70 u8 bank; member in struct:__anon174::__anon175
76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \
77 .value = (size << 16) + (bank << 8) + index \
94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \
96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \
652 u8 bank; local
664 bank = ec->sensors_info[s->info_index].addr.components.bank;
726 asus_ec_bank_switch(u8 bank, u8 *old) argument
742 u8 bank, reg_bank, prev_bank; local
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/linux-master/drivers/input/misc/
H A Dpmic8xxx-pwrkey.c62 /* Buck TEST2 register bank 1 */
65 /* Buck TEST2 register bank 7 */
163 u8 vref_sel, vlow_sel, band, vprog, bank; local
166 bank = PM8058_REGULATOR_BANK_SEL(7);
167 error = regmap_write(regmap, test2_addr, bank);
209 bank = PM8058_REGULATOR_BANK_SEL(1);
210 error = regmap_write(regmap, test2_addr, bank);
223 bank = PM8058_REGULATOR_BANK_SEL(7);
224 error = regmap_write(regmap, test2_addr, bank);
/linux-master/drivers/leds/
H A Dleds-mc13783.c58 unsigned int reg, bank, off, shift; local
77 bank = off / 3;
78 reg = 3 + bank;
79 shift = (off - bank * 3) * 5 + 6;
92 bank = off / 2;
93 reg = 2 + bank;
94 shift = (off - bank * 2) * 12 + 3;
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_isr.c49 struct adf_etr_bank_data *bank = bank_ptr; local
50 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
52 csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number,
54 tasklet_hi_schedule(&bank->resp_handler);
215 struct adf_etr_bank_data *bank = &etr_data->banks[i]; local
230 &name[0], bank);
276 /* If SR-IOV is disabled (vf_info is NULL), add entries for each bank */
H A Dadf_gen4_config.c19 unsigned long bank, val; local
31 bank = i * 2;
34 key, &bank, ADF_DEC);
38 bank += 1;
41 key, &bank, ADF_DEC);
/linux-master/drivers/rtc/
H A Drtc-r7301.c56 u8 bank; member in struct:rtc7301_priv
129 static void rtc7301_select_bank(struct rtc7301_priv *priv, u8 bank) argument
133 if (bank == priv->bank)
136 if (bank & BIT(0))
138 if (bank & BIT(1))
145 priv->bank = bank;
408 priv->bank = -1;
/linux-master/drivers/irqchip/
H A Dirq-bcm2835.c6 * Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
8 * If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8
9 * on bank 0 is set to signify that an interrupt in bank 1 has fired, and
10 * to look in the bank 1 status register for more information.
12 * If an interrupt fires on bank 1 that _is_ in the shortcuts list, its
13 * shortcut bit in bank 0 is set as well as its interrupt bit in the bank 1
14 * status register, but bank 0 bit 8 is _not_ set.
23 * Quirk 3: The shortcut interrupts can't be (un)masked in bank
211 armctrl_translate_bank(int bank) argument
218 armctrl_translate_shortcut(int bank, u32 stat) argument
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/linux-master/drivers/perf/arm_cspmu/
H A Dampere_cspmu.c38 SOC_PMU_EVENT_ATTR_EXTRACTOR(bank, config1, 24, 55);
107 ARM_CSPMU_FORMAT_ATTR(bank, "config1:24-55"),
150 u32 threshold, rank, bank; local
163 bank = get_bank(event);
167 writel(bank, cspmu->base0 + PMAUXR2);
/linux-master/drivers/mtd/nand/raw/
H A Dfsl_ifc_nand.c35 int bank; /* Chip select bank number */ member in struct:fsl_ifc_mtd
183 ifc_out32(priv->bank << IFC_NAND_CSEL_SHIFT,
502 * chips per bank.
714 csor = ifc_in32(&ifc_global->csor_cs[priv->bank].csor);
783 uint32_t cs = priv->bank;
870 if ((ifc_in32(&ifc_global->cspr_cs[priv->bank].cspr))
893 if (ifc_in32(&ifc_global->cspr_cs[priv->bank].cspr)
907 csor = ifc_in32(&ifc_global->csor_cs[priv->bank].csor);
960 ifc_nand_ctrl->chips[priv->bank]
965 match_bank(struct fsl_ifc_global __iomem *ifc_global, int bank, phys_addr_t addr) argument
988 int bank; local
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgf117.c131 u8 bank[GPC_MAX] = {}, gpc, i, j; local
136 data |= bank[gr->tile[i + j]] << (j * 4);
137 bank[gr->tile[i + j]]++;
/linux-master/drivers/pinctrl/vt8500/
H A Dpinctrl-wmt.c87 u32 bank = WMT_BANK_FROM_PIN(pin); local
89 u32 reg_en = data->banks[bank].reg_en;
90 u32 reg_dir = data->banks[bank].reg_dir;
424 u32 bank = WMT_BANK_FROM_PIN(pin); local
426 u32 reg_pull_en = data->banks[bank].reg_pull_en;
427 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
483 u32 bank = WMT_BANK_FROM_PIN(offset); local
485 u32 reg_dir = data->banks[bank].reg_dir;
498 u32 bank = WMT_BANK_FROM_PIN(offset); local
500 u32 reg_data_in = data->banks[bank]
514 u32 bank = WMT_BANK_FROM_PIN(offset); local
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/linux-master/arch/x86/kernel/cpu/mce/
H A Dinject.c477 u8 b = m.bank;
503 u8 b = i_mce.bank;
537 * For multi node CPUs, logging and reporting of bank 4 errors happens
577 * This denotes into which bank we're injecting and triggers
586 /* Get bank count on target CPU so we can handle non-uniform values. */
591 pr_err("MCA bank %llu non-existent on CPU%d\n", val, m->extcpu);
595 m->bank = val;
605 * Read IPID value to determine if a bank is populated on the target
617 pr_err("Cannot inject into unpopulated bank %llu\n", val);
631 MCE_INJECT_GET(bank); variable
724 u8 bank; local
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/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc.c174 int bank = index / mcam->banksize; local
178 return bank ? 2 : 0;
180 return bank;
186 int bank = npc_get_bank(mcam, index); local
190 cfg = rvu_read64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(index, bank));
197 int bank = npc_get_bank(mcam, index); local
198 int actbank = bank;
201 for (; bank < (actbank + mcam->banks_per_entry); bank++) {
203 NPC_AF_MCAMEX_BANKX_CFG(index, bank),
211 int bank = npc_get_bank(mcam, index); local
367 int bank, nixlf, index; local
433 int bank = npc_get_bank(mcam, index); local
509 int bank, kw = 0; local
546 int bank, i; local
583 int bank = npc_get_bank(mcam, index); local
593 int bank = npc_get_bank(mcam, index); local
950 int actindex, index, bank, entry; local
997 int bank, op_rss; local
1023 int blkaddr, index, bank; local
2098 int blkaddr, entry, bank, err; local
2266 u32 bank = npc_get_bank(mcam, entry); local
2283 u32 bank = npc_get_bank(mcam, entry); local
3440 u32 bank; local
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/linux-master/include/linux/
H A Ddmi.h114 extern void dmi_memdev_name(u16 handle, const char **bank, const char **device);
144 static inline void dmi_memdev_name(u16 handle, const char **bank, argument

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