Searched refs:channel (Results 101 - 125 of 1958) sorted by relevance

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/linux-master/drivers/net/ethernet/sfc/siena/
H A Defx_common.h76 static inline void efx_schedule_channel(struct efx_channel *channel) argument
78 netif_vdbg(channel->efx, intr, channel->efx->net_dev,
79 "channel %d scheduling NAPI poll on CPU%d\n",
80 channel->channel, raw_smp_processor_id());
82 napi_schedule(&channel->napi_str);
85 static inline void efx_schedule_channel_irq(struct efx_channel *channel) argument
87 channel->event_test_cpu = raw_smp_processor_id();
88 efx_schedule_channel(channel);
[all...]
H A Dptp.h33 void efx_siena_time_sync_event(struct efx_channel *channel, efx_qword_t *ev);
34 void __efx_siena_rx_skb_attach_timestamp(struct efx_channel *channel,
36 static inline void efx_rx_skb_attach_timestamp(struct efx_channel *channel, argument
39 if (channel->sync_events_state == SYNC_EVENTS_VALID)
40 __efx_siena_rx_skb_attach_timestamp(channel, skb);
/linux-master/drivers/net/ethernet/sfc/
H A Defx_common.h73 static inline void efx_schedule_channel(struct efx_channel *channel) argument
75 netif_vdbg(channel->efx, intr, channel->efx->net_dev,
76 "channel %d scheduling NAPI poll on CPU%d\n",
77 channel->channel, raw_smp_processor_id());
79 napi_schedule(&channel->napi_str);
82 static inline void efx_schedule_channel_irq(struct efx_channel *channel) argument
84 channel->event_test_cpu = raw_smp_processor_id();
85 efx_schedule_channel(channel);
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H A Dmcdi_functions.c63 int efx_mcdi_ev_probe(struct efx_channel *channel) argument
65 return efx_nic_alloc_buffer(channel->efx, &channel->eventq,
66 (channel->eventq_mask + 1) *
71 int efx_mcdi_ev_init(struct efx_channel *channel, bool v1_cut_thru, bool v2) argument
77 size_t entries = channel->eventq.len / EFX_BUF_SIZE;
78 struct efx_nic *efx = channel->efx;
84 memset(channel->eventq.addr, 0xff, channel->eventq.len);
86 MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_SIZE, channel
135 efx_mcdi_ev_remove(struct efx_channel *channel) argument
140 efx_mcdi_ev_fini(struct efx_channel *channel) argument
170 struct efx_channel *channel = tx_queue->channel; local
280 struct efx_channel *channel = efx_rx_queue_channel(rx_queue); local
359 struct efx_channel *channel; local
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/linux-master/drivers/iio/common/st_sensors/
H A Dst_sensors_buffer.c29 const struct iio_chan_spec *channel = &indio_dev->channels[i]; local
31 DIV_ROUND_UP(channel->scan_type.realbits +
32 channel->scan_type.shift, 8);
34 channel->scan_type.storagebits >> 3;
37 if (regmap_bulk_read(sdata->regmap, channel->address,
/linux-master/drivers/iio/pressure/
H A Dcros_ec_baro.c25 * One channel for pressure, the other for timestamp.
129 struct iio_chan_spec *channel; local
148 channel = state->channels;
150 channel->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
151 channel->info_mask_shared_by_all =
154 channel->info_mask_shared_by_all_available =
156 channel->scan_type.realbits = CROS_EC_SENSOR_BITS;
157 channel->scan_type.storagebits = CROS_EC_SENSOR_BITS;
158 channel->scan_type.shift = 0;
159 channel
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/linux-master/drivers/hv/
H A Dhyperv_vmbus.h120 * Per cpu state for channel handling
138 * Starting with win8, we can take channel interrupts on any CPU;
182 void hv_ringbuffer_pre_init(struct vmbus_channel *channel);
189 int hv_ringbuffer_write(struct vmbus_channel *channel,
193 int hv_ringbuffer_read(struct vmbus_channel *channel,
236 * Represents channel interrupts. Each bit position represents a
237 * channel. When a channel sends an interrupt via VMBUS, it finds its
292 * fields of the channel offers (i.e. child_relid and connection_id)
346 struct vmbus_channel *channel);
391 hv_poll_channel(struct vmbus_channel *channel, void (*cb)(void *)) argument
415 hv_is_perf_channel(struct vmbus_channel *channel) argument
422 struct vmbus_channel *channel, *sc; local
473 hv_debug_delay_test(struct vmbus_channel *channel, enum delay delay_type) argument
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/linux-master/drivers/hwmon/
H A Dmax127.c29 * MAX127 channel input ranges. Refer to MAX127 datasheet, Table 3 "Range
117 static int max127_read_input(struct max127_data *data, int channel, long *val) argument
122 u8 ctrl_byte = data->ctrl_byte[channel];
141 static int max127_read_min(struct max127_data *data, int channel, long *val) argument
143 u8 rng_bip = (data->ctrl_byte[channel] >> 2) & 3;
155 static int max127_read_max(struct max127_data *data, int channel, long *val) argument
157 u8 rng_bip = (data->ctrl_byte[channel] >> 2) & 3;
169 static int max127_write_min(struct max127_data *data, int channel, long val) argument
175 ctrl = data->ctrl_byte[channel];
184 data->ctrl_byte[channel]
191 max127_write_max(struct max127_data *data, int channel, long val) argument
205 max127_is_visible(const void *_data, enum hwmon_sensor_types type, u32 attr, int channel) argument
226 max127_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
256 max127_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
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H A Dmax197.c57 static inline void max197_set_unipolarity(struct max197_data *data, int channel) argument
59 data->ctrl_bytes[channel] &= ~MAX197_BIP;
62 static inline void max197_set_bipolarity(struct max197_data *data, int channel) argument
64 data->ctrl_bytes[channel] |= MAX197_BIP;
67 static inline void max197_set_half_range(struct max197_data *data, int channel) argument
69 data->ctrl_bytes[channel] &= ~MAX197_RNG;
72 static inline void max197_set_full_range(struct max197_data *data, int channel) argument
74 data->ctrl_bytes[channel] |= MAX197_RNG;
77 static inline bool max197_is_bipolar(struct max197_data *data, int channel) argument
79 return data->ctrl_bytes[channel]
82 max197_is_full_range(struct max197_data *data, int channel) argument
93 int channel = attr->index; local
121 int channel = attr->index; local
176 int channel = attr->index; local
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H A Dltc2991.c99 static int ltc2991_read_in(struct device *dev, u32 attr, int channel, long *val) argument
106 if (channel == LTC2991_VCC_CH_NR)
109 reg = LTC2991_CHANNEL_V_MSB(channel - 1);
117 static int ltc2991_get_curr(struct ltc2991_state *st, u32 reg, int channel, argument
128 st->r_sense_uohm[channel]);
133 static int ltc2991_read_curr(struct device *dev, u32 attr, int channel, argument
141 reg = LTC2991_CHANNEL_C_MSB(channel);
142 return ltc2991_get_curr(st, reg, channel, val);
148 static int ltc2991_get_temp(struct ltc2991_state *st, u32 reg, int channel, argument
163 static int ltc2991_read_temp(struct device *dev, u32 attr, int channel, argument
182 ltc2991_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
197 ltc2991_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
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H A Dadm9240.c135 static int adm9240_write_fan_div(struct adm9240_data *data, int channel, u8 fan_div) argument
137 unsigned int reg, old, shift = (channel + 2) * 2;
151 channel + 1, BIT(old), BIT(fan_div));
167 static int adm9240_fan_min_write(struct adm9240_data *data, int channel, long val) argument
177 new_div = data->fan_div[channel];
179 dev_dbg(data->dev, "fan%u low limit set disabled\n", channel + 1);
185 channel + 1, FAN_FROM_REG(254, BIT(new_div)));
200 channel + 1, FAN_FROM_REG(new_min, BIT(new_div)));
203 if (new_div != data->fan_div[channel]) {
204 data->fan_div[channel]
439 adm9240_in_read(struct device *dev, u32 attr, int channel, long *val) argument
478 adm9240_in_write(struct device *dev, u32 attr, int channel, long val) argument
496 adm9240_fan_read(struct device *dev, u32 attr, int channel, long *val) argument
543 adm9240_fan_write(struct device *dev, u32 attr, int channel, long val) argument
560 adm9240_temp_read(struct device *dev, u32 attr, int channel, long *val) argument
602 adm9240_temp_write(struct device *dev, u32 attr, int channel, long val) argument
620 adm9240_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
639 adm9240_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
656 adm9240_is_visible(const void *_data, enum hwmon_sensor_types type, u32 attr, int channel) argument
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/linux-master/drivers/usb/musb/
H A Dux500_dma.c31 struct dma_channel channel; member in struct:ux500_dma_channel
53 struct dma_channel *channel = private_data; local
54 struct ux500_dma_channel *ux500_channel = channel->private_data;
63 ux500_channel->channel.actual_len = ux500_channel->cur_len;
64 ux500_channel->channel.status = MUSB_DMA_STATUS_FREE;
70 static bool ux500_configure_channel(struct dma_channel *channel, argument
74 struct ux500_dma_channel *ux500_channel = channel->private_data;
120 dma_desc->callback_param = channel;
137 /* 8 DMA channels (0 - 7). Each DMA channel can only be allocated
138 * to specified hw_ep. For example DMA channel
163 ux500_dma_channel_release(struct dma_channel *channel) argument
177 ux500_dma_is_compatible(struct dma_channel *channel, u16 maxpacket, void *buf, u32 length) argument
189 ux500_dma_channel_program(struct dma_channel *channel, u16 packet_sz, u8 mode, dma_addr_t dma_addr, u32 len) argument
207 ux500_dma_channel_abort(struct dma_channel *channel) argument
242 struct dma_channel *channel; local
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/linux-master/drivers/net/wwan/iosm/
H A Diosm_ipc_imem.c151 /* The instance ID is same as channel ID because this is been reused
152 * for channel alloc function.
221 struct ipc_mem_channel *channel; local
230 channel = &ipc_imem->channels[i];
232 if (channel->state != IMEM_CHANNEL_ACTIVE)
235 pipe = &channel->ul_pipe;
238 ul_list = &channel->ul_list;
241 if (!ipc_imem_check_wwan_ips(channel)) {
307 switch (pipe->channel->ctype) {
309 port_id = pipe->channel
338 struct ipc_mem_channel *channel; local
397 struct ipc_mem_channel *channel; local
452 struct ipc_mem_channel *channel; local
964 struct ipc_mem_channel *channel; local
999 struct ipc_mem_channel *channel; local
1054 ipc_imem_channel_free(struct ipc_mem_channel *channel) argument
1063 struct ipc_mem_channel *channel; local
1098 struct ipc_mem_channel *channel; local
1131 struct ipc_mem_channel *channel; local
1173 struct ipc_mem_channel *channel; local
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/linux-master/drivers/gpu/host1x/hw/
H A Dhw_host1x01_sync.h68 static inline u32 host1x_sync_cf_setup_r(unsigned int channel) argument
70 return 0x80 + channel * REGISTER_STRIDE;
72 #define HOST1X_SYNC_CF_SETUP(channel) \
73 host1x_sync_cf_setup_r(channel)
158 static inline u32 host1x_sync_cbread_r(unsigned int channel) argument
160 return 0x720 + channel * REGISTER_STRIDE;
162 #define HOST1X_SYNC_CBREAD(channel) \
163 host1x_sync_cbread_r(channel)
212 static inline u32 host1x_sync_cbstat_r(unsigned int channel) argument
214 return 0x758 + channel * REGISTER_STRID
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H A Dhw_host1x02_sync.h68 static inline u32 host1x_sync_cf_setup_r(unsigned int channel) argument
70 return 0x80 + channel * REGISTER_STRIDE;
72 #define HOST1X_SYNC_CF_SETUP(channel) \
73 host1x_sync_cf_setup_r(channel)
158 static inline u32 host1x_sync_cbread_r(unsigned int channel) argument
160 return 0x720 + channel * REGISTER_STRIDE;
162 #define HOST1X_SYNC_CBREAD(channel) \
163 host1x_sync_cbread_r(channel)
212 static inline u32 host1x_sync_cbstat_r(unsigned int channel) argument
214 return 0x758 + channel * REGISTER_STRID
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H A Dhw_host1x04_sync.h68 static inline u32 host1x_sync_cf_setup_r(unsigned int channel) argument
70 return 0xc00 + channel * REGISTER_STRIDE;
72 #define HOST1X_SYNC_CF_SETUP(channel) \
73 host1x_sync_cf_setup_r(channel)
158 static inline u32 host1x_sync_cbread_r(unsigned int channel) argument
160 return 0xc80 + channel * REGISTER_STRIDE;
162 #define HOST1X_SYNC_CBREAD(channel) \
163 host1x_sync_cbread_r(channel)
212 static inline u32 host1x_sync_cbstat_r(unsigned int channel) argument
214 return 0xcc0 + channel * REGISTER_STRID
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H A Dhw_host1x05_sync.h68 static inline u32 host1x_sync_cf_setup_r(unsigned int channel) argument
70 return 0xc00 + channel * REGISTER_STRIDE;
72 #define HOST1X_SYNC_CF_SETUP(channel) \
73 host1x_sync_cf_setup_r(channel)
158 static inline u32 host1x_sync_cbread_r(unsigned int channel) argument
160 return 0xc80 + channel * REGISTER_STRIDE;
162 #define HOST1X_SYNC_CBREAD(channel) \
163 host1x_sync_cbread_r(channel)
212 static inline u32 host1x_sync_cbstat_r(unsigned int channel) argument
214 return 0xcc0 + channel * REGISTER_STRID
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/linux-master/drivers/net/wireless/broadcom/brcm80211/include/
H A Dbrcmu_wifi.h13 * A chanspec (u16) holds the channel number, band, bandwidth and control
17 /* channel defines */
28 #define CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */
36 * max # supported channels. The max channel no is 216, this is that + 1
66 #define WL_CHAN_BAND_5G (1 << 2) /* 5GHz-band channel */
67 #define WL_CHAN_RADAR (1 << 3) /* radar sensitive channel */
69 #define WL_CHAN_PASSIVE (1 << 5) /* channel in passive mode */
70 #define WL_CHAN_RESTRICTED (1 << 6) /* restricted use channel */
139 static inline int lower_20_sb(int channel) argument
141 return channel > CH_10MHZ_APAR
144 upper_20_sb(int channel) argument
155 ch20mhz_chspec(int channel) argument
164 next_20mhz_chan(int channel) argument
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/linux-master/drivers/gpu/drm/imx/ipuv3/
H A Dimx-ldb.c60 struct imx_ldb_channel *channel; member in struct:imx_ldb_encoder
84 return container_of(c, struct imx_ldb_encoder, connector)->channel;
89 return container_of(e, struct imx_ldb_encoder, encoder)->channel;
101 struct imx_ldb_channel channel[2]; member in struct:imx_ldb
220 if (imx_ldb_ch == &ldb->channel[0] || dual) {
227 if (imx_ldb_ch == &ldb->channel[1] || dual) {
238 if (imx_ldb_ch == &ldb->channel[0])
240 else if (imx_ldb_ch == &ldb->channel[1])
296 if (imx_ldb_ch == &ldb->channel[0] || dual) {
302 if (imx_ldb_ch == &ldb->channel[
552 imx_ldb_panel_ddc(struct device *dev, struct imx_ldb_channel *channel, struct device_node *child) argument
601 struct imx_ldb_channel *channel = &imx_ldb->channel[i]; local
672 struct imx_ldb_channel *channel; local
745 struct imx_ldb_channel *channel = &imx_ldb->channel[i]; local
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/linux-master/drivers/media/platform/st/sti/c8sectpfe/
H A Dc8sectpfe-core.c67 struct channel_info *channel; local
72 channel = fei->channel_data[chan_num];
75 if (channel->irec && readl(channel->irec + DMA_PRDS_TPENABLE))
76 tasklet_schedule(&channel->tsklet);
85 struct channel_info *channel = from_tasklet(channel, t, tsklet); local
91 if (unlikely(!channel || !channel->irec))
94 fei = channel
142 struct channel_info *channel; local
263 struct channel_info *channel; local
869 struct channel_info *channel; local
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/linux-master/drivers/mailbox/
H A Dtegra-hsp.c70 struct tegra_hsp_channel channel; member in struct:tegra_hsp_doorbell
78 void (*send)(struct tegra_hsp_channel *channel, void *data);
79 void (*recv)(struct tegra_hsp_channel *channel);
83 struct tegra_hsp_channel channel; member in struct:tegra_hsp_mailbox
137 static inline u32 tegra_hsp_channel_readl(struct tegra_hsp_channel *channel, argument
140 return readl(channel->regs + offset);
143 static inline void tegra_hsp_channel_writel(struct tegra_hsp_channel *channel, argument
146 writel(value, channel->regs + offset);
153 value = tegra_hsp_channel_readl(&db->channel, HSP_DB_ENABLE);
193 value = tegra_hsp_channel_readl(&db->channel, HSP_DB_PENDIN
372 tegra_hsp_sm_send32(struct tegra_hsp_channel *channel, void *data) argument
383 tegra_hsp_sm_recv32(struct tegra_hsp_channel *channel) argument
408 tegra_hsp_sm_send128(struct tegra_hsp_channel *channel, void *data) argument
425 tegra_hsp_sm_recv128(struct tegra_hsp_channel *channel) argument
585 struct tegra_hsp_channel *channel = ERR_PTR(-ENODEV); local
654 struct tegra_hsp_channel *channel; local
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/linux-master/drivers/clk/bcm/
H A Dclk-ns2.c49 .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
55 .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
61 .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
67 .channel = BCM_NS2_GENPLL_SCR_CH3_UNUSED,
73 .channel = BCM_NS2_GENPLL_SCR_CH4_UNUSED,
79 .channel = BCM_NS2_GENPLL_SCR_CH5_UNUSED,
111 .channel = BCM_NS2_GENPLL_SW_RPE_CLK,
117 .channel = BCM_NS2_GENPLL_SW_250_CLK,
123 .channel = BCM_NS2_GENPLL_SW_NIC_CLK,
129 .channel
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/linux-master/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_rf.h39 u8 channel; member in struct:zd_rf
41 /* whether channel integration and calibration should be updated
56 int (*set_channel)(struct zd_rf *rf, u8 channel);
59 int (*patch_6m_band_edge)(struct zd_rf *rf, u8 channel);
70 int zd_rf_set_channel(struct zd_rf *rf, u8 channel);
75 int zd_rf_patch_6m_band_edge(struct zd_rf *rf, u8 channel);
76 int zd_rf_generic_patch_6m(struct zd_rf *rf, u8 channel);
/linux-master/arch/powerpc/boot/dts/fsl/
H A Dpq3-sec2.1-0.dtsi40 fsl,channel-fifo-len = <24>;
H A Dpq3-sec3.0-0.dtsi42 fsl,channel-fifo-len = <24>;

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