Searched refs:u8 (Results 126 - 150 of 2104) sorted by relevance

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/u-boot/board/phytec/common/
H A Dam6_som_detection.h18 u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data);
19 u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data);
20 u8 __maybe_unused phytec_get_am6_eth(struct phytec_eeprom_data *data);
21 u8 __maybe_unused phytec_get_am6_rtc(struct phytec_eeprom_data *data);
25 u8 spi = phytec_get_am6_spi(data);
/u-boot/arch/x86/include/asm/
H A Dpirq_routing.h28 u8 bus; /* Bus number */
29 u8 devfn; /* Device and function number */
31 u8 link; /* IRQ line ID, 0=not routed */
34 u8 slot; /* Slot number, 0=onboard */
35 u8 rfu;
42 u8 rtr_bus; /* busno of the interrupt router */
43 u8 rtr_devfn; /* devfn of the interrupt router */
48 u8 rfu[11];
49 u8 checksum; /* Modulo 256 checksum must give zero */
80 bool pirq_check_irq_routed(struct udevice *dev, int link, u8 ir
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/u-boot/arch/powerpc/include/asm/
H A Dimmap_83xx.h36 u8 res0[0x04];
38 u8 res1[0x14];
40 u8 res2[0x20];
42 u8 res3[0x10];
44 u8 res4[0x10];
46 u8 res5[0x50];
50 u8 res6[0x04];
54 u8 res7[0x04];
60 u8 res8[0xC];
67 u8 res
[all...]
/u-boot/arch/m68k/include/asm/
H A Dfsl_i2c.h20 u8 adr; /* I2C slave address */
21 u8 res0[3];
26 u8 fdr; /* I2C frequency divider register */
27 u8 res1[3];
32 u8 cr; /* I2C control redister */
33 u8 res2[3];
42 u8 sr; /* I2C status register */
43 u8 res3[3];
53 u8 dr; /* I2C data register */
54 u8 res
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H A Duart.h17 u8 umr; /* 0x00 Mode Register */
18 u8 resv0[0x3];
20 u8 usr; /* 0x04 Status Register */
21 u8 ucsr; /* 0x04 Clock Select Register */
23 u8 resv1[0x3];
24 u8 ucr; /* 0x08 Command Register */
25 u8 resv2[0x3];
27 u8 utb; /* 0x0c Transmit Buffer */
28 u8 urb; /* 0x0c Receive Buffer */
30 u8 resv
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/u-boot/drivers/net/octeontx/
H A Dnic.h119 u8 cq_idx; /* Completion queue index */
139 u8 hash_bits;
141 u8 ind_tbl[NIC_MAX_RSS_IDR_TBL_SIZE];
214 u8 bgx_cnt;
215 u8 chans_per_lmac;
216 u8 chans_per_bgx; /* Rx/Tx chans */
217 u8 chans_per_rgx;
218 u8 chans_per_lbk;
224 u8 tl2_cnt;
225 u8 tl1_cn
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/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun50i_h616.h30 u8 reserved_0x004[4]; /* 0x004 */
33 u8 reserved_0x010[4]; /* 0x010 */
35 u8 reserved_0x018[8]; /* 0x018 */
39 u8 reserved_0x02c[468]; /* 0x02c */
41 u8 reserved_0x204[12]; /* 0x204 */
49 u8 reserved_0x8[8]; /* 0x8 */
51 u8 reserved_0x4a0[96]; /* 0x4a0 */
71 u8 reserved_0x028[8]; /* 0x028 */
75 u8 reserved_0x03c[20]; /* 0x03c */
78 u8 reserved_0x05
[all...]
H A Drsb.h22 u8 res0[8]; /* 0x14 */
24 u8 res1[4]; /* 0x20 */
50 int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data);
51 int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data);
/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dh616_ddr3_1333.c23 u8 tccd = 2; /* JEDEC: 4nCK */
24 u8 tfaw = ns_to_t(50); /* JEDEC: 30 ns w/ 1K pages */
25 u8 trrd = max(ns_to_t(6), 4); /* JEDEC: max(6 ns, 4nCK) */
26 u8 trcd = ns_to_t(15); /* JEDEC: 13.5 ns */
27 u8 trc = ns_to_t(53); /* JEDEC: 49.5 ns */
28 u8 txp = max(ns_to_t(6), 3); /* JEDEC: max(6 ns, 3nCK) */
29 u8 trtp = max(ns_to_t(8), 2); /* JEDEC: max(7.5 ns, 4nCK) */
30 u8 trp = ns_to_t(15); /* JEDEC: >= 13.75 ns */
31 u8 tras = ns_to_t(38); /* JEDEC >= 36 ns, <= 9*trefi */
36 u8 tmr
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H A Dddr3_1333.c10 u8 tccd = 2;
11 u8 tfaw = ns_to_t(50);
12 u8 trrd = max(ns_to_t(10), 4);
13 u8 trcd = ns_to_t(15);
14 u8 trc = ns_to_t(53);
15 u8 txp = max(ns_to_t(8), 3);
16 u8 twtr = max(ns_to_t(8), 4);
17 u8 trtp = max(ns_to_t(8), 4);
18 u8 twr = max(ns_to_t(15), 3);
19 u8 tr
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/u-boot/drivers/usb/gadget/
H A Du_os_desc.h37 static inline u8 *__usb_ext_prop_ptr(u8 *buf, size_t offset)
42 static inline u8 *usb_ext_prop_size_ptr(u8 *buf)
47 static inline u8 *usb_ext_prop_type_ptr(u8 *buf)
52 static inline u8 *usb_ext_prop_name_len_ptr(u8 *buf)
57 static inline u8 *usb_ext_prop_name_ptr(u8 *bu
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/u-boot/include/acpi/
H A Dacpi_table.h41 u8 checksum; /* Checksum of the first 20 bytes */
43 u8 revision; /* 0 for ACPI 1.0, others 2 */
47 u8 ext_checksum; /* Checksum of the whole table */
48 u8 reserved[3];
55 u8 revision; /* Table version (not ACPI version!) */
56 volatile u8 checksum; /* To make sum of entire table == 0 */
74 u8 space_id;
76 u8 bit_width;
78 u8 bit_offset;
90 u8 access_siz
[all...]
/u-boot/arch/arm/mach-tegra/
H A Dcrypto.c13 static u8 zero_key[16];
30 static void left_shift_vector(u8 *in, u8 *out, int size)
50 static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst,
53 u8 tmp_data[AES128_KEY_LENGTH];
54 u8 iv[AES128_KEY_LENGTH] = {0};
55 u8 lef
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/u-boot/drivers/ram/cadence/
H A Dddr_ctrl.c80 static void ddrc_writeb(u8 val, void *p)
104 reg = (u8 *)base + DDR_CS0_MR1_REG;
106 reg = (u8 *)base + DDR_CS1_MR1_REG;
128 reg = (u8 *)base + DDR_CS0_MR2_REG;
130 reg = (u8 *)base + DDR_CS1_MR2_REG;
151 reg = (u8 *)base + DDR_CS0_ODT_MAP_REG;
153 reg = (u8 *)base + DDR_CS1_ODT_MAP_REG;
158 void cdns_ddr_set_odt_times(void *base, u8 TODTL_2CMD, u8 TODTH_WR, u8 TODTH_R
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/u-boot/drivers/usb/musb-new/
H A Dmusb_host.h34 u8 mux; /* qh multiplexed to hw_ep */
39 u8 type_reg; /* {rx,tx} type register */
40 u8 intv_reg; /* {rx,tx} interval register */
41 u8 addr_reg; /* device address register */
42 u8 h_addr_reg; /* hub address register */
43 u8 h_port_reg; /* hub port register */
45 u8 is_ready; /* safe to modify hw_ep */
46 u8 type; /* XFERTYPE_* */
47 u8 epnum;
48 u8 hb_mul
[all...]
/u-boot/include/linux/usb/
H A Dmusb.h43 u8 hw_ep_num;
65 u8 bits;
85 u8 num_eps; /* number of endpoints _with_ ep0 */
86 u8 dma_channels __deprecated; /* number of dma channels */
87 u8 dyn_fifo_size; /* dynamic size in bytes */
88 u8 vendor_ctrl __deprecated; /* vendor control reg width */
89 u8 vendor_stat __deprecated; /* vendor status reg witdh */
90 u8 dma_req_chan __deprecated; /* bitmask for required dma channels */
91 u8 ram_bits; /* ram address size */
98 u8 mod
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/u-boot/include/linux/soc/ti/
H A Dti_sci_protocol.h27 u8 abi_major;
28 u8 abi_minor;
199 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid,
202 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
203 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
204 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u8 cid,
206 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u8 cid,
208 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u8 cid,
210 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
211 u8 parent_i
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/u-boot/drivers/net/bnxt/
H A Dbnxt_hsi.h76 u8 hwrm_intf_maj;
77 u8 hwrm_intf_min;
78 u8 hwrm_intf_upd;
79 u8 unused_0[5];
88 u8 hwrm_intf_maj_8b;
89 u8 hwrm_intf_min_8b;
90 u8 hwrm_intf_upd_8b;
91 u8 hwrm_intf_rsvd_8b;
92 u8 hwrm_fw_maj_8b;
93 u8 hwrm_fw_min_8
[all...]
/u-boot/board/gateworks/gw_ventana/
H A Deeprom.h13 u8 mac0[6]; /* 0x00: MAC1 */
14 u8 mac1[6]; /* 0x06: MAC2 */
15 u8 res0[12]; /* 0x0C: reserved */
17 u8 res1[4]; /* 0x1C: reserved */
18 u8 mfgdate[4]; /* 0x20: MFG date (read only) */
19 u8 res2[7]; /* 0x24 */
21 u8 sdram_size; /* 0x2B: (16 << n) MB */
22 u8 sdram_speed; /* 0x2C: (33.333 * n) MHz */
23 u8 sdram_width; /* 0x2D: (8 << n) bit */
25 u8 cpu_spee
[all...]
/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dme.h21 u8 num_icc_profiles;
22 u8 icc_profile_soft_strap;
23 u8 icc_profile_index;
24 u8 reserved;
40 u8 available;
45 u8 available;
/u-boot/arch/m68k/include/asm/coldfire/
H A Dedma.h24 u8 serq; /* 0x18 Set Enable Request */
25 u8 cerq; /* 0x19 Clear Enable Request */
26 u8 seei; /* 0x1A Set En Error Interrupt Request */
27 u8 ceei; /* 0x1B Clear En Error Interrupt Request */
28 u8 cint; /* 0x1C Clear Interrupt Enable */
29 u8 cerr; /* 0x1D Clear Error */
30 u8 ssrt; /* 0x1E Set START Bit */
31 u8 cdne; /* 0x1F Clear DONE Status Bit */
37 u8 dchpri0; /* 0x100 Channel 0 Priority */
38 u8 dchpri
[all...]
/u-boot/include/net/
H A Dtcp.h33 u8 ip_hl_v;
34 u8 ip_tos;
38 u8 ip_ttl;
39 u8 ip_p;
47 u8 tcp_hlen;
48 u8 tcp_flags;
98 u8 kind;
99 u8 len;
111 u8 kind;
112 u8 le
[all...]
/u-boot/board/variscite/common/
H A Deth.c12 static u64 mac2int(const u8 hwaddr[])
14 u8 i;
16 const u8 *p = hwaddr;
24 static void int2mac(const u64 mac, u8 *hwaddr)
26 u8 i;
27 u8 *p = hwaddr;
/u-boot/board/phytium/pe2201/
H A Dddr.c15 u8 dimm_type; /* 1: RDIMM; 2: UDIMM; 3: SODIMM; 4: LRDIMM */
16 u8 data_width; /* 0: x4; 1: x8; 2: x16; 3: x32 */
17 u8 mirror_type; /* 0: standard; 1: mirror */
18 u8 ecc_type; /* 0: no-ecc; 1: ecc */
19 u8 dram_type; /* 0xB: DDR3; 0xC: DDR4 */
20 u8 rank_num;
21 u8 row_num;
22 u8 col_num;
24 u8 bg_num; /* DDR4/DDR5 */
25 u8 bank_nu
[all...]
/u-boot/fs/yaffs2/
H A Dyaffs_tagscompat.h22 const u8 *data, const struct yaffs_ext_tags *tags);
25 u8 *data, struct yaffs_ext_tags *tags);
34 int yaffs_count_bits(u8 byte);

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