Lines Matching refs:u8
17 u8 umr; /* 0x00 Mode Register */
18 u8 resv0[0x3];
20 u8 usr; /* 0x04 Status Register */
21 u8 ucsr; /* 0x04 Clock Select Register */
23 u8 resv1[0x3];
24 u8 ucr; /* 0x08 Command Register */
25 u8 resv2[0x3];
27 u8 utb; /* 0x0c Transmit Buffer */
28 u8 urb; /* 0x0c Receive Buffer */
30 u8 resv3[0x3];
32 u8 uipcr; /* 0x10 Input Port Change Register */
33 u8 uacr; /* 0x10 Auxiliary Control reg */
35 u8 resv4[0x3];
37 u8 uimr; /* 0x14 Interrupt Mask reg */
38 u8 uisr; /* 0x14 Interrupt Status reg */
40 u8 resv5[0x3];
41 u8 ubg1; /* 0x18 Counter Timer Upper Register */
42 u8 resv6[0x3];
43 u8 ubg2; /* 0x1c Counter Timer Lower Register */
44 u8 resv7[0x17];
45 u8 uip; /* 0x34 Input Port Register */
46 u8 resv8[0x3];
47 u8 uop1; /* 0x38 Output Port Set Register */
48 u8 resv9[0x3];
49 u8 uop0; /* 0x3c Output Port Reset Register */