Searched refs:enable (Results 151 - 175 of 551) sorted by relevance

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/u-boot/drivers/clk/imx/
H A Dclk-imxrt1170.c46 static int __imxrt1170_clk_enable(struct clk *clk, bool enable) argument
51 debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
57 if (enable)
96 .enable = imxrt1170_clk_enable,
H A Dclk-pllv3.c146 .enable = clk_pllv3_generic_enable,
153 .enable = clk_pllv3_generic_enable,
198 .enable = clk_pllv3_generic_enable,
266 .enable = clk_pllv3_generic_enable,
280 .enable = clk_pllv3_generic_enable,
/u-boot/arch/arm/mach-mvebu/
H A Ddram.c58 u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz); local
60 if ((!enable) || (bank > BANK3))
94 u32 enable = 0x01 & readl(&base->sdram_bank[bank].win_sz); local
96 if ((!enable) || (bank > BANK3))
/u-boot/drivers/pinctrl/nexell/
H A Dpinctrl-s5pxx18.c22 static void nx_gpio_set_bit(u32 *value, u32 bit, int enable) argument
28 newvalue |= (u32)enable << bit;
77 static void nx_alive_set_pullup(void *base, u32 pin, bool enable) argument
82 if (enable)
/u-boot/drivers/video/rockchip/
H A Drk3399_hdmi.c63 .enable = rk3399_hdmi_enable,
/u-boot/drivers/cache/
H A Dcache-sifive-ccache.c47 .enable = sifive_ccache_enable,
/u-boot/drivers/clk/meson/
H A Daxg-ao.c70 .enable = meson_clk_enable,
H A Dg12a-ao.c70 .enable = meson_clk_enable,
/u-boot/drivers/clk/stm32/
H A Dclk-stm32-core.c74 .enable = ccf_clk_enable,
84 u8 *cpt, u16 gate_id, int enable)
90 if (enable) {
132 .enable = clk_stm32_gate_enable,
82 clk_stm32_gate_set_state(void __iomem *base, const struct clk_stm32_clock_data *data, u8 *cpt, u16 gate_id, int enable) argument
/u-boot/board/ge/mx53ppd/
H A Dmx53ppd_video.c75 .enable = do_enable_backlight,
/u-boot/test/dm/
H A Dregulator.c180 /* Test regulator set and get enable if allowed method */
314 * @enable: output enable state: true/false
319 bool enable; member in struct:setting
346 .enable = SANDBOX_LDO1_AUTOSET_EXPECTED_ENABLE,
351 .enable = SANDBOX_LDO2_AUTOSET_EXPECTED_ENABLE,
399 expected_setting_list[i].enable);
/u-boot/drivers/video/
H A Dsandbox_dsi_host.c76 .enable = sandbox_dsi_host_enable,
H A Ddw_hdmi.c239 /* enable tx stuffing: when de is inactive, fix the output data to 0 */
335 static void hdmi_phy_enable_power(struct dw_hdmi *hdmi, uint enable) argument
338 enable << HDMI_PHY_CONF0_PDZ_OFFSET);
341 static void hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, uint enable) argument
344 enable << HDMI_PHY_CONF0_ENTMDS_OFFSET);
347 static void hdmi_phy_enable_spare(struct dw_hdmi *hdmi, uint enable) argument
350 enable << HDMI_PHY_CONF0_SPARECTRL_OFFSET);
353 static void hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, uint enable) argument
356 enable << HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET);
359 static void hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, uint enable) argument
366 hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, uint enable) argument
373 hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, uint enable) argument
[all...]
/u-boot/drivers/video/nexell/
H A Ds5pxx18_dp_rgb.c57 if (!plane->enable)
/u-boot/arch/arm/mach-tegra/
H A Dcpu.c302 void enable_cpu_clock(int enable) argument
310 * Regardless of whether the request is to enable or disable the CPU
316 if (enable) {
338 clk |= !enable << CPU0_CLK_STP_SHIFT;
421 void clock_enable_coresight(int enable) argument
426 clock_set_enable(PERIPH_ID_CORESIGHT, enable);
427 reset_set_enable(PERIPH_ID_CORESIGHT, !enable);
429 if (enable) {
/u-boot/arch/mips/mach-octeon/
H A Dcvmx-helper.c67 * @param enable Method to enable an interface
80 int (*enable)(int xiface); member in struct:iface_ops
103 .enable = __cvmx_helper_rgmii_enable,
118 .enable = __cvmx_helper_rgmii_enable,
133 .enable = __cvmx_helper_sgmii_enable,
148 .enable = __cvmx_helper_bgx_sgmii_enable,
163 .enable = __cvmx_helper_sgmii_enable,
178 .enable = __cvmx_helper_xaui_enable,
193 .enable
[all...]
/u-boot/drivers/phy/rockchip/
H A Dphy-rockchip-inno-usb2.c33 unsigned int enable; member in struct:usb2phy_reg
57 if (!reg->offset && !reg->enable && !reg->disable)
60 tmp = en ? reg->enable : reg->disable;
74 if (!reg->offset && !reg->enable && !reg->disable)
128 dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret);
181 * enable() - Enable a clock.
222 .enable = rockchip_usb2phy_clk_enable,
/u-boot/drivers/input/
H A Dapple_spi_kbd.c72 struct gpio_desc enable; member in struct:apple_spi_kbd_priv
234 ret = gpio_request_by_name(dev, "spien-gpios", 0, &priv->enable,
240 dm_gpio_set_value(&priv->enable, 1);
242 dm_gpio_set_value(&priv->enable, 0);
246 dm_gpio_set_value(&priv->enable, 1);
/u-boot/drivers/clk/altera/
H A Dclk-arria10.c86 static int socfpga_a10_clk_endisable(struct clk *clk, bool enable) argument
92 if (!enable && plat->gate_reg)
100 if (enable)
106 if (enable && plat->gate_reg)
175 .enable = socfpga_a10_clk_enable,
/u-boot/arch/arm/mach-tegra/tegra124/
H A Dxusb-padctl.c116 if (padctl->enable++ > 0)
142 if (padctl->enable == 0) {
143 pr_err("unbalanced enable/disable");
147 if (--padctl->enable > 0)
291 .enable = pcie_phy_enable,
298 .enable = sata_phy_enable,
/u-boot/drivers/usb/musb-new/
H A Dmusb_core.h211 void (*enable)(struct musb *musb); member in struct:musb_platform_ops
213 int (*enable)(struct musb *musb); member in struct:musb_platform_ops
526 if (musb->ops->enable)
527 musb->ops->enable(musb);
532 if (!musb->ops->enable)
535 return musb->ops->enable(musb);
/u-boot/drivers/video/exynos/
H A Dexynos_mipi_dsi_common.c234 int exynos_mipi_dsi_pll_on(struct mipi_dsim_device *dsim, unsigned int enable) argument
238 if (enable) {
342 unsigned int byte_clk_sel, unsigned int enable)
348 if (enable) {
385 /* enable escape clock. */
388 /* enable byte clk and escape clock */
459 unsigned int enable)
461 /* enable only frame done interrupt */
462 exynos_mipi_dsi_set_interrupt_mask(dsim, INTMSK_FRAME_DONE, enable);
341 exynos_mipi_dsi_set_clock(struct mipi_dsim_device *dsim, unsigned int byte_clk_sel, unsigned int enable) argument
458 exynos_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim, unsigned int enable) argument
/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_ip_prv_if.h23 typedef int (*HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR)(u8 dev_num, int enable);
63 u32 dev_num, int enable);
/u-boot/drivers/video/nexell/soc/
H A Ds5pxx18_soc_disptop.c138 void nx_disp_top_set_hdmifield(u32 enable, u32 init_val, u32 vsynctoggle, argument
146 regvalue = ((enable & 0x01) << 0) | ((init_val & 0x01) << 1) |
/u-boot/arch/arm/mach-npcm/npcm7xx/
H A Dl2_cache_pl310_init.S29 ORR r1, r1, #(1 << 29) @ Instruction prefetch enable
30 ORR r1, r1, #(1 << 28) @ Data prefetch enable

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