/u-boot/board/atmel/sama5d3_xplained/ |
H A D | sama5d3_xplained.c | 143 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/sama5d2_xplained/ |
H A D | sama5d2_xplained.c | 118 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/at91sam9m10g45ek/ |
H A D | at91sam9m10g45ek.c | 101 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/sama5d27_som1_ek/ |
H A D | sama5d27_som1_ek.c | 118 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/gardena/smart-gateway-at91sam/ |
H A D | spl.c | 84 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/arch/arm/mach-at91/include/mach/ |
H A D | atmel_mpddrc.h | 16 u32 cr; member in struct:atmel_mpddrc_config 33 u32 cr; /* 0x08: Configuration Register */ member in struct:atmel_mpddr
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/u-boot/arch/arm/include/asm/arch-sunxi/ |
H A D | dram_sun9i.h | 19 u32 cr; /* 0x00 */ member in struct:sunxi_mctl_com_reg 140 u32 cr; /* impedance control register */ member in struct:sunxi_mctl_phy_reg::ddrphy_zq
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H A D | dram_sun50i_h616.h | 29 u32 cr; /* 0x000 control register */ member in struct:sunxi_mctl_com_reg
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/u-boot/arch/m68k/include/asm/ |
H A D | immap_520x.h | 180 u8 cr; /* 0x02 Control */ member in struct:pll_ctrl 190 u16 cr; /* 0x00 Control */ member in struct:wdog_ctrl
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/u-boot/drivers/misc/imx8/ |
H A D | scu.c | 27 u32 cr; member in struct:mu_type 47 clrbits_le32(&base->cr, MU_CR_GIE_MASK | MU_CR_RIE_MASK |
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/u-boot/arch/arm/mach-sunxi/ |
H A D | dram_sun8i_a23.c | 288 &mctl_com->cr); 295 clrsetbits_le32(&mctl_com->cr, MCTL_CR_ROW_MASK, 303 &mctl_com->cr);
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/u-boot/arch/m68k/include/asm/coldfire/ |
H A D | ssi.h | 17 u32 cr; member in struct:ssi
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H A D | edma.h | 18 u32 cr; /* 0x00 Control Register */ member in struct:edma_ctrl
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/u-boot/drivers/serial/ |
H A D | atmel_usart.h | 15 u32 cr; member in struct:atmel_usart3
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/u-boot/arch/arm/include/asm/arch-imx8ulp/ |
H A D | imx-regs.h | 74 u32 cr; member in struct:mu_type
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/u-boot/arch/m68k/cpu/mcf523x/ |
H A D | cpu_init.c | 46 out_be16(&wdog->cr, 0);
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/u-boot/drivers/pci/ |
H A D | pcie_rockchip.c | 217 u32 cr, val, status; local 293 cr = PCIE_CLIENT_GEN_SEL_1; 295 cr |= PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC; 296 writel(cr, priv->apb_base + PCIE_CLIENT_CONFIG);
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/u-boot/board/siemens/smartweb/ |
H A D | smartweb.c | 247 setting.cr = SDRAM_BASE_CONF;
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/u-boot/board/atmel/sama5d4ek/ |
H A D | sama5d4ek.c | 142 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/sama5d4_xplained/ |
H A D | sama5d4_xplained.c | 156 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/at91sam9x5ek/ |
H A D | at91sam9x5ek.c | 155 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/atmel/sama5d27_wlsom1_ek/ |
H A D | sama5d27_wlsom1_ek.c | 150 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_9 |
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/u-boot/board/atmel/sama5d2_icp/ |
H A D | sama5d2_icp.c | 152 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/board/conclusive/kstr-sama5d27/ |
H A D | kstr-sama5d27.c | 153 ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
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/u-boot/drivers/mmc/ |
H A D | gen_atmel_mci.c | 439 writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */ 440 writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */ 441 writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */
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