Searched refs:uartclk (Results 126 - 140 of 140) sorted by relevance

123456

/linux-master/drivers/tty/serial/8250/
H A D8250_pci1xxxx.c627 port->port.uartclk = 64 * HZ_PER_MHZ;
H A D8250_bcm7271.c771 up->uartclk = best_freq;
1053 up.port.uartclk = priv->default_mux_rate;
H A D8250_pci.c1189 unsigned int sclk = port->uartclk * 2;
1544 port->port.uartclk = pci_quatech_clock(port);
4099 uart.port.uartclk = board->base_baud * 16;
/linux-master/drivers/tty/serial/
H A Dmen_z135_uart.c822 uart->port.uartclk = MEN_Z135_BASECLK * 16;
H A Dstm32-usart.c244 baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
1301 port->uartclk = uart_clk_pres;
1611 stm32port->port.uartclk = clk_get_rate(stm32port->clk);
1612 if (!stm32port->port.uartclk) {
H A Dcpm_uart.c503 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1314 pinfo->port.uartclk = ppc_proc_freq;
H A Dsunsab.c763 (up->port.uartclk / (16 * quot)));
987 up->port.uartclk = SAB_BASE_BAUD;
H A Dsamsung_tty.c1748 port->uartclk = 0;
1833 port->uartclk = 1;
1925 ourport->rx_irq, ourport->tx_irq, port->uartclk);
H A Dsunzilog.c1432 up[0].port.uartclk = ZS_CLOCK;
1450 up[1].port.uartclk = ZS_CLOCK;
H A Dpmac_zilog.c1415 uap->port.uartclk = ZS_CLOCK;
1636 uap->port.uartclk = ZS_CLOCK;
H A Dqcom_geni_serial.c1247 uport->uartclk = clk_rate;
H A Dsh-sci.c544 sci_port->port.uartclk = sci_port->clk_rates[SCI_FCK];
2453 * earlyprintk comes here early on with port->uartclk set to zero.
2460 if (!port->uartclk) {
/linux-master/include/linux/
H A Dserial_core.h465 unsigned int uartclk; /* base uart clock */ member in struct:uart_port
/linux-master/drivers/mfd/
H A Dsm501.c830 uart_data->uartclk = (9600 * 16);
/linux-master/drivers/ptp/
H A Dptp_ocp.c2261 uart.port.uartclk = 50000000;

Completed in 297 milliseconds

123456