Searched refs:resv (Results 76 - 100 of 272) sorted by relevance

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/linux-master/include/linux/
H A Ddma-buf.h93 * This is called with the &dmabuf.resv object locked and is mutual
117 * This is called with the dmabuf->resv object locked and is mutual
150 * This is always called with the dmabuf->resv object locked when
322 * protected by &dma_resv lock @resv.
382 * @resv:
429 struct dma_resv *resv; member in struct:dma_buf
532 * @resv: reservation-object, NULL to allocate default one
544 struct dma_resv *resv; member in struct:dma_buf_export_info
/linux-master/fs/xfs/scrub/
H A Dreap.c92 enum xfs_ag_resv_type resv; member in struct:xreap_state
349 if (rs->resv == XFS_AG_RESV_AGFL)
450 ASSERT(rs->resv == XFS_AG_RESV_NONE);
454 rs->resv, true);
463 if (rs->resv == XFS_AG_RESV_AGFL) {
480 rs->resv, true);
550 .resv = type,
662 .resv = XFS_AG_RESV_NONE,
/linux-master/drivers/net/ethernet/netronome/nfp/bpf/
H A Dfw.h113 __be32 resv; member in struct:cmsg_reply_map_op
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_busy.c141 * !dma_resv_test_signaled(obj->resv, DMA_RESV_USAGE_READ);
146 dma_resv_iter_begin(&cursor, obj->base.resv, DMA_RESV_USAGE_READ);
H A Di915_gem_lmem.c71 GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, DMA_RESV_USAGE_BOOKKEEP) &&
H A Di915_gem_ttm_move.c642 ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);
726 ret = dma_resv_reserve_fences(src_bo->base.resv, 1);
730 ret = dma_resv_reserve_fences(dst_bo->base.resv, 1);
734 ret = i915_deps_add_resv(&deps, dst_bo->base.resv, &ctx);
738 ret = i915_deps_add_resv(&deps, src_bo->base.resv, &ctx);
752 dma_resv_add_fence(dst_bo->base.resv, copy_fence, DMA_RESV_USAGE_WRITE);
753 dma_resv_add_fence(src_bo->base.resv, copy_fence, DMA_RESV_USAGE_READ);
H A Di915_gem_object.h147 #define assert_object_held(obj) dma_resv_assert_held((obj)->base.resv)
170 ret = dma_resv_lock_interruptible(obj->base.resv, ww ? &ww->ctx : NULL);
172 ret = dma_resv_lock(obj->base.resv, ww ? &ww->ctx : NULL);
206 return dma_resv_trylock(obj->base.resv);
208 return ww_mutex_trylock(&obj->base.resv->lock, &ww->ctx);
216 dma_resv_unlock(obj->base.resv);
/linux-master/drivers/gpu/drm/i915/
H A Di915_sw_fence.h93 struct dma_resv *resv,
H A Di915_vma.h276 #define assert_vma_held(vma) dma_resv_assert_held((vma)->obj->base.resv)
280 dma_resv_lock(vma->obj->base.resv, NULL);
285 dma_resv_unlock(vma->obj->base.resv);
/linux-master/drivers/gpu/drm/loongson/
H A Dlsdc_ttm.h70 struct dma_resv *resv);
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_prime.c46 struct dma_resv *robj = attach->dmabuf->resv;
H A Dnouveau_gem.c65 dma_resv_unlock(bo->base.resv);
115 drm_gpuvm_resv(&uvmm->base) != nvbo->bo.base.resv)
241 struct dma_resv *resv = NULL; local
249 resv = drm_gpuvm_resv(&uvmm->base);
272 if (resv)
273 dma_resv_lock(resv, NULL);
275 ret = nouveau_bo_init(nvbo, size, align, domain, NULL, resv);
277 if (resv)
278 dma_resv_unlock(resv);
723 lret = dma_resv_wait_timeout(nvbo->bo.base.resv,
[all...]
/linux-master/drivers/gpu/drm/xe/
H A Dxe_bo.h71 struct xe_tile *tile, struct dma_resv *resv,
144 dma_resv_assert_held((bo)->ttm.base.resv);
154 XE_WARN_ON(bo->vm && bo->ttm.base.resv != xe_vm_resv(bo->vm));
158 dma_resv_unlock(bo->ttm.base.resv);
/linux-master/tools/testing/selftests/powerpc/tm/
H A DMakefile5 TEST_GEN_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_sync.c229 * @resv: reservation object with embedded fence
236 struct dma_resv *resv, enum amdgpu_sync_mode mode,
243 if (resv == NULL)
247 dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, f) {
235 amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, struct dma_resv *resv, enum amdgpu_sync_mode mode, void *owner) argument
H A Damdgpu_vm_pt.c452 struct dma_resv *resv; local
485 bp.resv = vm->root.bo->tbo.base.resv;
497 if (!bp.resv)
498 WARN_ON(dma_resv_lock(bo->tbo.base.resv,
500 resv = bp.resv;
506 bp.resv = bo->tbo.base.resv;
512 if (!resv)
[all...]
H A Damdgpu_gem.c77 dma_resv_unlock(bo->base.resv);
101 struct dma_resv *resv,
116 bp.resv = resv;
178 abo->tbo.base.resv != vm->root.bo->tbo.base.resv)
321 struct dma_resv *resv = NULL; local
368 resv = vm->root.bo->tbo.base.resv;
375 flags, ttm_bo_type_device, resv,
98 amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, int alignment, u32 initial_domain, u64 flags, enum ttm_bo_type type, struct dma_resv *resv, struct drm_gem_object **obj, int8_t xcp_id_plus1) argument
[all...]
/linux-master/fs/xfs/
H A Dxfs_trans.h251 int xfs_trans_alloc_inode(struct xfs_inode *ip, struct xfs_trans_res *resv,
256 int xfs_trans_alloc_icreate(struct xfs_mount *mp, struct xfs_trans_res *resv,
263 int xfs_trans_alloc_dir(struct xfs_inode *dp, struct xfs_trans_res *resv,
/linux-master/include/drm/
H A Ddrm_gem.h38 #include <linux/dma-resv.h>
376 * @resv:
380 * Normally (@resv == &@_resv) except for imported GEM objects.
382 struct dma_resv *resv; member in struct:drm_gem_object
399 * (&drm_gem_object.resv) or a custom lock if one is provided.
580 * dma-resv lock, but with a custom lock.
589 dma_resv_held((obj)->resv))
/linux-master/mm/
H A Dhugetlb_cgroup.c414 void hugetlb_cgroup_uncharge_counter(struct resv_map *resv, unsigned long start, argument
417 if (hugetlb_cgroup_disabled() || !resv || !resv->reservation_counter ||
418 !resv->css)
421 page_counter_uncharge(resv->reservation_counter,
422 (end - start) * resv->pages_per_hpage);
423 css_put(resv->css);
426 void hugetlb_cgroup_uncharge_file_region(struct resv_map *resv, argument
431 if (hugetlb_cgroup_disabled() || !resv || !rg || !nr_pages)
434 if (rg->reservation_counter && resv
[all...]
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_bo.c288 dma_resv_assert_held(bo->base.resv);
382 .resv = params->resv,
400 params->sg, params->resv, destroy);
460 lret = dma_resv_wait_timeout(bo->base.resv, DMA_RESV_USAGE_READ,
647 ret = dma_resv_reserve_fences(bo->base.resv, 1);
649 dma_resv_add_fence(bo->base.resv, &fence->base,
/linux-master/drivers/gpu/drm/
H A Ddrm_mode_config.c32 #include <linux/dma-resv.h>
448 struct dma_resv resv; local
451 dma_resv_init(&resv);
460 ret = dma_resv_lock(&resv, &resv_ctx);
462 dma_resv_lock_slow(&resv, &resv_ctx);
464 dma_resv_unlock(&resv);
469 dma_resv_fini(&resv);
/linux-master/drivers/gpu/drm/etnaviv/
H A Detnaviv_gem_submit.c10 #include <linux/dma-resv.h>
116 dma_resv_unlock(obj->resv);
136 ret = dma_resv_lock_interruptible(obj->resv, ticket);
163 ret = dma_resv_lock_slow_interruptible(obj->resv, ticket);
180 struct dma_resv *robj = bo->obj->base.resv;
207 dma_resv_add_fence(obj->resv, submit->out_fence, write ?
/linux-master/include/rdma/
H A Dopa_smi.h32 __be16 resv; member in struct:opa_smp
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_cmd.h54 u8 resv; member in struct:hclgevf_ctrl_vector_chain

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