Searched refs:resv (Results 126 - 150 of 272) sorted by relevance

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/linux-master/drivers/dma-buf/
H A Ddma-buf-sysfs-stats.c9 #include <linux/dma-resv.h>
/linux-master/drivers/gpu/drm/msm/
H A Dmsm_gem_shrinker.c78 return dma_resv_wait_timeout(obj->resv, usage, false, 10) > 0;
/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_job.c361 dma_resv_lock(obj->resv, NULL);
363 obj->resv, usage);
364 dma_resv_unlock(obj->resv);
593 dma_resv_add_fence(obj->resv, &job->base.s_fence->finished, usage);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_hmm.c81 r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,
H A Damdgpu_object.h57 struct dma_resv *resv; member in struct:amdgpu_bo_param
338 int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
H A Damdgpu_ttm.c279 * @resv: resv object to sync to
291 struct dma_resv *resv,
331 r = amdgpu_copy_buffer(ring, from, to, cur_size, resv,
377 bo->base.resv, &fence);
1402 dma_resv_for_each_fence(&resv_cursor, bo->base.resv,
2118 struct dma_resv *resv,
2141 if (!resv)
2144 return drm_sched_job_add_resv_dependencies(&(*job)->base, resv,
2150 struct dma_resv *resv,
287 amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, const struct amdgpu_copy_mem *src, const struct amdgpu_copy_mem *dst, uint64_t size, bool tmz, struct dma_resv *resv, struct dma_fence **f) argument
2115 amdgpu_ttm_prepare_job(struct amdgpu_device *adev, bool direct_submit, unsigned int num_dw, struct dma_resv *resv, bool vm_needs_flush, struct amdgpu_job **job, bool delayed) argument
2148 amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, uint64_t dst_offset, uint32_t byte_count, struct dma_resv *resv, struct dma_fence **fence, bool direct_submit, bool vm_needs_flush, uint32_t copy_flags) argument
2201 amdgpu_ttm_fill_mem(struct amdgpu_ring *ring, uint32_t src_data, uint64_t dst_addr, uint32_t byte_count, struct dma_resv *resv, struct dma_fence **fence, bool vm_needs_flush, bool delayed) argument
2249 amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, struct dma_resv *resv, struct dma_fence **fence) argument
2303 amdgpu_fill_buffer(struct amdgpu_bo *bo, uint32_t src_data, struct dma_resv *resv, struct dma_fence **f, bool delayed) argument
[all...]
H A Damdgpu_amdkfd_gpuvm.c331 ttm_bo_type_sg, mem->bo->tbo.base.resv, &gem_obj, 0);
352 * NOTE: Must be called with BO reserved i.e. bo->tbo.resv->lock held.
366 dma_resv_replace_fences(bo->tbo.base.resv, ef->base.context,
400 BUG_ON(!dma_resv_trylock(bo->tbo.base.resv));
402 dma_resv_unlock(bo->tbo.base.resv);
443 ret = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
447 dma_resv_add_fence(bo->tbo.base.resv, fence,
1343 ret = amdgpu_sync_resv(NULL, sync, pd->tbo.base.resv,
1419 ret = dma_resv_reserve_fences(vm->root.bo->tbo.base.resv, 1);
1422 dma_resv_add_fence(vm->root.bo->tbo.base.resv,
[all...]
/linux-master/drivers/gpu/drm/
H A Ddrm_prime.c889 .resv = obj->resv,
953 obj->resv = dma_buf->resv;
H A Ddrm_gem_vram_helper.c285 dma_resv_assert_held(gbo->bo.base.resv);
342 dma_resv_assert_held(gbo->bo.base.resv);
390 dma_resv_assert_held(gbo->bo.base.resv);
427 dma_resv_assert_held(gbo->bo.base.resv);
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_wb.c109 r = dma_resv_reserve_fences(rbo->tbo.base.resv, 1);
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_bo.h58 struct dma_resv *resv; member in struct:vmw_bo_params
/linux-master/io_uring/
H A Dfiletable.c170 if (range.resv || end > ctx->nr_user_files)
H A Dtctx.c279 if (reg.resv) {
330 if (reg.resv || reg.data || reg.offset >= IO_RINGFD_REG_MAX) {
/linux-master/drivers/gpu/drm/ttm/
H A Dttm_resource.c69 dma_resv_assert_held(pos->first->bo->base.resv);
70 dma_resv_assert_held(pos->last->bo->base.resv);
109 WARN_ON(pos->first->bo->base.resv != res->bo->base.resv);
/linux-master/drivers/gpu/drm/xe/
H A Dxe_drm_client.c124 if (!dma_resv_test_signaled(bo->ttm.base.resv,
H A Dxe_vm_types.h11 #include <linux/dma-resv.h>
55 * write: vm->userptr.notifier_lock in read mode and vm->resv held.
56 * read: vm->userptr.notifier_lock in write mode or vm->resv held.
71 * resv.
95 * protected by vm->lock, vm->resv and for userptrs,
176 * vm resv).
230 * due to no work available. Protected by the vm resv.
259 * protected by the vm resv.
H A Dxe_migrate.c618 static int job_add_deps(struct xe_sched_job *job, struct dma_resv *resv, argument
621 return drm_sched_job_add_resv_dependencies(&job->drm, resv, usage);
821 err = job_add_deps(job, src_bo->ttm.base.resv,
824 err = job_add_deps(job, dst_bo->ttm.base.resv,
1064 err = job_add_deps(job, bo->ttm.base.resv,
1181 if (bo && !dma_resv_test_signaled(bo->ttm.base.resv,
1241 * @bo: The bo whose dma-resv we will await before updating, or NULL if userptr.
1393 err = job_add_deps(job, bo->ttm.base.resv,
/linux-master/drivers/gpu/drm/radeon/
H A Dr600_dma.c437 * @resv: reservation object to sync to
446 struct dma_resv *resv)
467 radeon_sync_resv(rdev, &sync, resv, false);
443 r600_copy_dma(struct radeon_device *rdev, uint64_t src_offset, uint64_t dst_offset, unsigned num_gpu_pages, struct dma_resv *resv) argument
H A Dradeon_asic.h89 struct dma_resv *resv);
160 struct dma_resv *resv);
349 struct dma_resv *resv);
353 struct dma_resv *resv);
474 struct dma_resv *resv);
548 struct dma_resv *resv);
727 struct dma_resv *resv);
798 struct dma_resv *resv);
802 struct dma_resv *resv);
H A Dradeon_cs.c257 struct dma_resv *resv; local
259 resv = reloc->robj->tbo.base.resv;
260 r = radeon_sync_resv(p->rdev, &p->ib.sync, resv,
543 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
/linux-master/drivers/gpu/drm/vc4/
H A Dvc4_gem.c564 dma_resv_add_fence(bo->base.base.resv, exec->fence,
576 dma_resv_add_fence(bo->base.base.resv, exec->fence,
589 dma_resv_unlock(exec->bo[i]->resv);
615 ret = dma_resv_lock_slow_interruptible(bo->resv, acquire_ctx);
628 ret = dma_resv_lock_interruptible(bo->resv, acquire_ctx);
634 dma_resv_unlock(bo->resv);
640 dma_resv_unlock(bo->resv);
661 ret = dma_resv_reserve_fences(bo->resv, 1);
/linux-master/fs/ocfs2/
H A Dlocalalloc.c40 struct ocfs2_alloc_reservation *resv);
826 struct ocfs2_alloc_reservation *resv)
839 if (!resv) {
843 resv = &r;
847 if (ocfs2_resmap_resv_bits(resmap, resv, &bitoff, &numfound) == 0) {
896 ocfs2_resv_discard(resmap, resv);
823 ocfs2_local_alloc_find_clear_bits(struct ocfs2_super *osb, struct ocfs2_dinode *alloc, u32 *numbits, struct ocfs2_alloc_reservation *resv) argument
/linux-master/fs/xfs/
H A Dxfs_attr_item.c745 struct xfs_trans_res resv; local
771 resv = xfs_attr_set_resv(args);
776 resv = M_RES(mp)->tr_attrrm;
780 resv = xlog_recover_resv(&resv);
781 error = xfs_trans_alloc(mp, &resv, total, 0, XFS_TRANS_RESERVE, &tp);
/linux-master/drivers/gpu/drm/scheduler/
H A Dsched_main.c78 #include <linux/dma-resv.h>
928 * drm_sched_job_add_resv_dependencies - add all fences from the resv to the job
930 * @resv: the dma_resv object to get the fences from
933 * This adds all fences matching the given usage from @resv to @job.
934 * Must be called with the @resv lock held.
940 struct dma_resv *resv,
947 dma_resv_assert_held(resv);
949 dma_resv_for_each_fence(&cursor, resv, usage, fence) {
981 return drm_sched_job_add_resv_dependencies(job, obj->resv,
939 drm_sched_job_add_resv_dependencies(struct drm_sched_job *job, struct dma_resv *resv, enum dma_resv_usage usage) argument
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_ttm.c607 err = dma_resv_wait_timeout(bo->base.resv, DMA_RESV_USAGE_BOOKKEEP,
1054 dma_resv_unlock(bo->base.resv);
1075 dma_resv_unlock(bo->base.resv);
1100 dma_resv_unlock(bo->base.resv);
1139 dma_resv_unlock(bo->base.resv);

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