/linux-master/sound/soc/codecs/ |
H A D | aw88399.c | 149 unsigned int reg_val; local 152 ret = regmap_read(aw_dev->regmap, AW88399_SYSINT_REG, ®_val); 156 *int_status = reg_val; 175 unsigned int reg_val; local 178 ret = regmap_read(aw_dev->regmap, AW88399_SYSST_REG, ®_val); 181 if ((reg_val & AW88399_BIT_PLL_CHECK) != AW88399_BIT_PLL_CHECK) { 182 dev_err(aw_dev->dev, "check pll lock fail, reg_val:0x%04x", reg_val); 208 unsigned int reg_val; local 211 ret = regmap_read(aw_dev->regmap, AW88399_PLLCTRL2_REG, ®_val); 276 unsigned int reg_val; local 339 unsigned int reg_val; local 368 unsigned int reg_val; local 399 unsigned int reg_val; local 433 uint16_t reg_val; local 514 unsigned int reg_val; local 556 unsigned int reg_val; local 652 unsigned int reg_val; local 957 unsigned int reg_val; local 1012 unsigned int reg_val; local 1031 u16 read_vol, reg_val; local 1291 u16 reg_val; local [all...] |
H A D | aw88261.c | 146 unsigned int reg_val; local 149 ret = regmap_read(aw_dev->regmap, AW88261_SYSST_REG, ®_val); 152 if ((reg_val & AW88261_BIT_PLL_CHECK) != AW88261_BIT_PLL_CHECK) { 153 dev_err(aw_dev->dev, "check pll lock fail,reg_val:0x%04x", reg_val); 179 unsigned int reg_val; local 182 ret = regmap_read(aw_dev->regmap, AW88261_PLLCTRL1_REG, ®_val); 186 reg_val &= (~AW88261_CCO_MUX_MASK); 187 if (reg_val == AW88261_CCO_MUX_DIVIDED_VALUE) { 247 unsigned int reg_val; local 310 unsigned int reg_val; local 338 unsigned int reg_val; local 366 u32 reg_val; local 400 u16 reg_val; local 1015 unsigned int reg_val; local [all...] |
/linux-master/drivers/iio/temperature/ |
H A D | max31856.c | 162 u8 reg_val[3]; local 170 ret = max31856_read(data, MAX31856_LTCBH_REG, reg_val, 3); 174 *val = get_unaligned_be24(®_val[0]) >> 5; 176 if (reg_val[0] & 0x80) 185 ret = max31856_read(data, MAX31856_CJTO_REG, reg_val, 3); 189 offset_cjto = reg_val[0]; 191 *val = get_unaligned_be16(®_val[1]) >> 2; 195 if (reg_val[1] & 0x80) 203 ret = max31856_read(data, MAX31856_SR_REG, reg_val, 1); 207 if (reg_val[ 315 u8 reg_val; local [all...] |
/linux-master/arch/riscv/kvm/ |
H A D | vcpu_timer.c | 168 u64 reg_val; local 177 reg_val = riscv_timebase; 180 reg_val = kvm_riscv_current_cycles(gt); 183 reg_val = t->next_cycles; 186 reg_val = (t->next_set) ? KVM_RISCV_TIMER_STATE_ON : 193 if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) 208 u64 reg_val; local 216 if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) 221 if (reg_val != riscv_timebase) 225 gt->time_delta = reg_val [all...] |
H A D | vcpu_sbi_sta.c | 163 unsigned long *reg_val) 167 *reg_val = (unsigned long)vcpu->arch.sta.shmem; 171 *reg_val = upper_32_bits(vcpu->arch.sta.shmem); 173 *reg_val = 0; 184 unsigned long reg_val) 191 vcpu->arch.sta.shmem = reg_val; 194 vcpu->arch.sta.shmem = reg_val; 201 vcpu->arch.sta.shmem = ((gpa_t)reg_val << 32); 203 } else if (reg_val != 0) { 161 kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *reg_val) argument 182 kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val) argument
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/linux-master/sound/drivers/opl3/ |
H A D | opl3_midi.c | 292 unsigned char reg_val; local 395 reg_val = vp->keyon_reg & ~OPL3_KEYON_BIT; 396 opl3->command(opl3, opl3_reg, reg_val); 403 reg_val = vp->keyon_reg & ~OPL3_KEYON_BIT; 404 opl3->command(opl3, opl3_reg, reg_val); 466 reg_val = fm->op[i].am_vib; 468 opl3->command(opl3, opl3_reg, reg_val); 471 reg_val = vol_op[i]; 473 opl3->command(opl3, opl3_reg, reg_val); 476 reg_val [all...] |
H A D | opl3_drums.c | 126 unsigned char reg_val; local 130 reg_val = data->ksl_level; 131 snd_opl3_calc_volume(®_val, vel, chan); 133 opl3->command(opl3, opl3_reg, reg_val); 137 reg_val = data->feedback_connection | OPL3_STEREO_BITS; 139 reg_val &= ~OPL3_VOICE_TO_RIGHT; 141 reg_val &= ~OPL3_VOICE_TO_LEFT; 143 opl3->command(opl3, opl3_reg, reg_val);
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/linux-master/drivers/leds/ |
H A D | leds-lm3530.c | 230 u8 reg_val[LM3530_REG_MAX]; local 266 reg_val[0] = gen_config; /* LM3530_GEN_CONFIG */ 267 reg_val[1] = als.config; /* LM3530_ALS_CONFIG */ 268 reg_val[2] = brt_ramp; /* LM3530_BRT_RAMP_RATE */ 269 reg_val[3] = als.imp_sel; /* LM3530_ALS_IMP_SELECT */ 270 reg_val[4] = brightness; /* LM3530_BRT_CTRL_REG */ 271 reg_val[5] = als.zones[0]; /* LM3530_ALS_ZB0_REG */ 272 reg_val[6] = als.zones[1]; /* LM3530_ALS_ZB1_REG */ 273 reg_val[7] = als.zones[2]; /* LM3530_ALS_ZB2_REG */ 274 reg_val[ [all...] |
/linux-master/drivers/net/phy/mscc/ |
H A D | mscc_serdes.c | 96 u32 reg_val; local 100 reg_val = (des_phy_ctrl << PHY_S6G_DES_PHY_CTRL_POS) | 107 reg_val); 120 u32 reg_val; local 126 reg_val = base_val | (ib_rtrm_adj << 25) | 132 reg_val); 146 u32 reg_val = 0; local 152 reg_val = (ib_tjtag << 17) + (ib_tsdet << 12) + (ib_scaly << 8) + 156 reg_val); 190 u32 reg_val; local 209 u32 reg_val; local 255 u32 reg_val; local 275 u32 reg_val; local 293 u32 reg_val; local [all...] |
/linux-master/drivers/hwmon/ |
H A D | sy7636a-hwmon.c | 25 int ret, reg_val; local 28 SY7636A_REG_TERMISTOR_READOUT, ®_val); 32 *temp = reg_val * 1000;
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/linux-master/drivers/mmc/host/ |
H A D | cqhci-crypto.c | 45 cqhci_writel(cq_host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); 49 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[i]), 50 slot_offset + i * sizeof(cfg->reg_val[0])); 53 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[17]), 54 slot_offset + 17 * sizeof(cfg->reg_val[0])); 56 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[16]), 57 slot_offset + 16 * sizeof(cfg->reg_val[0])); 183 cq_host->crypto_capabilities.reg_val = 219 cq_host->crypto_cap_array[cap_idx].reg_val =
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_lsdma.h | 44 uint32_t reg_val, uint32_t mask);
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H A D | amdgpu_lsdma.c | 30 uint32_t reg_index, uint32_t reg_val, 38 if ((val & mask) == reg_val) 29 amdgpu_lsdma_wait_for(struct amdgpu_device *adev, uint32_t reg_index, uint32_t reg_val, uint32_t mask) argument
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/linux-master/drivers/ufs/core/ |
H A D | ufshcd-crypto.c | 35 ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); 37 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]), 38 slot_offset + i * sizeof(cfg->reg_val[0])); 41 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[17]), 42 slot_offset + 17 * sizeof(cfg->reg_val[0])); 44 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[16]), 45 slot_offset + 16 * sizeof(cfg->reg_val[0])); 171 hba->crypto_capabilities.reg_val = 201 hba->crypto_cap_array[cap_idx].reg_val =
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/linux-master/drivers/net/wireless/ath/ath10k/ |
H A D | hw.c | 745 u32 addr, reg_val, mem_val; local 762 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); 767 if (MS(reg_val, EFUSE_XTAL_SEL) > ATH10K_HW_REFCLK_COUNT) 770 hw_clk = &hw->hw_clk[MS(reg_val, EFUSE_XTAL_SEL)]; 774 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); 778 reg_val &= ~(BB_PLL_CONFIG_FRAC_MASK | BB_PLL_CONFIG_OUTDIV_MASK); 779 reg_val |= (SM(hw_clk->rnfrac, BB_PLL_CONFIG_FRAC) | 781 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val); 787 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); 791 reg_val [all...] |
/linux-master/drivers/gpio/ |
H A D | gpio-pch.c | 105 u32 reg_val; local 110 reg_val = ioread32(&chip->reg->po); 112 reg_val |= BIT(nr); 114 reg_val &= ~BIT(nr); 116 iowrite32(reg_val, &chip->reg->po); 132 u32 reg_val; local 137 reg_val = ioread32(&chip->reg->po); 139 reg_val |= BIT(nr); 141 reg_val &= ~BIT(nr); 142 iowrite32(reg_val, 310 unsigned long reg_val = ioread32(&chip->reg->istatus); local [all...] |
/linux-master/drivers/media/dvb-frontends/ |
H A D | mxl692.c | 570 u32 ix, reg_val = 0x1; local 596 status = mxl692_memwrite(dev, 0x70000018, (u8 *)®_val, sizeof(u32)); 653 u32 dev_type = MXL_EAGLE_DEVICE_MAX, reg_val = 0x2; local 658 status = mxl692_memwrite(dev, 0x80000100, (u8 *)®_val, sizeof(u32)); 680 u32 reg_val; local 685 status = mxl692_memread(dev, 0x90000000, (u8 *)®_val, sizeof(u32)); 689 reg_val &= 0x00FFFFFF; 690 reg_val |= (power_supply == MXL_EAGLE_POWER_SUPPLY_SOURCE_SINGLE) ? 693 status = mxl692_memwrite(dev, 0x90000000, (u8 *)®_val, sizeof(u32)); 698 status = mxl692_memread(dev, 0x90000018, (u8 *)®_val, sizeo 716 u32 reg_val, reg_val1; local [all...] |
/linux-master/include/linux/mfd/da9055/ |
H A D | core.h | 69 unsigned char reg_val) 71 return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); 67 da9055_reg_update(struct da9055 *da9055, unsigned char reg, unsigned char bit_mask, unsigned char reg_val) argument
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/linux-master/arch/riscv/include/asm/ |
H A D | kvm_vcpu_sbi.h | 74 unsigned long *reg_val); 76 unsigned long reg_val);
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/linux-master/drivers/iio/adc/ |
H A D | max77541-adc.c | 47 unsigned int reg_val; local 56 ret = regmap_read(*regmap, MAX77541_REG_M2_CFG1, ®_val); 60 reg_val = FIELD_GET(MAX77541_BITS_MX_CFG1_RNG, reg_val); 61 switch (reg_val) {
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/linux-master/drivers/mfd/ |
H A D | da9052-i2c.c | 88 int reg_val, ret; local 90 ret = regmap_read(da9052->regmap, DA9052_CONTROL_B_REG, ®_val); 94 if (!(reg_val & DA9052_CONTROL_B_WRITEMODE)) { 95 reg_val |= DA9052_CONTROL_B_WRITEMODE; 97 reg_val);
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/linux-master/drivers/platform/x86/intel/ |
H A D | bytcrc_pwrsrc.c | 64 const char * const *info, unsigned int reg_val) 69 if (reg_val & BIT(i)) 77 unsigned int reg_val; local 80 ret = regmap_read(data->regmap, CRYSTALCOVE_SPWRSRC_REG, ®_val); 84 crc_pwrsrc_log(seq, "System powered", pwrsrc_pwrsrc_info, reg_val); 63 crc_pwrsrc_log(struct seq_file *seq, const char *prefix, const char * const *info, unsigned int reg_val) argument
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/linux-master/drivers/video/backlight/ |
H A D | adp8870_bl.c | 156 uint8_t reg_val; local 161 ret = adp8870_read(client, reg, ®_val); 163 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 164 reg_val |= bit_mask; 165 ret = adp8870_write(client, reg, reg_val); 175 uint8_t reg_val; local 180 ret = adp8870_read(client, reg, ®_val); 182 if (!ret && (reg_val & bit_mask)) { 183 reg_val &= ~bit_mask; 184 ret = adp8870_write(client, reg, reg_val); 546 uint8_t reg_val; local 737 uint8_t reg_val; local 766 uint8_t reg_val; local 785 uint8_t reg_val; local 847 uint8_t reg_val; local [all...] |
H A D | adp8860_bl.c | 141 uint8_t reg_val; local 146 ret = adp8860_read(client, reg, ®_val); 148 if (!ret && ((reg_val & bit_mask) != bit_mask)) { 149 reg_val |= bit_mask; 150 ret = adp8860_write(client, reg, reg_val); 160 uint8_t reg_val; local 165 ret = adp8860_read(client, reg, ®_val); 167 if (!ret && (reg_val & bit_mask)) { 168 reg_val &= ~bit_mask; 169 ret = adp8860_write(client, reg, reg_val); 425 uint8_t reg_val; local 555 uint8_t reg_val; local 582 uint8_t reg_val; local 601 uint8_t reg_val; local 659 uint8_t reg_val; local [all...] |
/linux-master/tools/testing/selftests/kvm/aarch64/ |
H A D | vpmu_counter_access.c | 558 uint64_t set_reg_id, clr_reg_id, reg_val; local 575 vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(set_reg_id), ®_val); 576 TEST_ASSERT((reg_val & (~valid_counters_mask)) == 0, 578 KVM_ARM64_SYS_REG(set_reg_id), reg_val); 580 vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(clr_reg_id), ®_val); 581 TEST_ASSERT((reg_val & (~valid_counters_mask)) == 0, 583 KVM_ARM64_SYS_REG(clr_reg_id), reg_val); 592 vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(set_reg_id), ®_val); 593 TEST_ASSERT((reg_val & (~valid_counters_mask)) == 0, 595 KVM_ARM64_SYS_REG(set_reg_id), reg_val); [all...] |